TECHNIQUES FOR WIDEBAND TOUCH SENSING ANDRELATED SYSTEMS, METHODS AND DEVICES

    公开(公告)号:WO2021026547A1

    公开(公告)日:2021-02-11

    申请号:PCT/US2020/070198

    申请日:2020-06-26

    申请人: ATMEL CORPORATION

    发明人: VINJE, Anders

    IPC分类号: G06F3/041 G06F3/044

    摘要: A touch sensing method is described as well as related methods and systems. In some embodiments of the touch sensing method, energy of a drive signal is allocated among frequencies of RF subcarriers such that the allocated energy meets electromagnetic emissions requirements for the application of a touch sensing system implementing the touch sensing method. Also described are methods of determining a spectrally shaped time domain digital waveform for use in generating a spectrally shaped drive signal.

    SENSOR AND METHOD OF SENSING
    4.
    发明申请
    SENSOR AND METHOD OF SENSING 审中-公开
    传感器和感测方法

    公开(公告)号:WO2010048433A1

    公开(公告)日:2010-04-29

    申请号:PCT/US2009/061718

    申请日:2009-10-22

    IPC分类号: G06F3/044

    摘要: A touch sensor senses the presence of an object at one of a plurality of channels on a surface of the touch sensor, wherein proximity of the object to the touch sensor results in a change in capacitance at the position of the channel. The touch sensor includes a drive circuit and a charge sensing circuit, each coupled to each of the channels. The charge sensing circuit includes at least one charge measurement capacitor. A measurement cycle is applied to the touch sensor having a drive portion and a sense portion. During the drive portion a charge is applied to the channels and therefore the charge measurement capacitors of the touch sensor, and during a sense portion the charge measurement capacitors are discharged by a predetermined amount and the remaining charge on the charge measurement capacitors is measured.

    摘要翻译: 触摸传感器在触摸传感器的表面上的多个通道中的一个通道处感测物体的存在,其中物体与触摸传感器的接近导致通道位置处的电容变化。 触摸传感器包括驱动电路和电荷感测电路,每个耦合到每个通道。 电荷感测电路包括至少一个电荷测量电容器。 测量周期应用于具有驱动部分和感测部分的触摸传感器。 在驱动部分期间,电荷被施加到通道,因此施加触摸传感器的电荷测量电容器,并且在感测部分期间,电荷测量电容器被放电预定量,并且测量电荷测量电容器上的剩余电荷。

    SIGNAL PROCESSING
    5.
    发明申请
    SIGNAL PROCESSING 审中-公开
    信号处理

    公开(公告)号:WO2010048226A1

    公开(公告)日:2010-04-29

    申请号:PCT/US2009/061379

    申请日:2009-10-20

    摘要: An iterative method for generating a series of output signal values from a series of input signal values is described. Iterations of the method comprise the steps of obtaining a current input signal value for the current iteration, comparing the current input signal value with an output signal value determined in a previous iteration, updating a counter value determined in the previous iteration based on the result of the comparison between the current input signal value and the previous output signal value such that the updated counter value replaces the counter value determined in the previous iteration, determining a slew value based on the counter value; and adding the slew value to the previously determined output signal value to generate a new current output signal value. Thus different slew values may be added to the previous output signal to obtain a new output signal. The counter value is updated so that its value reflects recent trends in the input signals. E.g. if the input signal is on an upward trend, the counter value may achieve a relative high value, for example because it is incremented each time an input signal exceeds a previously determined output signal. The magnitude of the slew values may increase as the counter value increases, thereby allowing the output signals to more rapidly track changes in the input signals.

    摘要翻译: 描述了从一系列输入信号值产生一系列输出信号值的迭代方法。 所述方法的迭代包括以下步骤:获取当前迭代的当前输入信号值,将当前输入信号值与在先前迭代中确定的输出信号值进行比较,根据先前迭代中确定的计数值, 当前输入信号值与先前输出信号值之间的比较,使得更新的计数器值替换在先前迭代中确定的计数器值,基于计数器值确定转换值; 并将所述转换值加到先前确定的输出信号值以产生新的电流输出信号值。 因此,可以将不同的转换值添加到先前的输出信号以获得新的输出信号。 更新计数器值,使其值反映输入信号的最新趋势。 例如。 如果输入信号处于上升趋势,则计数器值可以达到相对较高的值,例如因为每当输入信号超过预先确定的输出信号时它增加。 当计数器值增加时,转换值的大小可能会增加,从而允许输出信号更快地跟踪输入信号的变化。

    ACCESS RIGHTS ON A MEMORY MAP
    6.
    发明申请
    ACCESS RIGHTS ON A MEMORY MAP 审中-公开
    存储映射中的访问权限

    公开(公告)号:WO2009102658A1

    公开(公告)日:2009-08-20

    申请号:PCT/US2009/033550

    申请日:2009-02-09

    IPC分类号: G06F12/14

    CPC分类号: G06F12/1441

    摘要: A microcontroller system, such as a system-on-a-chip integrated circuit, including a processor (e.g., a Von Neumann processor), memory, and a memory protection unit (MPU), where the MPU provides execute-only access rights for one or more protected areas of the memory. The MPU can allow instructions fetched from within a protected area to access data in the protected area while preventing instructions fetched from outside the protected area from accessing data in the protected area.

    摘要翻译: 诸如片上系统集成电路的微控制器系统,包括处理器(例如,冯诺依曼处理器),存储器和存储器保护单元(MPU),其中MPU提供仅执行访问权限 存储器的一个或多个保护区域。 MPU可以允许从保护区域内取出的指令访问受保护区域中的数据,同时防止从保护区域外部取出的指令访问保护区域中的数据。

    METHOD AND SYSTEM FOR LARGE NUMBER MULTIPLICATION
    7.
    发明申请
    METHOD AND SYSTEM FOR LARGE NUMBER MULTIPLICATION 审中-公开
    大量数字化方法与系统

    公开(公告)号:WO2009023595A1

    公开(公告)日:2009-02-19

    申请号:PCT/US2008/072697

    申请日:2008-08-08

    IPC分类号: G06F7/00

    CPC分类号: G06F7/525

    摘要: Methods, apparatus and systems for large number multiplication. A multiplication circuit is provided to compute the product of two operands (A and B), at least one of which is wider than a width associated with the multiplication circuit. Each of the operands includes contiguous ordered word-wide operand segments (Aj and Bi) characterized by specific weights j (integer from 0 to k) and i (integer from 0 to m). The multiplication circuit executes a matrix of word-wide operand segment pair multiplication operations. Multiplication operations are performed on a pair of rows at one time. For each pair of rows, a pair of corresponding Bi word-wide operand segments are read from a memory and word-wide operand segment pair multiplication operations (Aj*Bi) are iteratively performed for each of k+2 columns. For each column a maximum of two additional memory read operations and one memory write operation is required.

    摘要翻译: 用于大数乘法的方法,装置和系统。 提供乘法电路以计算两个操作数(A和B)的乘积,其中至少一个比乘法电路相关的宽度宽。 每个操作数包括由特定权重j(从0到k的整数)和i(从0到m的整数)表征的连续排序的单字操作数段(Aj和Bi)。 乘法电路执行字宽操作数段对乘法运算的矩阵。 一次对一对行进行乘法运算。 对于每对行,从存储器读取一对对应的双字操作数段,并对k + 2列中的每一行迭代地执行字宽操作数段对乘法运算(Aj * Bi)。 对于每列,最多需要两个附加的存储器读操作和一个存储器写操作。

    METHOD AND APPARATUS FOR ESD PROTECTION
    8.
    发明申请
    METHOD AND APPARATUS FOR ESD PROTECTION 审中-公开
    ESD保护方法和装置

    公开(公告)号:WO2008153971A1

    公开(公告)日:2008-12-18

    申请号:PCT/US2008/007162

    申请日:2008-06-06

    IPC分类号: H03K19/003

    CPC分类号: H01L27/0285

    摘要: Some disclosed embodiments of an electrostatic discharge protection circuit include a shunt device coupled between a power supply terminal and ground to shunt current from the power supply terminal to ground in response to a trigger signal received at an input of the shunt device and a latch coupled to the shunt device input to latch the trigger signal received at a latch input. Some embodiments also include a buffer coupled to the latch input to receive the trigger signal at a buffer input and a comparator coupled between the power supply terminal, ground, and the buffer input to respond to an electrostatic discharge event and produce the trigger signal at a comparator output. In some embodiments the comparator further includes a first current mirror comprising a first sense device coupled to the power supply terminal and a first mirror device coupled between a comparator output and the power supply terminal and a plurality of bias devices coupled to the first sense device, at least two of the plurality of bias devices coupled in series at a bias output line. In some embodiments the comparator further includes a transconductance device comprising an input coupled to the power supply terminal and a control input coupled to the bias output line and a second current mirror comprising a second sense device coupled between the transconductance device and ground and a second mirror device coupled between the comparator output and ground, the second mirror device coupled in series with the first mirror device. In some embodiments the comparator also includes a compensating device coupled between the plurality of bias devices and ground.

    摘要翻译: 静电放电保护电路的一些公开的实施例包括耦合在电源端子和地之间的分流装置,以响应于在分流装置的输入处接收到的触发信号而将电流从电源端子接地分流, 分流装置输入以锁存在锁存器输入处接收的触发信号。 一些实施例还包括耦合到锁存器输入端以在缓冲器输入处接收触发信号的缓冲器和耦合在电源端子,地和缓冲器输入端之间的比较器,以响应于静电放电事件并产生触发信号 比较器输出。 在一些实施例中,比较器还包括第一电流镜,其包括耦合到电源端的第一感测装置和耦合在比较器输出和电源端之间的第一反射镜装置以及耦合到第一感测装置的多个偏置装置, 所述多个偏置装置中的至少两个在偏压输出线处串联耦合。 在一些实施例中,比较器还包括跨导器件,其包括耦合到电源端子的输入端和耦合到偏置输出线路的控制输入端和包括耦合在跨导器件与地与第二反射镜之间的第二感测器件的第二电流镜 耦合在比较器输出和地之间的装置,第二反射镜装置与第一反射镜装置串联耦合。 在一些实施例中,比较器还包括耦合在多个偏置装置和地之间的补偿装置。

    LOW VOLTAGE CHARGE PUMP
    9.
    发明申请
    LOW VOLTAGE CHARGE PUMP 审中-公开
    低电压充电泵

    公开(公告)号:WO2008153781A1

    公开(公告)日:2008-12-18

    申请号:PCT/US2008/006669

    申请日:2008-05-23

    IPC分类号: H02M3/07

    CPC分类号: H02M3/073 H02M2003/075

    摘要: A single pump stage (200) of a multi-stage charge pump couples a first low-voltage NMOS transistor (N1) in series with a first low-voltage PMOS transistor (P1) between charge transfer capacitors (Ct1, Ct2). A second low- voltage NMOS transistor (N2) is coupled between the gate and the source of the first NMOS transistor (N1). A second low-voltage PMOS transistor (P2) is coupled between the gate and the source of the first PMOS transistor (P1). Respective boost voltages are applied to gates of the first NMOS transistor (N1) and the first PMOS transistor (P1) to minimize threshold voltage losses. A stabilizing capacitor (Ci) is connected between the first NMOS transistor (N1) and the first PMOS transistor (P1).

    摘要翻译: 多级电荷泵的单个泵级(200)将第一低电压NMOS晶体管(N1)与电荷转移电容器(Ct1,Ct2)之间的第一低电压PMOS晶体管(P1)串联耦合。 第二低电压NMOS晶体管(N2)耦合在第一NMOS晶体管(N1)的栅极和源极之间。 第二低电压PMOS晶体管(P2)耦合在第一PMOS晶体管(P1)的栅极和源极之间。 相应的升压电压施加到第一NMOS晶体管(N1)和第一PMOS晶体管(P1)的栅极,以最小化阈值电压损耗。 稳定电容器(Ci)连接在第一NMOS晶体管(N1)和第一PMOS晶体管(P1)之间。

    POWERING TARGET DEVICE FROM SINGLE-WIRE INTERFACE
    10.
    发明申请
    POWERING TARGET DEVICE FROM SINGLE-WIRE INTERFACE 审中-公开
    从单线接口供电目标设备

    公开(公告)号:WO2008150420A1

    公开(公告)日:2008-12-11

    申请号:PCT/US2008/006795

    申请日:2008-05-29

    IPC分类号: G08B23/00

    摘要: Embodiments disclosed are apparatus comprising a processing circuit having signal and power input ports to couple to a single-wire interface providing electncal communication of both signals and power at a power supply voltage level Also provided Is a charging transistor coupled at a first source/dram terminal to the single-wire interface Further provided is a charge storage device coupled to the second source/drain terminal of the transistor at a connection point and to the power input port of the processing circuit at said connection point There is also a control device having an input coupled to the single-wire interface, a control output coupled to the gate of the transistor, and powered by the charge storage device at the connection point, such that the transistor charges the storage device when the single-wire interface voltage is at a power supply voltage level.

    摘要翻译: 所公开的实施例包括具有信号和功率输入端口以耦合到单线接口的处理电路的装置,该单线接口提供电源电压电平上的两个信号和功率的电气通信。还提供了一个连接在第一源极/ 还提供了一种电荷存储装置,其在连接点处连接到晶体管的第二源极/漏极端子,并且在所述连接点处连接到处理电路的电力输入端口。还有一种控制装置,其具有 耦合到单线接口的输入,耦合到晶体管的栅极的控制输出,并且由连接点处的电荷存储装置供电,使得当单线接口电压处于 电源电压电平。