公开(公告)号：WO2010057312A1

公开(公告)日：2010-05-27

申请号：PCT/CA2009/001686

申请日：2009-11-24

Applicant: CERTICOM CORP. ,  O'LOUGHLIN, Daniel ,  SMITH, Keelan ,  FULLER, Jay, Scott ,  KU, Joseph ,  LATTIN, William ,  STRUIK, Marinus ,  POELUEV, Yuri ,  CAMPAGNA, Matthew, J. ,  STIEMERLING, Thomas

Inventor： O'LOUGHLIN, Daniel ,  SMITH, Keelan ,  FULLER, Jay, Scott ,  KU, Joseph ,  LATTIN, William ,  STRUIK, Marinus ,  POELUEV, Yuri ,  CAMPAGNA, Matthew, J. ,  STIEMERLING, Thomas

IPC: G06F21/00 ,  G06F9/445 ,  H04L9/30

CPC classification number: G06F12/1408 ,  G06F21/123 ,  G06F21/57 ,  G06F21/606 ,  G06F21/72 ,  G06F21/73 ,  G06F21/76 ,  G06F21/80 ,  G06F2212/1052 ,  G06F2221/2101 ,  H04L9/0877 ,  H04L9/3066 ,  H04L9/3252 ,  H04L9/3263 ,  H04L9/3273 ,  H04L2209/24

Abstract: An asset management system is provided, which includes a hardware module operating as an asset control core. The asset control core generally includes a small hardware core embedded in a target system on chip that establishes a hardware-based point of trust on the silicon die. The asset control core can be used as a root of trust on a consumer device by having features that make it difficult to tamper with. The asset control core is able to generate a unique identifier for one device and participate in the tracking and provisioning of the device through a secure communication channel with an appliance. The appliance generally includes a secure module that caches and distributes provisioning data to one of many agents that connect to the asset control core, e.g. on a manufacturing line or in an after-market programming session.

Abstract translation: 提供资产管理系统，其中包括作为资产控制核心运行的硬件模块。 资产控制核心通常包括嵌入在目标片上系统中的小型硬件核心，其在硅芯片上建立基于硬件的信任点。 资产控制核心可以作为消费者设备的信任根源，具有使其难以篡改的特征。 资产控制核心能够为一个设备生成唯一的标识符，并通过与设备的安全通信通道参与设备的跟踪和配置。 该设备通常包括一个安全模块，它将配置数据高速缓存并分配给连接到资产控制核心的许多代理之一，例如， 在生产线上或在售后市场的程序设计会议。

公开(公告)号：WO2010048720A1

公开(公告)日：2010-05-06

申请号：PCT/CA2009/001558

申请日：2009-10-30

Applicant: CERTICOM CORP. ,  FULLER, Jay Scott

Inventor： FULLER, Jay Scott

IPC: H03K19/007

CPC classification number: H03K17/20 ,  G06F1/24 ,  H03K5/19 ,  H03K17/223

Abstract: There is disclosed a system for detecting the assertion of a reset signal. A plurality of circuit elements are configurable by a reset signal to output a string of data values in a predetermined pattern. A comparator receives the string of data values and determines whether the string of data values matches the predetermined pattern. If so, the comparator generates an output signal indicative of a reset. In one embodiment, the output signal of the comparator can be used to automatically trigger a reset if the reset signal has not been asserted.

Abstract translation: 公开了一种用于检测复位信号的断言的系统。 多个电路元件可由复位信号配置，以预定模式输出一串数据值。 比较器接收数据值串，并确定数据值串是否符合预定模式。 如果是，则比较器产生指示复位的输出信号。 在一个实施例中，如果复位信号尚未被断言，比较器的输出信号可用于自动触发复位。