公开(公告)号：WO2004077335A2

公开(公告)日：2004-09-10

申请号：PCT/IL2004/000190

申请日：2004-02-25

Applicant: INFINEON TECHNOLOGIES FLASH LTD. ,  KRYGIER, Marcelo ,  MEYASSED, Moshe ,  AMIR, Elad

Inventor： KRYGIER, Marcelo ,  MEYASSED, Moshe ,  AMIR, Elad

IPC: G06K

CPC classification number: G06K19/07732 ,  G06K7/0008 ,  G06K7/10297 ,  G06K19/07 ,  G06K19/0719 ,  G06K19/07733 ,  G06K19/07741 ,  G06Q20/341 ,  G06Q20/3576 ,  G07F7/1008

Abstract: According to some embodiments of the present invention, a multi-protocol non-volatile memory ("NVM") card may include a NVM array, at least two protocol units, and a controller adapted to provide an external application access to the NVM array with the use of one of the protocol units. The controller or control logic may select which protocol unit to use based on a signal or other indicator of the protocol used by the external application. According to some embodiments of the present invention, a method of operating a multi-protocol memory card may include switching between a first and a second protocol or mode of the card based on a signal from an application attempting to access to the NVM card.

Abstract translation: 根据本发明的一些实施例，多协议非易失性存储器（“NVM”）卡可以包括NVM阵列，至少两个协议单元，以及适于向NVM阵列提供对NVM阵列的外部应用访问的控制器， 使用协议单位之一。 控制器或控制逻辑可以基于由外部应用使用的协议的信号或其他指示符来选择要使用的协议单元。 根据本发明的一些实施例，操作多协议存储卡的方法可以包括基于来自尝试访问NVM卡的应用的信号在卡的第一和第二协议或模式之间进行切换。

公开(公告)号：WO2005072058A2

公开(公告)日：2005-08-11

申请号：PCT/IL2005/000110

申请日：2005-01-30

Applicant: INFINEON TECHNOLOGIES FLASH LTD. ,  KRYGIER, Marcelo

Inventor： KRYGIER, Marcelo

IPC: G06F12/00 ,  G06F12/06

CPC classification number: G06F12/0646

Abstract: An apparatus and method to determine an addressing mode is disclosed. The method uses one or more unused bits of an address argument of a command as an addressing mode field to determine whether the address argument is a byte address argument or a block address argument.

Abstract translation: 公开了一种确定寻址模式的装置和方法。 该方法使用命令的地址参数的一个或多个未使用的位作为寻址模式字段来确定地址参数是字节地址参数还是块地址参数。

公开(公告)号：WO2005029469A3

公开(公告)日：2005-03-31

申请号：PCT/IL2004/000783

申请日：2004-08-30

Applicant: INFINEON TECHNOLOGIES FLASH LTD. ,  RAZ, Meirav ,  COHEN, Zeev ,  MARCU, Alon

Inventor： RAZ, Meirav ,  COHEN, Zeev ,  MARCU, Alon

IPC: G06F12/16

Abstract: The present invention is a method, circuit and system for storing bits on a Non-Volatile Memory ("NVM") array comprising. According to some embodiments of the present invention, a bit scrambling block may rearrange the received block of bits according to a spreading pattern. An error correction code block may generate an error correction code ("ECC") based on either the original block of bits or based on the rearranged block of bits, and a data storing circuit may store in the NVM array the ECC and the block of bits from which the ECC was not derived.