公开(公告)号：WO2015199971A1

公开(公告)日：2015-12-30

申请号：PCT/US2015/034890

申请日：2015-06-09

Applicant: INTEL CORPORATION ,  RAMADOSS, Murali ,  PENDLURU, Nishanth R. ,  FRIZZELL, Jeffrey S. ,  SHAH, Ankur N.

Inventor： RAMADOSS, Murali ,  PENDLURU, Nishanth R. ,  FRIZZELL, Jeffrey S. ,  SHAH, Ankur N.

IPC: G06Q10/10 ,  G06T1/00

CPC classification number: G06T1/20 ,  G06F9/5044 ,  G06F2209/509 ,  Y02D10/22

Abstract: Methods and systems may provide for receiving, at a controller, a notification of a workload submission by an application lacking system level privileges. Additionally, the controller may be used to schedule a transfer of the workload submission to a graphics hardware component for execution, wherein the controller has system level privileges. In one example, the transfer bypasses an operating system and a kernel mode driver associated with the graphics hardware component.

Abstract translation: 方法和系统可以规定在控制器处由缺少系统级特权的应用程序接收工作负载提交的通知。 此外，控制器可以用于调度将工作负载提交传送到图形硬件组件以供执行，其中控制器具有系统级特权。 在一个示例中，转移绕过与图形硬件组件相关联的操作系统和内核模式驱动器。

公开(公告)号：WO2014028120A1

公开(公告)日：2014-02-20

申请号：PCT/US2013/046504

申请日：2013-06-19

Applicant: INTEL CORPORATION ,  RAO, Jayanth, N. ,  SILVAS, Ronald, W. ,  SHAH, Ankur, N.

Inventor： RAO, Jayanth, N. ,  SILVAS, Ronald, W. ,  SHAH, Ankur, N.

IPC: G06F13/14 ,  G06F9/46 ,  G06F15/167

CPC classification number: G06T1/60 ,  G06F12/0223 ,  G06F12/084 ,  G06F12/1009 ,  G06F12/1036 ,  G06F12/109 ,  G06F12/126 ,  G06F2212/302 ,  G06F2212/62 ,  G06F2212/656 ,  G06F2212/657 ,  G06T1/20 ,  G06T11/60 ,  Y02D10/13

Abstract: A method and system for shared virtual memory between a central processing unit (CPU) and a graphics processing unit (GPU) of a computing device are disclosed herein. The method includes allocating a surface within a system memory. A CPU virtual address space may be created, and the surface may be mapped to the CPU virtual address space within a CPU page table. The method also includes creating a GPU virtual address space equivalent to the CPU virtual address space, mapping the surface to the GPU virtual address space within a GPU page table, and pinning the surface.

Abstract translation: 本文公开了一种用于计算设备的中央处理单元（CPU）和图形处理单元（GPU）之间的共享虚拟存储器的方法和系统。 该方法包括在系统存储器内分配表面。 可以创建CPU虚拟地址空间，并且可以将表面映射到CPU页表中的CPU虚拟地址空间。 该方法还包括创建等效于CPU虚拟地址空间的GPU虚拟地址空间，将表面映射到GPU页表中的GPU虚拟地址空间，并固定表面。

公开(公告)号：WO2020190426A1

公开(公告)日：2020-09-24

申请号：PCT/US2020/017747

申请日：2020-02-11

Applicant: INTEL CORPORATION ,  COORAY, Niran ,  SADLER, William B. ,  PEARCE, Jonathan D. ,  PETRE, Marian Alin ,  ASHBAUGH, Ben ,  RAMADOSS, Murali ,  VEMULAPALLI, Vikranth ,  SHAH, Ankur N. ,  SANKARAN, Rajesh

Inventor： COORAY, Niran ,  SADLER, William B. ,  PEARCE, Jonathan D. ,  PETRE, Marian Alin ,  ASHBAUGH, Ben ,  RAMADOSS, Murali ,  VEMULAPALLI, Vikranth ,  SHAH, Ankur N. ,  SANKARAN, Rajesh

IPC: G06F9/48 ,  G06F9/46 ,  G06T1/20

Abstract: Methods and apparatus relating to transactional page fault handling. In an example, an apparatus comprises a processor to divide an execution thread of a graphics workload into a set of transactions which are to be executed atomically, initiate the execution of the thread, and manage the execution of the thread according to one of a first protocol in response to a determination that a page fault occurred in the execution of a transaction, or a second protocol in response to a determination that a page fault did not occur in the execution of a transaction. Other embodiments are also disclosed and claimed.