公开(公告)号：WO2004112337A1

公开(公告)日：2004-12-23

申请号：PCT/US2004/017162

申请日：2004-05-28

Applicant: QUALCOMM INCORPORATED ,  ABRISHAMKAR, Farrokh ,  BANISTER, Brian ,  SIH, Gilbert, C. ,  EKVETCHAVIT, Thunyac

Inventor： ABRISHAMKAR, Farrokh ,  BANISTER, Brian ,  SIH, Gilbert, C. ,  EKVETCHAVIT, Thunyac

IPC: H04L25/02

CPC classification number: H04B1/1027 ,  H04B17/336 ,  H04W52/143 ,  H04W52/241 ,  H04W52/248

Abstract: This disclosure is directed to techniques for estimating signal-to-noise ratio (SNR) of signals received by a wireless communication device. The techniques take advantage of spatial receive diversity in a wireless communication device to achieve accurate estimates of SNR. In general, a spatial projection wiener filter function can be applied to incoming symbol estimates to support efficient computation of SNR. The estimated SNR can be used to produce power control commands for use in forward power control.

Abstract translation: 本公开涉及用于估计由无线通信设备接收的信号的信噪比（SNR）的技术。 这些技术利用无线通信设备中的空间接收分集来实现SNR的准确估计。 通常，空间投影维纳滤波函数可以应用于输入符号估计，以支持SNR的有效计算。 估计的SNR可用于产生用于正向功率控制的功率控制命令。

公开(公告)号：WO2005089116A3

公开(公告)日：2007-01-25

申请号：PCT/US2005006907

申请日：2005-03-02

Applicant: QUALCOMM INC ,  SIH GILBERT C ,  HSU DE D ,  LEE WAY-SHING ,  CHEN XUFENG

Inventor： SIH GILBERT C ,  HSU DE D ,  LEE WAY-SHING ,  CHEN XUFENG

IPC: G06F9/30

CPC classification number: G06F9/30014 ,  G06F9/30032 ,  G06F9/3875 ,  G06F9/3885 ,  G06F9/3893

Abstract: DSP architectures having improved performance are described. In an exemplary architecture, a DSP includes two MAC units and two ALUs, where one of the ALUs replaces an adder for one of the two MAC units. This DSP may be configured to operate in a dual-MAC/single-ALU configuration, a single-MAC/dual-ALU configuration, or a dual-MAC/dual-ALU configuration. This flexibility allows the DSP to handle various types of signal processing operations and improves utilization of the available hardware. The DSP architectures further includes pipeline registers that break up critical paths and allow operations at a higher clock speed for greater throughput.

Abstract translation: 描述了具有改进性能的DSP架构。 在示例性架构中，DSP包括两个MAC单元和两个ALU，其中一个ALU替换两个MAC单元之一的加法器。 该DSP可以被配置为以双MAC /单ALU配置，单MAC /双ALU配置或双MAC /双ALU配置来操作。 这种灵活性允许DSP处理各种类型的信号处理操作，并提高可用硬件的利用率。 DSP架构还包括流水线寄存器，其分解关键路径，并允许以更高的时钟速度进行操作以获得更高的吞吐量。

公开(公告)号：WO1998021879A1

公开(公告)日：1998-05-22

申请号：PCT/US1997020757

申请日：1997-11-13

Applicant: QUALCOMM INCORPORATED ,  SIH, Gilbert, C. ,  JOHN, Johnny, K.

Inventor： QUALCOMM INCORPORATED

IPC: H04N01/327

CPC classification number: H04N1/32708 ,  H04M1/725 ,  H04N1/32704 ,  H04N1/32715 ,  H04N1/32721

Abstract: A novel and improved method and apparatus for providing an interface to a digital wireless telephone system compatible with standard analog wire line telephones and analog wire line fax machines are disclosed. During a telephone call, a fax detector (11) monitors the incoming data for fax signals. If a fax is detected, the data processor (12) switches from processing the data as if it were voice to processing it as fax. In addition, the remote station is sent a signal notifying it to process the data as fax rather than voice. The fax detector (11) operates by detecting the preamble of a V.21 message, present at the beginning of every fax call. Energy is measured in both frequencies of the BFSK signals. A decision is made by analyzing these energies and locating a specific pattern which repeats itself a sufficient number of times.

Abstract translation: 公开了一种用于向与标准模拟有线电话和模拟有线线路传真机兼容的数字无线电话系统提供接口的新颖和改进的方法和装置。 在电话呼叫期间，传真检测器（11）监视传入信号的传入数据。 如果检测到传真，则数据处理器（12）从处理数据转换为如同语音一样将其作为传真处理。 另外，远程站发送一个信号通知它将数据作为传真而不是语音处理。 传真检测器（11）通过检测在每个传真呼叫开始时存在的V.21消息的前导码来操作。 在BFSK信号的两个频率上测量能量。 通过分析这些能量并找到重复自身足够次数的特定模式来做出决定。

公开(公告)号：WO2005089116A2

公开(公告)日：2005-09-29

申请号：PCT/US2005/006907

申请日：2005-03-02

Applicant: QUALCOMM Incorporated ,  SIH, Gilbert, C. ,  HSU, De, D. ,  LEE, Way-Shing ,  CHEN, Xufeng

Inventor： SIH, Gilbert, C. ,  HSU, De, D. ,  LEE, Way-Shing ,  CHEN, Xufeng

IPC: G06F9/30

CPC classification number: G06F9/30014 ,  G06F9/30032 ,  G06F9/3875 ,  G06F9/3885 ,  G06F9/3893

Abstract: DSP architectures having improved performance are described. In an exemplary architecture, a DSP includes two MAC units and two ALUs, where one of the ALUs replaces an adder for one of the two MAC units. This DSP may be configured to operate in a dual-MAC/single-ALU configuration, a single-MAC/dual-ALU configuration, or a dual-MAC/dual-ALU configuration. This flexibility allows the DSP to handle various types of signal processing operations and improves utilization of the available hardware. The DSP architectures further includes pipeline registers that break up critical paths and allow operations at a higher clock speed for greater throughput.

Abstract translation: 描述了具有改进性能的DSP架构。 在示例性架构中，DSP包括两个MAC单元和两个ALU，其中一个ALU替换两个MAC单元之一的加法器。 该DSP可以被配置为以双MAC /单ALU配置，单MAC /双ALU配置或双MAC /双ALU配置来操作。 这种灵活性允许DSP处理各种类型的信号处理操作，并提高可用硬件的利用率。 DSP架构还包括流水线寄存器，其分解关键路径，并允许以更高的时钟速度进行操作以获得更高的吞吐量。