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公开(公告)号：WO2006035984A3
公开(公告)日：2006-08-10
申请号：PCT/JP2005018256
申请日：2005-09-27
Applicant: MATSUSHITA ELECTRIC IND CO LTD , HIDAKA AKIO , MURANO YUUICHI , WAKASUGI SHINICHI , FUJIMOTO HIDETSUGU , MIZOGUCHI YOSHITAKA
Inventor： HIDAKA AKIO , MURANO YUUICHI , WAKASUGI SHINICHI , FUJIMOTO HIDETSUGU , MIZOGUCHI YOSHITAKA
IPC: H01G4/38
Abstract: A mulitilayer capacitor includes a plurality of dielectric substrates (2) which are layered; a pair of terminal electrodes formed on the plurality of dielectric substrates; a plurality of internal electrodes (3) arranged on each of the dielectric substrates and having outer edges (30) opposed apart by a predetermined interval, wherein at least one of the internal electrodes (3) is arranged apart from the adjacent internal electrode (3) by the maximum interval (5) at the center of the outer edges (30).
Abstract translation: 多层电容器包括层叠的多个电介质基板（2） 形成在所述多个电介质基板上的一对端子电极; 多个内部电极（3），布置在每个电介质基板上，并且具有相对隔开预定间隔的外边缘（30），其中至少一个内部电极（3）与相邻的内部电极（3） ）在外边缘（30）的中心处的最大间隔（5）。
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公开(公告)号：WO2006035984A2
公开(公告)日：2006-04-06
申请号：PCT/JP2005/018256
申请日：2005-09-27
Applicant: MATSUSHITA ELECTRIC INDUSTRIAL CO., LTD. , HIDAKA, Akio , MURANO, Yuuichi , WAKASUGI, Shinichi , FUJIMOTO, Hidetsugu , MIZOGUCHI, Yoshitaka
Inventor： HIDAKA, Akio , MURANO, Yuuichi , WAKASUGI, Shinichi , FUJIMOTO, Hidetsugu , MIZOGUCHI, Yoshitaka
IPC: H01G4/38
Abstract: A mulitilayer capacitor includes a plurality of dielectric substrates which are layered; a pair of terminal electrodes formed on the plurality of dielectric substrates; a plurality of internal electrodes arranged on each of the dielectric substrates and having outer edges opposed apart by a predetermined interval, wherein at least one of the internal electrodes is arranged apart from the adjacent internal electrode by the maximum interval at the center of the outer edges.
Abstract translation: 多层电容器包括层叠的多个电介质基板; 形成在所述多个电介质基板上的一对端子电极; 多个内部电极，布置在每个电介质基板上，并且具有相对隔开预定间隔的外边缘，其中内部电极中的至少一个与相邻的内部电极隔开在外边缘的中心处的最大间隔 。
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