公开(公告)号：WO2023080953A1

公开(公告)日：2023-05-11

申请号：PCT/US2022/043184

申请日：2022-09-12

Applicant: APPLIED MATERIALS, INC.

Inventor： KANG, Chang Seok ,  LEE, Gill Yong ,  FISHBURN, Fred ,  KITAJIMA, Tomohiko ,  KANG, Sung-Kwan ,  VARGHESE, Sony

IPC: H01L27/11521 ,  H01L27/11548 ,  H01L27/11568 ,  H01L27/11575 ,  H01L27/108

Abstract: A semiconductor manufacturing process for forming a three-dimensional (3D) memory structure and a semiconductor device having a 3D memory structure is described. The 3D memory structure comprises layers of memory cells with L shaped conductive layers where the L shaped conductive layers of each layer are coupled to metal lines disposed above the top or upper most layer such that the memory cells in each layer can be coupled to control circuitry.

公开(公告)号：WO2023048832A1

公开(公告)日：2023-03-30

申请号：PCT/US2022/039036

申请日：2022-08-01

Applicant: APPLIED MATERIALS, INC.

Inventor： KANG, Chang Seok ,  FISHBURN, Fred ,  KITAJIMA, Tomohiko ,  KANG, Sung-Kwan ,  VARGHESE, Sony ,  LEE, Gill Yong

IPC: H01L27/108

Abstract: A memory device architecture, and method of fabricating a three dimensional device are provided. The memory device architecture may include a plurality of memory blocks, arranged in an array, wherein a given memory block comprises: a cell region, the cell region comprising a three-dimensional array of memory cells, arranged in a plurality of n memory cell layers; and a staircase region, the staircase region being disposed adjacent to at least a first side of the cell region, the staircase region comprising a signal line assembly that is coupled to the three-dimensional array of memory cells.