公开(公告)号：WO1996019793A1

公开(公告)日：1996-06-27

申请号：PCT/US1995016012

申请日：1995-12-19

Applicant: CIRRUS LOGIC, INC.

Inventor： CIRRUS LOGIC, INC. ,  BRIL, Vlad ,  EGLIT, Alexander ,  KENKARE, Sagar, Waman

IPC: G09G01/16

CPC classification number: G09G5/366 ,  G09G5/14 ,  G09G5/393 ,  G09G5/395 ,  G09G5/40

Abstract: A video controller is provided which reduces the effect of page misses during memory access. A video port FIFO is provided for buffering data from a video port to a display memory. A CRT FIFO is provided for buffering data from a display memory to a display. If, during a video port FIFO cycle, a page miss is encountered, the video port FIFO cycle is terminated and processing passes to a CRT FIFO CYCLE. If a page miss is encountered during a CRT FIFO CYCLE, the subsequent video port FIFO cycle will be shortened by a number of memory cycles to compensate for the additional memory cycles required by the page miss. Additional data accumulated in the video port FIFO may be transferred to the display memory during a retrace interval. In this manner, memory bandwidth is optimized by removing a non-aligned page miss as the worst case of memory bandwidth utilization.

Abstract translation: 提供了一种视频控制器，可以减少存储器访问期间页错误的影响。 提供视频端口FIFO用于将数据从视频端口缓冲到显示存储器。 提供CRT FIFO用于将数据从显示存储器缓冲到显示器。 如果在视频端口FIFO周期期间遇到页面未命中，则视频端口FIFO周期终止，并且处理转到CRT FIFO CYCLE。 如果在CRT FIFO CYCLE期间遇到页错失，则随后的视频端口FIFO周期将缩短多个存储周期，以补偿页错过所需的附加存储器周期。 视频端口FIFO中积累的附加数据可以在回扫间隔期间被传送到显示存储器。 以这种方式，通过消除不对齐的页面遗漏作为存储器带宽利用的最坏情况来优化存储器带宽。

公开(公告)号：WO1995030308A1

公开(公告)日：1995-11-09

申请号：PCT/US1995005287

申请日：1995-04-28

Applicant: CIRRUS LOGIC, INC.

Inventor： CIRRUS LOGIC, INC. ,  EGLIT, Alexander ,  BINDLISH, Rakesh, Kumar ,  BRIL, Vlad

IPC: H04N07/26

CPC classification number: H04N21/4143 ,  G09G5/395 ,  G09G5/42 ,  H04N19/00 ,  H04N19/98

Abstract: Motion video may be imported into a personal or portable computer through an I/O port having a limited data bandwidth, such as a PCMCIA interface. Motion video data is compressed by sub-sampling both luminance and chrominance difference data for different sized groups of pixels. The compression apparatus may be formed on a PCMCIA card which interfaces with a personal or portable computer. Motion video data, compressed by as much as 5:1 or 6:1, is transferred through the PCMCIA card to a host computer. The host computer may serialize the compressed data and store the data in serialized compressed format in a video memory of a video controller. The video controller is provided with decompression circuitry to decompress the motion video data into luminance and chrominance difference data. The luminance and chrominance difference data is converted into RGB data and displayed in a video display.

Abstract translation: 运动视频可以通过具有有限数据带宽的I / O端口（例如PCMCIA接口）导入个人或便携式计算机。 运动视频数据通过对不同大小的像素组的亮度和色差差分数据进行二次采样而被压缩。 压缩装置可以形成在与个人或便携式计算机接口的PCMCIA卡上。 压缩多达5：1或6：1的运动视频数据通过PCMCIA卡传输到主机。 主机可以串行化压缩数据，并将数据以串行压缩格式存储在视频控制器的视频存储器中。 视频控制器设置有解压缩电路，以将运动视频数据解压缩为亮度和色差差数据。 亮度和色差差数据被转换成RGB数据并显示在视频显示器中。

公开(公告)号：WO1990012363A1

公开(公告)日：1990-10-18

申请号：PCT/US1990001952

申请日：1990-04-10

Applicant: CIRRUS LOGIC, INC.

Inventor： CIRRUS LOGIC, INC. ,  BRIL, Vlad ,  HELLER, Paul, W., T. ,  UHLIN, Keith, H.

IPC: G06F09/24

CPC classification number: G06F12/0623 ,  G06F9/4486

Abstract: An addressing technique for transparently managing assignment of memory storage locations in a memory having a total capacity of T bytes for a computer operating system, the operating system having a number M of bytes of storage allocated thereto in the system memory map for storage of the operating system, involves assigning a number N of bytes of memory storage locations for storage of a core portion of the operating system, the number N being less than M, assigning a number S of blocks of additional memory storage locations in the memory, each of the S blocks of memory storage having a capacity of R bytes, where N+R=M; storing the portions of the operating system in addition to the core portion in the S number of blocks of the memory storage locations; retrieving one of the blocks S of the operating system from the memory storage; and retrieving the N number of bytes of the core portion of the operating system from memory storage, and utilizing the retrieved one of the blocks S with the retrieved number N of bytes of the core portion to produce the number M of bytes of the operating system.

公开(公告)号：WO1995030220A1

公开(公告)日：1995-11-09

申请号：PCT/US1995005259

申请日：1995-04-28

Applicant: CIRRUS LOGIC, INC.

Inventor： CIRRUS LOGIC, INC. ,  BINDLISH, Rakesh, Kumar ,  BRIL, Vlad ,  EGLIT, Alexander

IPC: G09G05/14

CPC classification number: G09G5/14 ,  G09G2340/125 ,  H04N5/45

Abstract: A computer video controller, particularly a VGA or SVGA video controller for use with graphical user interface (GUI) software such as WINDOWS3 or OS/23 is provided with two video data pipelines for simultaneously displaying full motion video within a window in a video display. A first data pipeline displays background video at a first pixel depth. A second data pipeline is provided to display a motion video window at a second, usually higher, pixel depth. The location of the motion video window is measured horizontally in number of memory fetch cycles needed to retrieve the horizontal scan line of pixel data abutting the motion video window. The width of the motion video window is measured in the number of memory fetches required to retrieve one scan line of the motion video window. By providing two parallel data pipelines having equal delays, the motion video window can be generated by selectively retrieving background pixel data or motion video window pixel data and transferring the data to the appropriate pipeline. In an alternative embodiment, data tags may be used to distinguish between background and motion video window pixel data. The controller may also support various compression formats for motion video.

Abstract translation: 具有用于诸如WINDOWS3或OS / 23之类的图形用户界面（GUI）软件的VGA或SVGA视频控制器的计算机视频控制器具有两个视频数据流水线，用于在视频显示器的窗口内同时显示全部运动视频。 第一数据流水线以第一像素深度显示背景视频。 提供第二数据流水线以在第二通常较高的像素深度处显示运动视频窗口。 水平地测量运动视频窗口的位置以检索与运动视频窗口相邻的像素数据的水平扫描行所需的存储器提取周期数。 以检索运动视频窗口的一条扫描线所需的存储器提取量来测量运动视频窗口的宽度。 通过提供具有相等延迟的两个并行数据流水线，可以通过选择性地检索背景像素数据或运动视频窗口像素数据并将数据传送到适当的流水线来生成运动视频窗口。 在替代实施例中，可以使用数据标签来区分背景和运动视频窗口像素数据。 控制器还可以支持用于运动视频的各种压缩格式。

公开(公告)号：WO1994023415A1

公开(公告)日：1994-10-13

申请号：PCT/US1994003633

申请日：1994-04-01

Applicant: CIRRUS LOGIC, INC.

Inventor： CIRRUS LOGIC, INC. ,  BASSETTI, Chester, Floyd, Jr. ,  CHANG, Chin-Hsian ,  BRIL, Vlad ,  BINDLISH, Rakesh, Kumar

IPC: G09G03/36

CPC classification number: G09G3/2011 ,  G09G3/3644 ,  G09G3/3681 ,  G09G3/3685 ,  G09G3/3692 ,  G09G3/3696 ,  G09G2320/0204 ,  G09G2320/0209 ,  G09G2320/041

Abstract: A method and apparatus for compensating crosstalk in liquid crystal displays (1 and 2) is disclosed which involves applying boost voltages (V5- and V0+) to the rows (40) and columns (38) of the display (1 and 2) in proportion to the number of ON pixels in a row (40) or column (38), the number of transitions between "ON-and-OFF" or "OFF-and-ON" in each column, and the position of the pixel (Px, y) ina row (40). "Boost" voltages (V5- and V0+) are applied to each row (40) as it is being actively scanned to provide horizontal crosstalk compensation, while "boost" voltages (V5- and V0+) are applied to each column (38) during the vertical retrace interval of the display sequence to provide vertical crosstalk compensation. In a preferred embodiment, the vertical crosstalk compensation is determined during the vertical retrace interval over several frames.

Abstract translation: 公开了用于补偿液晶显示器（1和2）中的串扰的方法和装置，其包括以比例向显示器（1和2）的行（40）和列（38）施加升压电压（V5-和V0 +） 相对于行（40）或列（38）中的ON像素的数量，每列中的“ON-OFF”或“OFF-ON”之间的转换次数和像素的位置（Px ，y）行（40）。 当它被主动扫描以提供水平串扰补偿时，将“升压”电压（V5-和V0 +）施加到每一行（40），而在每个列（38）处施加“升压”电压（V5-和V0 +） 显示序列的垂直回扫间隔提供垂直串扰补偿。 在优选实施例中，垂直串扰补偿在几个帧的垂直回扫间隔期间被确定。