TWO ARCHITECTURES FOR INTEGRATED REALIZATION OF SENSING AND PROCESSING IN A SINGLE DEVICE
    1.
    发明申请
    TWO ARCHITECTURES FOR INTEGRATED REALIZATION OF SENSING AND PROCESSING IN A SINGLE DEVICE 审中-公开
    用于一体化设备中感测和处理的集成实现的两种架构

    公开(公告)号:WO0052639A3

    公开(公告)日:2001-02-15

    申请号:PCT/US0005785

    申请日:2000-03-06

    CPC classification number: G06N3/063

    Abstract: An integrated sensing device comprising an array of sensor processor cells capable of being arranged into a detection array. Each sensor processor cell comprises a sensing medium; at least one transconductance amplifier configured for feedforward template multiplication; at least one transconductance amplifier configured for feedback template weights; a plularity of local dynamic memory cells; a data bus for data transfer; and a local logic unit. The array of sensor processor cells, by responding to data control signals, is capable of transforming, reshaping, and modulating the original sensed image into varied represenations which include (and extend) traditional spatial and temporal processing transformations.

    Abstract translation: 一种集成感测装置,包括能够被布置成检测阵列的传感器处理器单元阵列。 每个传感器处理器单元包括感测介质; 配置用于前馈模板乘法的至少一个跨导放大器; 配置用于反馈模板权重的至少一个跨导放大器; 局部动态记忆细胞的泛型; 用于数据传输的数据总线; 和本地逻辑单元。 通过响应于数据控制信号,传感器处理器单元的阵列能够将原始感测图像转换,整形和调制成包括传统的空间和时间处理转换(和扩展)的各种表示。

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