INTEGRATED CIRCUITS HAVING INTEGRATED ACOUSTIC COMMUNICATION LINKS
    1.
    发明申请
    INTEGRATED CIRCUITS HAVING INTEGRATED ACOUSTIC COMMUNICATION LINKS 审中-公开
    具有集成声音通信链路的集成电路

    公开(公告)号:WO2014014968A1

    公开(公告)日:2014-01-23

    申请号:PCT/US2013/050772

    申请日:2013-07-16

    CPC classification number: B06B1/0292 B06B1/0622 H04B11/00 H04R17/00

    Abstract: Methods, devices and systems are disclosed for implementing ultrasonic communications in an integrated circuit. In one aspect, the disclosed technology integrates piezoelectric and electrostatic actuator arrays into IC chips to form sonar arrays that transmit from one location in chip to another, which can allows for tunable sonic communication links between any two points. For example, the sonar elements can also be used to transmit signals from one chip to another through a common substrate, while making use of the frequency- selective nature of acoustic transducers and waveguides to communicate to multiple receivers over different frequency bands at the same time, e.g., via frequency division multiplexing.

    Abstract translation: 公开了用于在集成电路中实现超声波通信的方法,装置和系统。 在一个方面,所公开的技术将压电和静电致动器阵列集成到IC芯片中,以形成从芯片中的一个位置传输到另一个的声纳阵列,这可以允许在任何两个点之间的可调音频通信链路。 例如,声纳元件也可用于通过公共衬底将信号从一个芯片传输到另一个芯片,同时利用声换能器和波导的频率选择性质同时在不同频带上与多个接收器通信 ,例如通过频分复用。

    ACOUSTIC SENSING SYSTEMS, DEVICES AND METHODS

    公开(公告)号:WO2019152961A1

    公开(公告)日:2019-08-08

    申请号:PCT/US2019/016564

    申请日:2019-02-04

    Abstract: Disclosed are devices, systems and methods for touch, force and/or thermal sensing by an ultrasonic transceiver chip. In some aspects, an ultrasonic transceiver sensor device includes a semiconductor substrate; a CMOS layer attached to the substrate; an array of piezoelectric transducers coupled to the CMOS layer to generate ultrasonic pulses; and a contact layer attached to the substrate on a side opposite the substrate for providing a surface for contact with an object, where an ultrasonic pulse generated by a piezoelectric transducer propagates through the substrate and the contact layer, such that when the object is in contact with the surface of the contact layer, a reflected ultrasonic pulse is produced and propagates through the contact layer and the substrate to be received at the array of piezoelectric transducers, and the CMOS layer receive and process outputs from the piezoelectric transducers produced in response to the received reflected ultrasonic pulses.

    PIEZOELECTRIC AND LOGIC INTEGRATED DELAY LINE MEMORY
    3.
    发明申请
    PIEZOELECTRIC AND LOGIC INTEGRATED DELAY LINE MEMORY 审中-公开
    压电和逻辑集成延迟线存储器

    公开(公告)号:WO2015138058A2

    公开(公告)日:2015-09-17

    申请号:PCT/US2015/014324

    申请日:2015-02-03

    Abstract: Delay line memory device, systems and methods are disclosed. In one aspect, a delay line memory device includes a substrate; an electronic unit disposed on the substrate and operable to receive, amplify, and/or synchronize data signals into a bit stream to be transmitted as acoustic pulses carrying data stored in the delay line memory device; a first and a second piezoelectric transducer disposed on the substrate and in communication with the electronic unit, in which the first piezoelectric transducer is operable to transmit the data signals to the acoustic pulses that carry the data through the bulk of the substrate, and the second piezoelectric transducer is operable to transduce the received acoustic pulses to intermediate electrical signals containing the data, which are transferred to the electronic unit via an electrical interconnect to cause refresh of the data in the delay line memory device.

    Abstract translation: 延迟线存储器件,系统和方法被公开。 一方面,延迟线存储器件包括衬底; 电子单元,其设置在所述基板上并且可操作以将数据信号接收,放大和/或同步到作为携带存储在所述延迟线存储器装置中的数据的声脉冲发送的比特流; 第一和第二压电换能器,其设置在所述基板上并与所述电子单元连通,其中所述第一压电换能器可操作以将所述数据信号传送到通过所述基板的所述主体承载所述数据的声脉冲, 压电传感器可操作以将接收到的声脉冲转换成包含数据的中间电信号,其经由电互连传送到电子单元以引起延迟线存储器件中的数据刷新。

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