BIDIRECTIONAL BUS REPEATER
    1.
    发明申请
    BIDIRECTIONAL BUS REPEATER 审中-公开
    双向总线代理

    公开(公告)号:WO1993009601A1

    公开(公告)日:1993-05-13

    申请号:PCT/US1992009285

    申请日:1992-10-29

    CPC classification number: H03K5/026

    Abstract: A bidirectional bus repeater (10) includes two unidirectional bus repeaters (11, 13) connected for retransmitting signals in opposite directions between two buses (12, 14). When an external bus driver pulls either bus low, one of the unidirectional bus repeaters pulls the other bus low. When the external bus driver allows the bus to rise to the high logic level, the unidirectional bus repeater temporarily supplies a high charging current to the other bus to quickly pull it up. Each unidirectional bus repeater (11, 13) also generates signals indicating when it is actively pulling its output bus up or down and the indicating signals inhibit one unidirectional bus repeater from actively driving its output when the other unidirectional bus repeater is actively driving its output.

    SAMPLING BUFFER FOR FIELD PROGRAMMABLE INTERCONNECT DEVICE
    2.
    发明申请
    SAMPLING BUFFER FOR FIELD PROGRAMMABLE INTERCONNECT DEVICE 审中-公开
    用于现场可编程互连器件的采样缓冲器

    公开(公告)号:WO1993009503A1

    公开(公告)日:1993-05-13

    申请号:PCT/US1992009292

    申请日:1992-10-29

    CPC classification number: G06F13/4004 H03K19/017581 H03K19/01759

    Abstract: A bi-directional buffer (94) includes first (100) and second (102) unidirectional buffers connected for retransmitting signals in opposite directions between first and second buses. When an external bus driver pulls the first bus low, the first unidirectional buffer (100) pulls the second bus low and generates a signal inhibiting the second unidirectional buffer from actively driving the first bus. When the external bus driver allows the first bus to return to the high logic level, the first unidirectional buffer (100) temporarily supplies a high charging current to the second bus to quickly pull it up. Similarly, when an external bus driver pulls the second bus low, the second unidirectional buffer (102) pulls the first bus low and generates a signal inhibiting the first unidirectional buffer from actively driving second bus. When the external bus driver allows the second bus to return to the high logic level, the second buffer (102) temporarily supplies a high charging current to the first bus to quickly pull it up.

    Abstract translation: 双向缓冲器(94)包括连接用于在第一和第二总线之间以相反方向重新发送信号的第一(100)和第二(102)单向缓冲器。 当外部总线驱动器将第一总线拉低时,第一单向缓冲器(100)将第二总线拉低,并产生禁止第二单向缓冲器主动驱动第一总线的信号。 当外部总线驱动器允许第一总线返回到高逻辑电平时,第一单向缓冲器(100)临时向第二总线提供高充电电流以快速将其拉起。 类似地,当外部总线驱动器将第二总线拉低时,第二单向缓冲器(102)将第一总线拉低,并产生禁止第一单向缓冲器主动驱动第二总线的信号。 当外部总线驱动器允许第二总线返回到高逻辑电平时,第二缓冲器(102)临时向第一总线提供高充电电流以将其快速拉起。

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