公开(公告)号：WO2015148003A1

公开(公告)日：2015-10-01

申请号：PCT/US2015/015661

申请日：2015-02-12

Applicant: INTEL CORPORATION

Inventor： KIL, Jonggab

IPC: H03L7/081 ,  H03K5/13

CPC classification number: H04L7/0012 ,  H04L7/033 ,  H04L7/0331 ,  H04L25/14

Abstract: Described is an apparatus which comprises: a comparator unit to receive at least three data signals with respective clock signals embedded in the at least three data signals, the comparator unit to provide first, second, and third clock signals; and a delay unit coupled to the comparator unit, the delay unit to receive the first, second and third clock signals to generate delayed versions of the first, second and third clock signals respectively.

Abstract translation: 描述了一种装置，其包括：比较器单元，用于以至少三个数据信号中嵌入的相应时钟信号接收至少三个数据信号，比较器单元提供第一，第二和第三时钟信号; 以及延迟单元，其耦合到所述比较器单元，所述延迟单元接收所述第一，第二和第三时钟信号，以分别产生所述第一，第二和第三时钟信号的延迟版本。

公开(公告)号：WO2016007218A1

公开(公告)日：2016-01-14

申请号：PCT/US2015/030616

申请日：2015-05-13

Applicant: INTEL CORPORATION

Inventor： KIL, Jonggab

IPC: H03K19/0175 ,  H04L25/02

CPC classification number: H04L7/0041 ,  H04L7/0091 ,  H04L25/14 ,  H04L25/49 ,  H04L25/4923

Abstract: Described are apparatuses and methods for reducing channel physical layer (C-PHY) switching jitter. An apparatus may include a pattern dependent delay circuit to detect a switching pattern of at least three data signals on respective wires and adaptively change delays of the at least three data signals based on the switching pattern. The apparatus may further include a transmitter, coupled to the pattern dependent delay circuit, to transmit the at least three data signals.

Abstract translation: 描述了用于减少信道物理层（C-PHY）切换抖动的装置和方法。 装置可以包括模式相关延迟电路，以检测相应线路上的至少三个数据信号的切换模式，并且基于切换模式自适应地改变至少三个数据信号的延迟。 该装置还可以包括耦合到模式相关延迟电路的发送器，以发送至少三个数据信号。