公开(公告)号：WO2017172077A1

公开(公告)日：2017-10-05

申请号：PCT/US2017/017746

申请日：2017-02-14

Applicant: INTEL IP CORPORATION

Inventor： MARKOVIC, Denis ,  HAYES, Mattew ,  YU, Zhibin ,  PU, Tianyan

IPC: H04B7/00

CPC classification number: H04W48/16 ,  H04W48/20 ,  H04W56/0035

Abstract: A communication circuit arrangement may include a cell search circuit configured to compare a detected synchronization sequence of a detected candidate cell with a predetermined reference synchronization sequence to generate a demodulated synchronization sequence including a plurality of samples, determine a phase variance between the plurality of samples of the demodulated synchronization sequence, and compare the phase variance to a detection threshold to classify the detected candidate cell as a real cell or a false cell.

Abstract translation: 通信电路装置可以包括小区搜索电路，其被配置为将检测到的候选小区的检测到的同步序列与预定参考同步序列进行比较以生成包括多个样本的解调同步序列， 解调同步序列的多个样本之间的相位差异，并且将相位差异与检测阈值进行比较以将检测到的候选单元分类为真实单元或假单元。