BIT VECTOR SEARCH INDEX
    1.
    发明申请
    BIT VECTOR SEARCH INDEX 审中-公开
    比特矢量搜索索引

    公开(公告)号:WO2016209931A1

    公开(公告)日:2016-12-29

    申请号:PCT/US2016/038724

    申请日:2016-06-22

    CPC classification number: G06F17/30324 G06F17/30336 G06F17/30619

    Abstract: The technology described herein provides a bit vector search index for a search system. The bit vector search index comprises a data structure for indexing data about terms from a corpus of documents. The data structure includes a number of bit vectors. Each bit vector comprises an array of bits and corresponds to a different set of terms. Bits in the bit vector are used to represent whether at least one document corresponding to the bit includes at least one term from the set of terms corresponding to the bit vector.

    Abstract translation: 本文描述的技术为搜索系统提供了位向量搜索索引。 位向量搜索索引包括用于索引关于来自文档语料库的术语的数据的数据结构。 数据结构包括多个位向量。 每个比特向量包括比特阵列并且对应于不同的术语集合。 比特向量中的比特用于表示对应于该比特的至少一个文档是否包含对应于该比特向量的一组术语中的至少一个项。

    COMPUTER MEMORY CONTENT MOVEMENT
    2.
    发明申请

    公开(公告)号:WO2019094260A1

    公开(公告)日:2019-05-16

    申请号:PCT/US2018/058819

    申请日:2018-11-02

    Abstract: In some examples, computer memory content movement may include ascertaining a request associated with content of computer memory. Based on a determination that the request is directed to the content that is to be moved from a source of the computer memory to a destination of the computer memory, a determination may be made as to whether the content is at the source, is in a process of being moved from the source to the destination, or has been moved from the source to the destination. Based on a determination that the content is at the source, the request may be performed using the source. Based on a determination that the content is in the process of being moved, the request may be performed using the source. Further, based on a determination that the content has been moved, the request may be performed using the destination.

    PERFORMANCE COUNTERS FOR COMPUTER MEMORY
    3.
    发明申请

    公开(公告)号:WO2019094259A3

    公开(公告)日:2019-05-16

    申请号:PCT/US2018/058818

    申请日:2018-11-02

    Abstract: In some examples, performance counters for computer memory may include ascertaining a request associated with a memory address range of computer memory. The memory address range may be assigned to a specified performance tier of a plurality of specified performance tiers. A performance value associated with a performance attribute of the memory address range may be ascertained, and a weight value may be determined. Based on the ascertained request and the weight value, a count value associated with a counter associated with the memory address range may be incremented. A determination may be made as to whether the memory address range is to be assigned to a different specified performance tier of the plurality of specified performance tiers. Based on a determination that the memory address range is to be assigned to the different specified performance tier, the memory address range may be assigned to the specified different performance tier.

    PERFORMANCE COUNTERS FOR COMPUTER MEMORY
    4.
    发明申请

    公开(公告)号:WO2019094259A2

    公开(公告)日:2019-05-16

    申请号:PCT/US2018/058818

    申请日:2018-11-02

    Abstract: In some examples, performance counters for computer memory may include ascertaining a request associated with a memory address range of computer memory. The memory address range may be assigned to a specified performance tier of a plurality of specified performance tiers. A performance value associated with a performance attribute of the memory address range may be ascertained, and a weight value may be determined. Based on the ascertained request and the weight value, a count value associated with a counter associated with the memory address range may be incremented. A determination may be made as to whether the memory address range is to be assigned to a different specified performance tier of the plurality of specified performance tiers. Based on a determination that the memory address range is to be assigned to the different specified performance tier, the memory address range may be assigned to the specified different performance tier.

    HARDWARE-BASED MEMORY COMPRESSION
    5.
    发明申请

    公开(公告)号:WO2021000263A1

    公开(公告)日:2021-01-07

    申请号:PCT/CN2019/094419

    申请日:2019-07-02

    Abstract: A compressed memory is divided into a plurality of segments, each segment is divided into a plurality of sub-segments, and each sub-segment in an uncompressed data space is compressed into block (s) in a compressed data space. Upon a read request to a sub-segment in a segment in compressed memory is received, the corresponding entry is firstly determined based on a first level address mapping between the sub-segment and the entry, and then the corresponding block (s) is determined based on a second level address mapping between the entry and the block (s). By use of two-level address mappings, the size of entry can be reduced, thereby achieving low metadata overhead. Moreover, the proposed data layout for compressed memory.

    KEY-VALUE STORAGE SYSTEM INCLUDING A RESOURCE-EFFICIENT INDEX
    6.
    发明申请
    KEY-VALUE STORAGE SYSTEM INCLUDING A RESOURCE-EFFICIENT INDEX 审中-公开
    包括资源效率指数的关键值存储系统

    公开(公告)号:WO2018013384A1

    公开(公告)日:2018-01-18

    申请号:PCT/US2017/040627

    申请日:2017-07-04

    Abstract: A key-value storage system is described herein for interacting with key-value entries in a content store using a resource-efficient index. The index provides a data structure that includes a plurality of hash buckets. Each hash bucket includes a linked list of hash bucket units. The key-value storage system stores hash entries in each linked list of hash bucket units in a distributed manner between an in-memory index store and a secondary index store, based on time of their creation. The key-value storage system is further configured to store hash entries in a particular collection of linked hash bucket units in a chronological order to reflect time of their creation. The index further includes various tunable parameters that affect the performance of the key-value storage system.

    Abstract translation: 这里描述了用于使用资源高效索引与内容存储中的键值条目进行交互的键值存储系统。 该索引提供了包括多个散列桶的数据结构。 每个散列桶包含一个哈希桶单元的链表。 键值存储系统基于它们的创建时间,在散列式存储索引存储和二级索引存储之间以散布方式将散列条目存储在散列存储单元的每个链接列表中。 键值存储系统还被配置为按照时间顺序将哈希条目存储在链接的哈希桶单元的特定集合中以反映它们的创建时间。 索引进一步包括影响键值存储系统性能的各种可调参数。

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