公开(公告)号：WO2021141483A1

公开(公告)日：2021-07-15

申请号：PCT/MY2020/050180

申请日：2020-11-30

Applicant: MIMOS BERHAD

Inventor： LEONG SON, Wee ,  KIEN SIENG, Lam ,  MOHD FAIZAL, Abdul Khalek ,  MUHAMAD KHAIROL, Ab Rani

IPC: H03M1/10 ,  H03M1/46

Abstract: The present invention provides a system for correcting linearity error of a data acquisition system particularly for a successive approximation analog-to-digital converter (SAR-ADC); a calibrator of the system comprising: a first and second counter adapted to count a number of low "0" from the comparator, in which the counting ceases when the at least one counter reaches a simple majority; a de-multiplexer adapted to generate signals based on the comparator's feedback; a state machine adapted to control a sampling phase, calibration phase and comparison phase; a multiplexer select adapted to control an external multiplexer; a tunable capacitor counter which is a third counter, and configured for decrements or increments after the first counter or second counter reaches majority decision and produces signals to reset the first counter and second counter; and; a switch decoder adapted for converting the tunable capacitor counter feedback to match with that of the tuning capacitor.