公开(公告)号：WO2003017126A1

公开(公告)日：2003-02-27

申请号：PCT/US2002/025530

申请日：2002-08-09

Applicant: NEWISYS, INC.

Inventor： OEHLER, Richard, R. ,  KULPA, William, G.

IPC: G06F15/173

CPC classification number: G06F9/5061

Abstract: A computer system is described having a plurality of resources which includes a plurality of processors, a distributed point-to-point transmission infrastructure for interconnecting the plurality of processors, and a partitioning processor for configuring the plurality of resources into at least one partition. Each partition comprises a subset of the plurality of resources. The partitioning processor is operable to configure the resources by enabling at least one link between at least one of the plurality of processors and at least one other one of the plurality of processors according to a previously specified partitioning schema. The link(s) so enabled corresponds to a portion of the point-to-point transmission infrastructure.

Abstract translation: 描述了具有多个资源的计算机系统，其包括多个处理器，用于互连多个处理器的分布式点对点传输基础设施，以及用于将多个资源配置为至少一个分区的分区处理器。 每个分区包括多个资源的子集。 分区处理器可操作以通过根据先前指定的分区模式使多个处理器中的至少一个处理器和至少另一个其他处理器之间的至少一个链路能够实现来配置资源。 所启用的链路对应于点对点传输基础设施的一部分。

公开(公告)号：WO2004070619A2

公开(公告)日：2004-08-19

申请号：PCT/US2003/034834

申请日：2003-10-30

Applicant: NEWISYS, INC.

Inventor： ZEITLER, Carl ,  GLASCO, David, B. ,  RECORD, Les ,  OEHLER, Richard, R. ,  KULPA, William, G. ,  PRASADH, Guru ,  KOTA, Rajesh

IPC: G06F15/16

CPC classification number: G06F1/189 ,  G06F1/24

Abstract: Methods and apparatus are provided for improving the distribution of system management signals within a computer system complex. Mechanisms are provided for transmission both within a box and between computer system boxes. Local routing tables and general routing tables allow the distribution of system management signals precisely to resources associated with particular partitions. Signals are sequenced to put resources associated with one or more boxes in the appropriate states. The distribution of signals between boxes in the computer system complex can be accomplished with the use of a dedicated wire.

Abstract translation: 提供了用于改善计算机系统综合体内的系统管理信号的分布的方法和装置。 提供了在盒子内和计算机系统盒之间传输的机构。 本地路由表和一般路由表允许将系统管理信号精确地分配给与特定分区相关联的资源。 对信号进行排序，将与一个或多个框相关联的资源置于适当的状态。 可以使用专用线来实现计算机系统中的盒子之间的信号分配。

公开(公告)号：WO2004046946A2

公开(公告)日：2004-06-03

申请号：PCT/US2003/034687

申请日：2003-10-30

Applicant: NEWISYS, INC.

Inventor： ZEITLER, Carl ,  GLASCO, David, Brian ,  RECORD, Les ,  OEHLER, Richard, R. ,  KULPA, William, G. ,  PRASADH, Guru ,  KOTA, Rajesh

IPC: G06F15/16

CPC classification number: G06F1/324 ,  G06F1/24 ,  G06F1/3203 ,  G06F1/3287 ,  G06F1/3296 ,  Y02D10/126 ,  Y02D10/171 ,  Y02D10/172

Abstract: Methods and apparatus are provided for improving the distribution of system management signals within a computer system complex. Mechanisms are provided for transmission both within a box and between computer system boxes. Local routing tables and general routing tables allow the distribution of system management signals precisely to resources associated with particular partitions. Signals are sequenced to put resources associated with one or more boxes in the appropriate states. The distribution of signals between boxes in the computer system complex can be accomplished without the use of a dedicated wire.

Abstract translation: 提供了用于改善系统管理信号在计算机系统组合系统中的分布的方法和设备。 在盒子内和计算机系统盒子之间提供传输机制。 本地路由表和通用路由表允许精确地将系统管理信号分配给与特定分区关联的资源。 信号按顺序排列，将与一个或多个盒子相关的资源置于适当的状态。 计算机系统中的信箱之间的信号分配可以在不使用专用线的情况下完成。

公开(公告)号：WO2004092875A3

公开(公告)日：2004-10-28

申请号：PCT/US2004/010731

申请日：2004-04-08

Applicant: NEWISYS, INC. ,  ZEITLER, Carl ,  GLASCO, David, B. ,  KOTA, Rajesh ,  PRASADH, Guru ,  OEHLER, Richard, R. ,  EDRICH, David, S.

Inventor： ZEITLER, Carl ,  GLASCO, David, B. ,  KOTA, Rajesh ,  PRASADH, Guru ,  OEHLER, Richard, R. ,  EDRICH, David, S.

IPC: G06F12/00

Abstract: A computer system is described having a plurality of processing nodes interconnected by a first point-to-point architecture, and a system memory including a plurality of portions each of which is associated with one of the processing nodes. Each processing node includes a processor, and a memory controller for controlling acc4ess to the associated portion of the system memory, and may contain a host bridge for facilitating communication with a plurality of I/O devices. The first point-to-point architecture is operable to facilitate first transactions between the processors and the system memory. The computer system further includes at least one I/O controller and a second point-to-point architecture independent of the first point-to-point architecture and interconnecting the I/O controller and the host bridges. The at least one I/O controller is operable to facilitate second transactions between the I/O devices and the system memory via the second point-to-point architecture.