公开(公告)号：WO2023018882A1

公开(公告)日：2023-02-16

申请号：PCT/US2022/040078

申请日：2022-08-11

申请人： RAYTHEON COMPANY

发明人： GAMALSKI, Andrew D. ,  MICOVIC, Miroslav ,  HERRICK, Katherine J.

IPC分类号： H03F3/195 ,  H03F3/24 ,  H03F3/347

摘要： A dual-band MMIC power amplifier and method of operation to amplify frequencies in different RF bands while only requiring input drive signals at frequencies f1 and f2 in a narrow RF input band. This allows for the use of a conventional narrowband RF IC to drive the MMIC and does not require additional circuitry (e.g., a LO) on the MMIC power amplifier. The matching network of the last amplification stage is modified to pass f1 (or a harmonic thereof), reflect f2, pass a Pth harmonic of f2 where P is 2 or 3 and to reflect any unused 1st, 2nd or 3rd order harmonics of f1 or f2 back into the MMIC. In response to an input signal at f1, the MMIC power amplifier amplifies and outputs a signal at f1 (or a harmonic thereof). In response to an input signal at f2 at sufficient RF power, the last amplification stage operates in compression such that the MMIC power amplifier generates the harmonics, selects the Pth harmonic and outputs an amplified RF signal at P*f2.

公开(公告)号：WO2022060405A1

公开(公告)日：2022-03-24

申请号：PCT/US2021/019153

申请日：2021-02-23

申请人： RAYTHEON COMPANY

发明人： MICOVIC, Miroslav

IPC分类号： H01Q1/02 ,  H01Q1/22 ,  H01Q21/00 ,  H01Q21/06

摘要： Methods and apparatus to provide a rectangular N x M antenna element subarray block having opposed first and second major surfaces and first and second ends at opposite ends of the block, wherein the antenna elements are located at the first end of the block. A coldplate between the first inlet connector and the first outlet connector enables flow of the liquid coolant from the first inlet connector to the first outlet connector. The first inlet connector is configured to enable flow of the liquid coolant into the system in a direction that is normal to the first major surface of the block.

公开(公告)号：WO2023034520A1

公开(公告)日：2023-03-09

申请号：PCT/US2022/042371

申请日：2022-09-01

申请人： RAYTHEON COMPANY

发明人： MICOVIC, Miroslav ,  BAKER, Karen Kaneko ,  CARBONNEAU, Christopher ,  HERRICK, Katherine J. ,  CLEMENT, Teresa J. ,  LAROCHE, Jeffrey R.

IPC分类号： H04B1/036 ,  H01L23/473 ,  H01Q1/02 ,  H01L23/46 ,  H01Q21/06 ,  H01Q3/26 ,  H01Q21/00

摘要： An Array Core Block for an AESA includes a stack of 2*M alternating N- channel RFIC and MMIC Power Amplifier wafers bonded together by a wafer¬ scale direct bond hybrid (DBH) interconnect process. This process forms both metal-to-metal and dielectric hydrogen bonds between bonding surfaces to seal the wafer stack. Each array core block includes an array of through substrate metal vias to distribute DC bias, LO and information signals. Each array core block also includes a cooling system including micro-channels formed on a backside of at least one of the chips in each bonded pair and through substrate via holes formed through the stack that operatively couple the micro-channels for all of the bonded pairs to receive and circulate a fluid through the micro-channels and through substrate via holes to cool the RFIC and MMIC Power Amplifier chips and to extract the heated fluid.