STACKED INTEGRATED CIRCUIT DIES AND INTERCONNECT STRUCTURES

    公开(公告)号:WO2022266560A1

    公开(公告)日:2022-12-22

    申请号:PCT/US2022/071946

    申请日:2022-04-27

    Abstract: An integrated circuit package (34, 34', 34'') may be implemented by stacked first, second, and third integrated circuit dies (40, 50, 60). The first and second dies (40, 50) may be bonded to each other using corresponding inter-die connection structures (74-1, 84-1) at respective interfacial surfaces facing the other die. The second die (50) may also include a metal layer (84-2) for connecting to the third die (60) at its interfacial surface with the first die (40). The metal layer (84-2) may be connected to a corresponding inter-die connection structure (64) on the side of the third die (60) facing the second die (50) through a conductive through-substrate via (84-2) and an additional metal layer (102) in a redistribution layer (96) between the second and third dies (50, 60). The third die (60) may have a different lateral outline than the second die (50).

    CIRCUITRY FOR BIASING LIGHT SHIELDING STRUCTURES AND DEEP TRENCH ISOLATION STRUCTURES
    2.
    发明申请
    CIRCUITRY FOR BIASING LIGHT SHIELDING STRUCTURES AND DEEP TRENCH ISOLATION STRUCTURES 审中-公开
    偏光屏蔽结构和深层隔离结构的电路

    公开(公告)号:WO2016064811A1

    公开(公告)日:2016-04-28

    申请号:PCT/US2015/056371

    申请日:2015-10-20

    Abstract: An imaging system (100) may include an image sensor die (102) stacked on top of a digital signal processor (DSP) die (104). Through-oxide vias (TOVs) (128) may be formed in the image sensor die (102) and may extend at least partially into in the DSP die (104) to facilitate communications between the image sensor die (102) and the DSP die (104). The image sensor die (102) may include light shielding structures (126) for preventing reference photodiodes (116') in the image sensor die (102) from receiving light and in-pixel grid structures (200) for preventing cross-talk between adjacent pixels (116). The light shielding structure (126) may receive a desired biasing voltage through a corresponding TOV (128), an integral plug structure (190), and/or a connection that makes contact directly with a polysilicon gate (192). The in-pixel grid (200) may have a peripheral contact (200') that receives the desired biasing voltage through a light shield (210), a conductive strap (210), a TOV (300), and/or an aluminum pad (450).

    Abstract translation: 成像系统(100)可以包括堆叠在数字信号处理器(DSP)管芯(104)顶部的图像传感器管芯(102)。 可以在图像传感器管芯(102)中形成贯通氧化物通孔(TOV)(128),并且可以至少部分地延伸到DSP管芯(104)中,以便于图像传感器管芯(102)和DSP管芯 (104)。 图像传感器管芯(102)可以包括用于防止图像传感器管芯(102)中的参考光电二极管(116')接收光和像素内栅格结构(200)的遮光结构(126),以防止相邻 像素(116)。 遮光结构(126)可以通过相应的TOV(128),一体式插塞结构(190)和/或与多晶硅栅极(192)直接接触的连接来接收期望的偏置电压。 像素内栅格(200)可以具有通过光屏蔽(210),导电带(210),TOV(300)和/或铝垫(210)接收期望的偏置电压的外围接触件(200' (450)。

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