公开(公告)号：WO1996021277A1

公开(公告)日：1996-07-11

申请号：PCT/IB1996000217

申请日：1996-01-05

Applicant: THESEUS RESEARCH, INC.

Inventor： THESEUS RESEARCH, INC. ,  FANT, Karl, M. ,  SOBELMAN, Gerald, E.

IPC: H03K19/017

CPC classification number: G06F7/502 ,  G06F11/085 ,  G06F2207/4822 ,  H03K19/0813 ,  H03K19/23 ,  H03M5/02 ,  H03M5/16

Abstract: A NULL convention threshold gate (921) receives a plurality of inputs (X1, X2, ...Xn), each having an asserted state and a NULL state. The threshold gate switches its output (Z) to an asserted state when the number of asserted inputs exceeds a threshold number. The threshold gate switches its output to the NULL state only after all inputs have returned to NULL. Signal states may be implemented as distinct current levels.

Abstract translation: 空惯性阈值门（921）接收多个具有断言状态和空状态的输入（X1，X2，... Xn）。 当有效输入的数量超过阈值时，门限门将其输出（Z）切换到一个置位状态。 只有在所有输入返回到NULL之后，门槛值将其输出切换到NULL状态。 信号状态可以被实现为不同的电流电平。

公开(公告)号：WO2006105164A2

公开(公告)日：2006-10-05

申请号：PCT/US2006/011416

申请日：2006-03-29

Applicant: THESEUS RESEARCH, INC. ,  FANT, Karl, M.

Inventor： FANT, Karl, M.

IPC: G11C19/08

CPC classification number: G11C19/00 ,  G06F15/8023 ,  H03K19/17704

Abstract: Disclosed is an array of programmable data-processing cells configured as a plurality of cross-connected pipelines. An apparatus includes cells capable of performing data-processing functions selectable by a presented instruction. A first set of cells includes an input cell, an output cell, and a series of at least one interior cell providing an acyclic data processing path from the input cell to the output cell. Additional cells are similarly configured. Memory presents configuration instructions to cells in response to a configuration code. Data advances through ranks of the cells. The configuration code advances to memory associated with a rank in tandem with the data.

Abstract translation: 公开了一种被配置为多个交叉连接管线的可编程数据处理单元阵列。 一种装置包括能够执行由所呈现的指令可选择的数据处理功能的单元。 第一组单元包括输入单元，输出单元和一系列至少一个内部单元，其提供从输入单元到输出单元的非循环数据处理路径。 附加的单元格被类似地配置。 存储器响应于配置代码向单元格呈现配置指令。 数据通过细胞排列。 配置代码与数据一起前进到与等级相关联的存储器。

公开(公告)号：WO1992021083A1

公开(公告)日：1992-11-26

申请号：PCT/US1992004132

申请日：1992-05-15

Applicant: THESEUS RESEARCH INC.

Inventor： THESEUS RESEARCH INC. ,  FANT, Karl, M. ,  BRANDT, Scott, A.

IPC: G06F01/00

CPC classification number: G06F7/502 ,  G06F7/00 ,  G06F7/5052 ,  G06F11/085 ,  G06F2207/4822 ,  H03K19/0813 ,  H03K19/096 ,  H03K19/23 ,  H03M5/02 ,  H03M5/16

Abstract: An information processing system comprising at least one information processing unit (A, B). The information processing unit has at least one information processing member which resolves allowed values. Allowed values include at least one data value and at least one non-data value. At least one non-data value is a null value. The system further comprises a plurality of information transmission elements (OA, NA) for transmitting values to and from the information processing unit (A) and the information processing member.

Abstract translation: 一种信息处理系统，包括至少一个信息处理单元（A，B）。 信息处理单元具有至少一个解决允许值的信息处理部件。 允许的值包括至少一个数据值和至少一个非数据值。 至少一个非数据值是空值。 该系统还包括用于向信息处理单元（A）和信息处理单元（A）发送值的多个信息传输元件（OA，NA）。