公开(公告)号：WO2014144733A1

公开(公告)日：2014-09-18

申请号：PCT/US2014/029266

申请日：2014-03-14

Applicant: VOLTERRA SEMICONDUCTOR CORPORATION

Inventor： ZUNIGA, Marco A. ,  CHIANG, Chiteh ,  LU, Yang ,  FATEMIZADEH, Badredin ,  PAUL, Amit ,  RUAN, Jun ,  CASSELLA, Craig

IPC: G05F3/02

CPC classification number: H02M1/088 ,  H02M1/38 ,  H02M3/158 ,  H02M3/1588 ,  Y02B70/1466

Abstract: A voltage regulator has an input terminal and a ground terminal. The voltage regulator includes a high- side device, a low side device, and a controller. The high- side device is coupled between the input terminal and an intermediate terminal. The high- side device includes first and second transistors each coupled between the input terminal and the intermediate terminal, such that the first transistor controls a drain-source switching voltage of the second transistor. The low- side device is coupled between the intermediate terminal and the ground terminal. The controller drives the high-side and low-side devices to alternately couple the intermediate terminal to the input terminal and the ground terminal.

Abstract translation: 电压调节器具有输入端子和接地端子。 电压调节器包括一个高边装置，一个低边装置和一个控制器。 高端设备耦合在输入端子和中间端子之间。 高侧器件包括第一和第二晶体管，每个晶体管分别耦合在输入端和中间端之间，使得第一晶体管控制第二晶体管的漏极 - 源极开关电压。 低端设备耦合在中间端子和接地端子之间。 控制器驱动高侧和低端设备，将中间端子交替耦合到输入端子和接地端子。

公开(公告)号：WO2013023094A3

公开(公告)日：2013-02-14

申请号：PCT/US2012/050199

申请日：2012-08-09

Applicant: VOLTERRA SEMICONDUCTOR CORPORATION ,  ZUNIGA, Marco A. ,  LU, Yang ,  FATEMIZADEH, Bahram ,  PRASAD, Jayasimha ,  PAUL, Amit ,  XIA, John ,  RUAN, Jun

Inventor： ZUNIGA, Marco A. ,  LU, Yang ,  FATEMIZADEH, Bahram ,  PRASAD, Jayasimha ,  PAUL, Amit ,  XIA, John ,  RUAN, Jun

IPC: H01L29/78 ,  H01L21/336

Abstract: The present application features a transistor that includes an n-well region implanted into a surface of a substrate, and a trench in the n-well region. The trench has a first side and an opposing second side, and extends from the surface to a first depth. The trench includes a gate of conductive material in the trench, and dielectric material filling a volume of the trench not filled by the conductive material. The transistor also includes a p-type material in a first region extending from a second depth to a third depth in the n-well region, wherein each of the second depth and the third depth is greater than the first depth. The transistor further includes a source region and a drain region. The source region is on the first side of the trench and includes a p-body region extending from the surface to the first region, an n+ region and a p+ region implanted in the p-body region. The drain region is on the second side of the trench and includes an n+ region.