公开(公告)号：WO2021221772A1

公开(公告)日：2021-11-04

申请号：PCT/US2021/019828

申请日：2021-02-26

申请人： WESTERN DIGITAL TECHNOLOGIES, INC.

发明人： SHARMA, Avinash ,  MUKHOPADHYAY, Rishi Gautam ,  SHARMA, Ravi ,  MORE, Chetan Shivaji

IPC分类号： G06F12/1009 ,  G06F12/0866 ,  G06F2212/1021 ,  G06F2212/50 ,  G06F2212/7201

摘要： Aspects of a storage device including a cache having a logical-to-physical (L2P) mapping table, a scratchpad buffer, and a controller are provided to optimize cache storage of L2P mapping information. A controller receives a random pattern of logical addresses and identifies each logical address within one of multiple probability distributions. Based on a frequency of occurrence of each logical address, the controller stores a control page including the logical address within either a partition of the L2P mapping table which is associated with the corresponding probability distribution, or in the scratchpad buffer. The frequency of occurrence of each logical address is determined based on whether the logical address is within one or more standard deviations from a mean of each probability distribution. As a result, frequently occurring control pages are stored in cache, while infrequently occurring control pages are stored in the scratchpad buffer.