公开(公告)号：WO2023069813A1

公开(公告)日：2023-04-27

申请号：PCT/US2022/076486

申请日：2022-09-15

Applicant: QUALCOMM INCORPORATED

Inventor： PICK, Jacob ,  TOUBOUL, Assaf ,  LANDIS, Shay ,  SHAKED, Shlomit ,  LEVITSKY, Michael ,  PAZ, Daniel

IPC: H04L1/00 ,  H04L25/06 ,  H04L1/18 ,  H04L1/1607

Abstract: Various aspects of the present disclosure generally relate to wireless communication. In some aspects, a user equipment (UE) may receive a transport block (TB), the receiving the TB including performing log likelihood ratio (LLR) calculations on one or more parts of the TB based at least in part on a determination that the TB is likely to fail a cyclic redundancy check (CRC). The UE may transmit an indication of the one or more parts of the TB for which the UE performed LLR calculations. Numerous other aspects are described.

公开(公告)号：WO2023018460A1

公开(公告)日：2023-02-16

申请号：PCT/US2022/029897

申请日：2022-05-18

Applicant: XILINX, INC.

Inventor： ZHANG, Wenfeng ,  UPADHYAYA, Parag

IPC: H03K5/24 ,  H04L25/06

Abstract: Receiver circuitry (122) for a communication system includes signal processing circuitry (213), voltage digital-to-analog converter (DAC) circuitry (229), and slicer circuitry (218, 220). The signal processing circuitry receives a data signal (130) and generate a processed data signal. The voltage DAC circuitry generates a first threshold reference voltage (235). The slicer circuitry is coupled to an output of the signal processing circuitry. The slicer circuitry includes a capture flip-flop (CapFF) circuit that receives the processed data signal and the first threshold reference voltage (235). The CapFF circuit further generates a first data signal (218out, 220out). The first CapFF circuit includes a first offset compensation circuit (223 or 225) that adjusts a parasitic capacitance of the first CapFF circuit.

公开(公告)号：WO2021010807A1

公开(公告)日：2021-01-21

申请号：PCT/KR2020/009545

申请日：2020-07-20

Applicant: SAMSUNG ELECTRONICS CO., LTD.

Inventor： DAO, Manh Tuan ,  AOKI, Yuichi ,  KIM, Yonghoon

IPC: H04L25/06 ,  H04L25/02 ,  H04L25/03

Abstract: The disclosure relates to a communication method and system for converging a 5th-Generation (5G) communication system for supporting higher data rates beyond a 4th-Generation (4G) system with a technology for Internet of Things (IoT). A method of operating an electronic device in a wireless communication system is provided. The method includes inputting training signals into a first loopback route and a second loopback route, determining a loopback gain and a loopback phase, based on a first training signal passing through the first loopback route and a second training signal passing through the second loopback route, determining a frequency domain compensation filter, based on the loopback gain and the loopback phase, determining an FIR filter and a DC offset, based on the frequency domain compensation filter, and compensating for a transmission signal and a reception signal, based on the FIR filter and the DC offset.

公开(公告)号：WO2020191290A1

公开(公告)日：2020-09-24

申请号：PCT/US2020/023851

申请日：2020-03-20

Applicant: CYPRESS SEMICONDUCTOR CORPORATION

Inventor： SHLOMO, Oren

IPC: H03K5/08 ,  H04L25/06

Abstract: A differential-slope-limiting-switch and method are provided. Generally, the switch includes a first transistor having a first source-drain (SD) and well coupled to a first port of the switch, a gate, and a second SD, and a second transistor having a first SD and well coupled to a second port, a gate, and a second SD coupled to the second SD of the first transistor. A selector-circuit couples the gate of the first transistor to a first current-source when a signal to close the switch is received, and to the first port when it is not received. A second selector-circuit couples the gate of the second transistor to a second current-source when the signal is received, or to the second port. First and second feedback-capacitors couple each gate to the port on opposite sides of the switch and with the current-sources limit a slope of voltage transitions across the closed switch.

公开(公告)号：WO2020108792A1

公开(公告)日：2020-06-04

申请号：PCT/EP2019/025359

申请日：2019-10-23

Applicant: SEW-EURODRIVE GMBH & CO. KG

Inventor： SCHAAF, Christian ,  HOFFMANN, Philipp ,  SCHÄFER, Harald

IPC: H04B3/46 ,  H04L1/20 ,  H04L25/06

Abstract: Verfahren zur Datenübertragung über einen insbesondere leitungsgebundenen Datenübertragungskanal und Antriebssystem, wobei ein Sender einen digitalen Datenstrom sendet über den Datenübertragungskanal an einen Empfänger, wobei die Symbole des Datenstroms in einem ersten Takt gesendet werden, wobei der von dem Empfänger empfangene digitale Datenstrom mit einem zweiten Takt insbesondere analog abgetastet wird, wobei der zweite Takt schneller als der erste Takt ist, wobei für jedes Symbol die Summe der Abtastwerte bestimmt wird und für jedes Symbol ein Ergebniswert bestimmt wird, der HIGH ist, wenn die Summe einen unteren Schwellwert überschreitet und einen oberen Schwellwert unterschreitet, und der ansonsten LOW ist, wobei nach Überschreiten einer vorgegebenen Anzahl von zu zeitlich direkt nacheinander übertragenen Symbolen gehörenden Ergebniswerten, die HIGH sind, Ausgangssignal einen Fehlerzustand anzeigt.

公开(公告)号：WO2020046620A1

公开(公告)日：2020-03-05

申请号：PCT/US2019/047122

申请日：2019-08-20

Applicant: INTEL IP CORPORATION

Inventor： EDER, Franz ,  SCHERB, Ansgar ,  GORI, Silvano ,  MUELLER-WEINFURTNER, Stefan

IPC: H04L25/06

Abstract: According to various embodiments, a communication device is described comprising a throughput determiner configured to determine, for each of a plurality of signal-to-noise ratio measures, a relation between a throughput prediction and a quantization step size, an estimator configured to estimate a distribution of the signal-to-noise ratio measures in a received signal, a weigher configured to determine a weight for each signal-to-noise ratio measure based on the estimated distribution and weigh the throughput predictions based on the determined weights, a quantization controller configured to determine a quantization step size based on a combination of the weighted throughput predictions and a demodulator configured to demodulate the received signal and quantize the demodulated received signal using the quantization step size.

公开(公告)号：WO2020022388A1

公开(公告)日：2020-01-30

申请号：PCT/JP2019/029048

申请日：2019-07-24

Applicant: 日置電機株式会社

Inventor： 柳沢　浩一 ,  池田　大桂 ,  笠井　真 ,  坂井　智春

IPC: H04L25/06 ,  H03K5/003 ,  H04L25/02

Abstract: 【課題】　温度の影響を受けるダイオードを含まずに構成する。　一端部に差分信号Ｖｄ０が入力され他端部が出力部４２ｂに接続されたコンデンサ４２ｃと、一端部がコンデンサ４２ｃの他端部に接続され他端部にターゲット定電圧Ｖｔｇが印加されたインピーダンス素子４２ｄと、ダイオードを含まずにインピーダンス素子４２ｅおよびスイッチ４２ｆの直列回路で構成されて一端部が出力部４２ｂに接続され他端部にターゲット定電圧Ｖｔｇが印加されたスイッチ回路ＳＣと、差分信号Ｖｄ０の交流成分における低電圧期間にスイッチ４２ｆをオン状態に、また交流成分の高電圧期間にスイッチ４２ｆをオフ状態に移行させるスイッチ制御回路ＳＷＣとを備え、差分信号Ｖｄ０を、交流成分のピークピーク電圧と同等のピークピーク電圧で、かつ低電圧期間の電圧がターゲット定電圧Ｖｔｇになるシングルエンド信号Ｖｄに整形して出力部４２ｂから出力する。

公开(公告)号：WO2019219266A1

公开(公告)日：2019-11-21

申请号：PCT/EP2019/056031

申请日：2019-03-11

Applicant: FRAUNHOFER-GESELLSCHAFT ZUR FÖRDERUNG DER ANGEWANDTEN FORSCHUNG E.V.

Inventor： SPEITEL, Martin ,  LANGER, Thomas ,  DETTBARN, Thomas ,  FIERMANN, Christian

IPC: H04J11/00 ,  H04L25/06 ,  H04L27/26 ,  H04L27/38

Abstract: A receiver comprising a receiving path and a spur detector. The receiving path is configured to receive a signal comprising an expected signal portion and a payload portion. The spur detector is configured to analyze the expected signal portion in order to detect an interference overlapping the signal. The knowledge about the detected spurs is used to increase the DAB / OFDM receiver performance.

公开(公告)号：WO2019190551A1

公开(公告)日：2019-10-03

申请号：PCT/US2018/025403

申请日：2018-03-30

Applicant: COVA, Armando ,  KRAUT, Gunther ,  LANGER, Andreas ,  HEPP, Christoph

Inventor： COVA, Armando ,  KRAUT, Gunther ,  LANGER, Andreas ,  HEPP, Christoph

IPC: H04L25/49 ,  H04L25/06

Abstract: An apparatus for a mobile communication device adapted for digital pre-distortion that includes a memory and a processor operatively coupled to the memory of the processor. The processor receives a first input signal and also receives a first output signal from a power amplifier that is based on the first input signal. The processor additionally varies compression applied to a second input signal based on the first output signal of the power amplifier, generates a distortion compensation vector for the second input signal based on the first output signal of the power amplifier, and also varies an input excitation signal supplied to the power amplifier based on the first output signal of the power amplifier.

公开(公告)号：WO2019166718A3

公开(公告)日：2019-09-06

申请号：PCT/FR2019/050409

申请日：2019-02-22

Applicant: CONTINENTAL AUTOMOTIVE FRANCE ,  CONTINENTAL AUTOMOTIVE GMBH

Inventor： BILLY, Stéphane ,  GODET, Sylvain ,  CHEIKH, Mohamed

IPC: B60C23/04 ,  H04L25/06

Abstract: Système de détection du fonctionnement du moteur d'un véhicule automobile muni d'au moins un émetteur de surveillance de la pression de pneumatique comprenant : • un étage basse fréquence (1) comprenant un étage résonant (3) connecté en série à une antenne (2), un étage de traitement (4), un premier commutateur (4a) et un deuxième commutateur (4b), • le premier commutateur (4a) étant relié à au moins deux capacités de sorte à commander la connexion en parallèle d'au moins une desdites capacités, • le deuxième commutateur (4b) étant relié à au moins deux résistances de sorte à commander la connexion en parallèle d'au moins une desdites résistances, • des sorties (A, B) de l'étage basse fréquence (1) disposées en entrée de l'étage de traitement (3) afin de transférer le signal perçu à des moyens de traitement du signal configurés pour comparer le niveau du signal perçu au niveau de seuil prédéterminé.