公开(公告)号：WO2023018506A1

公开(公告)日：2023-02-16

申请号：PCT/US2022/036998

申请日：2022-07-13

Applicant: QUALCOMM INCORPORATED

Inventor： SAHOTA, Gurkanwal Singh ,  TASIC, Aleksandar Miodrag

IPC: H03H11/12 ,  H03H11/42

Abstract: An aspect relates to a filter or a first gyrator including a first set of cascaded inverters, and a first set of one or more passive devices coupled to the first set of cascaded inverters. Another aspect relates to a method including applying an input signal to an input of a first one of a set of cascaded inverters coupled to a set of one or more passive devices, and receiving an output signal from the set of cascaded inverters, the output signal being a filtered version of the input signal. Still another aspect relates to a transceiver including a filter with a first set of cascaded inverters, and a first set of one or more passive devices coupled to the first set of cascaded inverters; and a mixer coupled to the filter.

公开(公告)号：WO2022005629A1

公开(公告)日：2022-01-06

申请号：PCT/US2021/032308

申请日：2021-05-13

Applicant: QUALCOMM INCORPORATED

Inventor： BAKHSHIANI, Mehran ,  LAKDAWALA, Hasnain ,  ABBAS MOHAMED HELMY, Ahmed ,  KARMAKER, Rahul ,  GUHADOS, Shankar ,  GATTA, Francesco

IPC: H03H11/12 ,  H03H11/04 ,  H04B1/10 ,  H03F2200/129 ,  H03F2200/165 ,  H03F2203/45526 ,  H03F3/45475 ,  H03G3/30 ,  H03H11/1217 ,  H03H11/1226 ,  H03H11/1291 ,  H03H19/004 ,  H03H2011/0483 ,  H03H2011/0494 ,  H04B1/0032 ,  H04B1/0039 ,  H04B1/0042 ,  H04B1/0078 ,  H04B1/1615 ,  H04B1/18

Abstract: An aspect includes a filtering method including operating a first filter to filter a first input signal to generate a first output signal; operating a second filter to filter a second input signal to generate a second output signal; and selectively coupling at least a portion of the second filter with the first filter to filter a third input signal to generate a third output signal. Another aspect includes a filtering method including operating switching devices to configure a filter with a first set of pole(s); filtering a first input signal to generate a first output signal with the filter configured with the first set of pole(s); operating the switching devices to configure the filter with a second set of poles; and filtering a second input signal to generate a second output signal with the filter configured with the second set of poles.

公开(公告)号：WO2020030534A1

公开(公告)日：2020-02-13

申请号：PCT/EP2019/070845

申请日：2019-08-01

Applicant: IMPERIAL COLLEGE OF SCIENCE, TECHNOLOGY AND MEDICINE

Inventor： DRAKAKIS, Emmanuel M ,  PETKOS, Konstantinos ,  ZAFEIROPOULOS, Georgios

IPC: H03H11/12

Abstract: Provided is a tunable electronic filter comprising: an input stage (301) coupled to a tuning stage; an amplifier (304) with an inverting input (306) coupled to an output of the tuning stage, and a non- inverting input (307) coupled to the ground, the amplifier furthermore comprising an output; and an output stage (302) coupled to the amplifier output; wherein the tuning stage comprises N RC networks (FFC 1, FFC 2,..., FFC N) and a multiplexer (303), wherein the N RC networks are connected in parallel between the input stage and respective ones of the N inputs of the multiplexer; wherein the multiplexer is configured to selectively connect one of the N RC networks to the inverting input of the amplifier, such that a second order multiple feedback filter is formed between the input stage and the output stage, wherein selection of one of the N RC networks tunes the electronic filter to have a respective one of N frequency responses, for N > 2.

公开(公告)号：WO2018034779A1

公开(公告)日：2018-02-22

申请号：PCT/US2017/042817

申请日：2017-07-19

Applicant: QUALCOMM INCORPORATED

Inventor： ANDRABI, Shuja ,  KARMAKER, Rahul

IPC: H04B1/00 ,  H03H11/12

Abstract: Certain aspects of the present disclosure provide methods and apparatus for calibrating a tunable active filter. One example apparatus is a filter circuit that generally includes a tunable active filter comprising at least one amplifier and a first feedback path coupled between an input and an output of the at least one amplifier, the first feedback path comprising at least one switch; and an amplitude limiter coupled to the tunable active filter and comprising at least one transistor disposed in a second feedback path coupled between the input and the output of the at least one amplifier.

Abstract translation: 本公开的某些方面提供了用于校准可调谐有源滤波器的方法和设备。 一个示例装置是滤波器电路，其通常包括可调谐有源滤波器，所述可调谐有源滤波器包括至少一个放大器和耦合在所述至少一个放大器的输入和输出之间的第一反馈路径，所述第一反馈路径包括至少一个开关; 以及振幅限制器，其耦合到所述可调谐有源滤波器并且包括设置在耦合在所述至少一个放大器的所述输入和所述输出之间的第二反馈路径中的至少一个晶体管。

公开(公告)号：WO2017089803A1

公开(公告)日：2017-06-01

申请号：PCT/GB2016/053686

申请日：2016-11-23

Applicant: ANLOTEK LIMITED

Inventor： NIELSEN, Jorgen Staal ,  NICHOLS, Richard

IPC: H03H11/12

CPC classification number: H03H11/1208 ,  H03G3/3042 ,  H03H11/1291 ,  H03H2210/012 ,  H03H2210/015

Abstract: A variable filter has a signal loop defined between a signal input and a signal output. A plurality of circuit elements connected in the signal loop, the plurality of circuit elements comprising a frequency tunable resonator, and an adjustable scaling block that applies a gain factor that is adjustable in a range that comprises a positive gain and a negative gain. A controller is connected to 1) tune the frequency tunable resonator; and to 2) adjust the gain factor of the adjustable scaling block between a negative gain factor to a positive gain factor providing for variable Q independent of frequency.

Abstract translation:

可变滤波器在信号输入和信号输出之间定义了一个信号回路。 连接在信号回路中的多个电路元件，多个电路元件包括频率可调谐振器，以及可调节的缩放块，其应用可在包括正增益和负增益的范围内调节的增益因子。 控制器连接到1）调谐频率可调谐振器; 并且2）在负增益因子与提供变量Q的正增益因子之间调整可调缩放模块的增益因子，与频率无关。

公开(公告)号：WO2017087485A1

公开(公告)日：2017-05-26

申请号：PCT/US2016/062224

申请日：2016-11-16

Applicant: TENSORCOM, INC.

Inventor： SOE, Zaw ,  JING, Kevin ,  GAO, Steve

IPC: H03G3/30 ,  H03F3/45 ,  H03H11/12

CPC classification number: H03G1/007 ,  H03F3/45197 ,  H03F2200/165 ,  H03F2200/69 ,  H03F2203/45372 ,  H03F2203/45374 ,  H03F2203/45512 ,  H03F2203/45544 ,  H03F2203/45594 ,  H03F2203/45686 ,  H03F2203/45702 ,  H03G5/28 ,  H03H11/1286

Abstract: A circuit comprises a Sallen-Key filter, which includes a source follower that implements a unity-gain amplifier; and a programmable-gain amplifier coupled to the Sallen-Key filter. The circuit enables programmable gain via adjustment to a current mirror copying ratio in the programmable-gain amplifier, which decouples the bandwidth of the circuit from its gain settings. The programmable-gain amplifier can comprise a differential voltage-to-current converter, a current mirror pair, and programmable output gain stages. The Sallen-Key filter and at least one branch in the programmable-gain amplifier can comprise transistors arranged in identical circuit configurations.

Abstract translation: 一种电路包括Sallen-Key滤波器，其包括实现单位增益放大器的源极跟随器; 和一个耦合到Sallen-Key滤波器的可编程增益放大器。 该电路通过调节可编程增益放大器中的电流镜像复制比来启用可编程增益，该放大器将电路的带宽与其增益设置分离。 可编程增益放大器可以包括差分电压 - 电流转换器，电流镜像对和可编程输出增益级。 Sallen-Key滤波器和可编程增益放大器中的至少一个分支可以包括以相同电路配置排列的晶体管。

公开(公告)号：WO2012019940A1

公开(公告)日：2012-02-16

申请号：PCT/EP2011/063263

申请日：2011-08-02

Applicant: ST-ERICSSON SA ,  NICOLLINI, Germano ,  GUANZIROLI, Federico ,  ORIO, Massimo ,  PINNA, Carlo

Inventor： NICOLLINI, Germano ,  GUANZIROLI, Federico ,  ORIO, Massimo ,  PINNA, Carlo

IPC: H03F3/187 ,  H03F3/213 ,  H03F3/45 ,  H03F1/34 ,  H03F1/30 ,  H03H11/12

CPC classification number: H03F3/181 ,  H03F1/30 ,  H03F1/34 ,  H03F3/187 ,  H03F3/213 ,  H03F3/45475 ,  H03F3/45968 ,  H03F3/45973 ,  H03F2200/03 ,  H03F2200/156 ,  H03F2200/271 ,  H03F2203/45136 ,  H03F2203/45156 ,  H03F2203/45212 ,  H03F2203/45512 ,  H03F2203/45514 ,  H03F2203/45534 ,  H03F2203/45544 ,  H03H19/004

Abstract: The invention relates to an electronic integrated amplifier (100; 200) for driving an acoustic transducer. The amplifier comprises two differential input terminals (10, 11; 20, 21) to receive an input signal (Vin) and a first (12; 22) and a second (GND; 23) output terminal to provide an output signal (Vout) to the transducer. In addition, the amplifier comprises an operational amplifier (OA; OA' ) having an input end (IN) including differential inputs and an output end (OUT) operatively associated with the first (12; 22) and second (GND; 23) output terminals. A pair of input resistors (R1) connect the two differential input terminals to two (14, 15; 24, 25) intermediate terminals, respectively. A pair of feedback resistors (R2) connect the first (12; 22) and second (GND; 23) output terminals to the two intermediate terminals, respectively. The integrated amplifier also comprises means (C 1 , C 2 , Csw 1 , Csw 2 ) for high-pass filtering the input signal (Vin). Such filtering means is characterized in that it comprises an input element (C 1 , C 2 ) interposed between said intermediate terminals and the input end (IN) of the operational amplifier (OA; OA'), and a feedback element (Csw 1 , Csw 2 ) connected between the input end (IN) and the output end (OUT) of the same operational amplifier (OA; OA').

Abstract translation: 本发明涉及一种用于驱动声换能器的电子集成放大器（100; 200）。 放大器包括两个差分输入端（10,11; 20,21），以接收输入信号（Vin）和第一（12; 22）和第二（GND; 23）输出端，以提供输出信号（Vout） 到传感器。 另外，放大器包括具有包括差分输入的输入端（IN）的运算放大器（OA; OA'）和与第一（12,22）和第二（GND; 23）输出端可操作地相关联的输出端（OUT） 终端。 一对输入电阻（R1）分别将两个差分输入端子连接到两个（14，15，24，25）个中间端子。 一对反馈电阻器（R2）分别将第一（12; 22）和第二（GND; 23）输出端子连接到两个中间端子。 集成放大器还包括用于对输入信号（Vin）进行高通滤波的装置（C1，C2，Csw1，Csw2）。 这种滤波装置的特征在于它包括插入在所述中间端子和运算放大器（OA; OA'）的输入端（IN）之间的输入元件（C1，C2）和连接的反馈元件（Csw1，Csw2） 在同一运算放大器（OA; OA'）的输入端（IN）和输出端（OUT）之间。

公开(公告)号：WO2011060322A1

公开(公告)日：2011-05-19

申请号：PCT/US2010/056615

申请日：2010-11-12

Applicant: QUALCOMM Incorporated ,  PARK, Sunghyun ,  LI, Xiaoyong ,  PAN, Tzu-wang

Inventor： PARK, Sunghyun ,  LI, Xiaoyong ,  PAN, Tzu-wang

IPC: H03H11/12

CPC classification number: H03H11/126

Abstract: An active analog filter (700, 1000) having a MOS capacitor device (730, 1030) with improved linearity is proposed. In an exemplary embodiment, dc bias voltage sources (755, 745) alter the capacitance of MOS varactors (740, 750) connected in anti parallel so that the total capacitance of the MOS capacitor device remains constant or within a range over the voltage range of the filter and the filter linearity is set. In a further exemplary embodiment the output stage (1070) of the operational amplifier circuit (1020) of the active analog filter (1000) is modified so that the dc bias voltage is provided by resistors (1055, 1045) connected to a current source (1060) already existing in the filter. Thus the linearity is set and the die area is significantly reduced.

Abstract translation: 提出了一种具有提高线性度的MOS电容器件（730,1030）的有源模拟滤波器（700,1000）。 在示例性实施例中，直流偏置电压源（755,745）改变以反并联方式连接的MOS可变电抗器（740,750）的电容，使得MOS电容器装置的总电容保持恒定或超过电压范围 滤波器和滤波器线性度被设置。 在另一示例性实施例中，有源模拟滤波器（1000）的运算放大器电路（1020）的输出级（1070）被修改，使得直流偏置电压由连接到电流源的电阻（1055,1045） 1060）已经存在于过滤器中。 因此，设置线性度并且模具面积显着减小。

公开(公告)号：WO2010086348A3

公开(公告)日：2010-12-23

申请号：PCT/EP2010050966

申请日：2010-01-28

Applicant: ST ERICSSON SA ,  ANDRE ERIC

Inventor： ANDRE ERIC

IPC: H03H11/12

CPC classification number: H03H11/12

Abstract: Method and system for measuring a time constant RC of an integrated electronic circuit made up of a first hardware component and of a second hardware component, one of the said hardware components being a resistive element R and the other being a capacitive element C. The first and the second hardware components are coupled to an inverting input of an operational amplifier (11) of an integrator (10) of a modulator (1) of delta-sigma type, a DC voltage known analogue input signal Vin is applied to the modulator (1) input defined by the terminal not coupled to the operational amplifier (11) of the first hardware component, the terminal not coupled to the operational amplifier (11) o f the second hardware component is coupled to the output of a digital/analogue converter (4) of the modulator (1), the output signal Qs of the modulator (1) is measured with the aid of an analogue/digital converter (3), and the value of the time constant RC is determined on the basis of at least one measurement of the level of the DC component of the output signal Qs of the modulator (19), carried out with the aid of measurement means (2).

Abstract translation: 用于测量由第一硬件组件和第二硬件组件组成的集成电子电路的时间常数RC的方法和系统，所述硬件组件中的一个是电阻元件R，另一个是电容元件C.第一 并且第二硬件组件耦合到Δ-Σ型调制器（1）的积分器（10）的运算放大器（11）的反相输入端，DC电压已知模拟输入信号Vin被施加到调制器 1）由未耦合到第一硬件组件的运算放大器（11）的端子定义的输入端，未耦合到第二硬件组件的运算放大器（11）的端子耦合到数字/模拟转换器（11）的输出端 （1）的输出信号Qs，借助于模/数转换器（3）测量调制器（1）的输出信号Qs，并且时间常数RC的值至少基于 一个措施 （2）执行的调制器（19）的输出信号Qs的DC分量的电平。

公开(公告)号：WO2010086347A3

公开(公告)日：2010-12-23

申请号：PCT/EP2010050965

申请日：2010-01-28

Applicant: ST ERICSSON SA ,  ANDRE ERIC ,  LEFEBVRE SEBASTIEN ,  AMIACH JONATHAN

Inventor： ANDRE ERIC ,  LEFEBVRE SEBASTIEN ,  AMIACH JONATHAN

IPC: H03H11/12 ,  H03H7/01

CPC classification number: H03H11/12 ,  H03H7/01 ,  H03H2210/04 ,  H03M3/38 ,  H03M3/494

Abstract: System and method for calibrating a time constant RoC1 of an integrated electronic circuit (1). A variable-impedance filter (20) is coupled at the input of the integrated electronic circuit (1), an analogue input signal V1n of fixed frequency is applied to the filter (20), the analogue input signal V1n attenuation engendered by the filter (20) is measured, and the value of the time constant RoC1 and the value of the impedance of the variable-impedance filter (20) are modified until an attenuation corresponding to the desired attenuation for the integrated electronic circuit is obtained (1).

Abstract translation: 用于校准集成电子电路（1）的时间常数RoC1的系统和方法。 可变阻抗滤波器（20）耦合在集成电子电路（1）的输入处，固定频率的模拟输入信号V1n施加到滤波器（20），由滤波器产生的模拟输入信号V1n衰减 20），并且修改时间常数RoC1的值和可变阻抗滤波器（20）的阻抗值，直到获得对应于集成电子电路的期望衰减的衰减（1）。