US09083446B2
Method and receiver for processing a signal in a wireless communication system in which the signal comprises a sequence of chips. The signal is receive data at least one rake finger and sampled. There is a time spacing t1 between successive samples less than the time spacing tc between successive chips in the signal. Channel conditions on the channel are estimated and based on estimated channel conditions by the following steps: monitoring timing of the signal on one of the at least one rake finger to determine a time difference between the timing of the signal on the one of the at least one rake finger and the timing of the generation of the samples, the determined time difference being a multiple of t2, where t2
US09083445B2
A receiver includes a plurality of de-spreading correlators that are programmed to only correlate a specific portion of the full spreading code according to an interleave factor. Each correlator may be associated with a different symbol. The received signal may be received at all correlators and is multiplied by a code generated by a code generator according to the symbol associated with the correlator. While each correlator may be despreading the received signal at all times, an enable signal is used to determine when information for an associated cell should be accumulated for each correlator.
US09083444B2
A radio frequency communication system. The system includes a radio frequency transmitter and a radio frequency receiver, wherein the radio frequency transmitter includes a modulation circuit and an RF modulator, wherein the radio frequency transmitter maps each block of K information bits into a block of N transmit symbols, transforms the block of N transmit symbols by using symbol block repetition and spreads the symbol blocks by multiplying the symbol blocks by a predefined chirp signal, and wherein the radio frequency receiver includes a chirp receiver operable to receive, demodulate and digitize a modulated radio frequency (RF) signal to form a digital baseband signal, and to recover a signal modulated using interleaved single carrier chirp spread spectrum modulation.
US09083439B2
A method and apparatus for sending data. Input signals from input wires are received. The input signals include data. Information about the input signals is identified. The data and the information are sent in digital signals over a wire to a second location. The input signals are recreated from the data and the information received in the digital signals over the wire.
US09083437B2
In an embodiment, a front-end transceiver may be provided. The front-end transceiver may include a receiver path, including a first receiver frequency converter configured to convert a received signal with a receiver frequency into a first receiver intermediate signal with a first receiver intermediate frequency; and a receiver direct conversion stage coupled to the first receiver frequency converter so as to receive the first receiver intermediate signal. The front-end transceiver may further include an oscillator signal generator respectively coupled to the first receiver frequency converter and to the receiver direct conversion stage so as to provide a first oscillator signal with a first oscillator frequency to the first receiver frequency converter and a first stabilizing signal with a first stabilizing frequency to the receiver direct conversion stage; wherein the oscillator signal generator may be configured so that the first oscillator frequency of the first oscillator signal may be selected such that any integer multiple of the first oscillator frequency of the first oscillator signal may be different from any integer multiple of the receiver frequency of the received signal. The front-end transceiver may also include a transmitter path.
US09083434B2
A method of operating a repeater for wireless communication includes broadcasting, from the repeater, a pilot signal in a service area associated with the repeater. The pilot signal carries a scrambling code that permits mobile terminals to decode information transmitted by the repeater. The method further includes receiving a request to initiate communication from a mobile terminal that has received the pilot signal and, in response to receiving the request, establishing a communication link with the mobile terminal. The method further includes receiving, at a first antenna of the repeater, data transmitted wirelessly by the mobile terminal and transmitting, over a second antenna of the repeater, the received data to a base station.
US09083428B2
A control device including a means for capturing an image of a display; means for determining from said captured image, information defining a desired position on said display; and means for sending a signal having the determined information. Embodiments of the present disclosure have many applications such as with television to for example select stations or control settings of the televisions, computers, DVDs, videos, MPEG players or the like. Embodiments of the present disclosure can be used with video players or recorders. It should be noted that video player/recorders can deal with video data stored or to be recorded on tape, discs such as DVDs or CDs, removable memory such as a memory stick or a memory internal to the device.
US09083424B2
Described herein is a wireless transceiver and related method that enables ultra low power transmission and reception of wireless communications. In an example embodiment of the wireless transceiver, the wireless transceiver receives a first-reference signal having a first-reference frequency. The wireless transceiver then uses the first-reference signal to injection lock a local oscillator, which provides a set of oscillation signals each having an oscillation frequency that is equal to the first-reference frequency, and each having equally spaced phases. Then the wireless transceiver combines the set of oscillation signals into an output signal having an output frequency that is one of (i) a multiple of the first-reference frequency (in accordance with a transmitter implementation) or (ii) a difference of (a) a second-reference frequency of a second-reference signal and (b) a multiple of the first-reference frequency (in accordance with a receiver implementation).
US09083419B2
Described herein is a method and system for estimating a time-varying multipath communication channel. The system comprises a receiver for receiving a signal comprising a data packet transmitted over the multipath communication channel. The system also comprises a frequency-domain channel estimator that generates a frequency-domain channel estimate based on the received signal. The system further comprises a time-domain channel modeller that receives the frequency-domain channel estimate and generates an estimate of parameters in a time-domain model of the multipath communication channel. The model characterizes the multipath communication channel as a delay line with a plurality of taps, each tap having tap parameters defining a delay, a Doppler and a gain for the tap. The tap parameters are constant over the data packet.
US09083417B2
An interference cancellation method performed by a receiver includes: determining a strong interference code channel among all code channels that carry a received signal, and determining a signal that corresponds to the strong interference code channel to be a strong interference signal, wherein the received signal has been matched filtered. The method further includes obtaining a reconstructed strong interference signal based on the determined strong interference signal and using a system matrix, performing the interference cancellation for the received signal using the reconstructed strong interference signal, to obtain the signal without interference. The strong interference signal can be reconstructed using the system matrix, and the interference cancellation can be performed for the received signal using the reconstructed strong interference signal. The complexity of inverting the matrix is reduced and the performance is enhanced by reducing the order of the matrix, and thus increasing the efficiency of cancelling the interference.
US09083416B2
A receiver apparatus includes a first receiver having an input for receiving a first version of a signal received by a first receive antenna. The receiver apparatus further includes a second receiver having an input for receiving a second version of the same signal received by a second receive antenna. The first receiver includes a first constellation demapper for demapping constellation symbols generated in the first receiver into a first soft decision bitstream and the second receiver includes a second constellation demapper for demapping constellation symbols generated in the second receiver into a second soft decision bitstream. A combiner is configured to combine the first soft decision bitstream and the second soft decision bitstream to provide a combined soft decision bitstream.
US09083413B2
Method and system for reducing interference between adjacent antennas wherein one antenna transmits a first signal from a transmitter equipment and a second antenna receives a second signal by a receiver equipment, the first and the second signals may have the same frequency, and the angular discrimination between the TX antenna and the RX antenna in the same location is low. The transmitter equipment inputs an intermediate frequency contribution of the first signal into a cross-polar interference canceller, included in the receiver equipment, for reducing a co-channel interference in the receiver equipment caused by the first and the second signals, wherein the cross-polar interference canceller selects a desired signal from the two signals received so as to reduce said interference.
US09083412B2
A Channel Quality Indicator (CQI) expression and feedback method prevents an excessive increase in the CQI feedback overhead while supporting both Single-User MIMO and Multi-User MIMO operations. When a default MIMO operation is set to Single-User MIMO or Multi-User MIMO, an access network can receive MIMO CQI feedback optimized for the corresponding MIMO operation. However, when a scheduler has selected an alternative MIMO operation other than the default MIMO operation, the access network calculates a CQI necessary for the alternative MIMO operation based on the default MIMO CQI feedback for the default MIMO operation and the DELTA CQI feedback for the alternative MIMO operation. In this manner, the invention enables the best operation in the default MIMO operation by providing a correct CQI, and enables the second best operation in the alternative MIMO operation. With use of the invention, the access network can dynamically select the Single-User MIMO and Multi-User MIMO operations, contributing to an increase in the resource management efficiency.
US09083406B2
Embodiments of the present invention provide a data transmission method, apparatus, and system. The method includes receiving transmitter antenna quality information sent by a receiver; determining, according to the transmitter antenna quality information, a transmitter antenna that transmits data; switching a first transmission mode to a second transmission mode when the transmitter antenna quality information satisfies a preset condition; and transmitting the data by using the second transmission mode and the determined transmitter antenna.
US09083401B2
In one or more aspects data packets are iteratively transmitted to a receiver using predefined spatial mapping matrices, channel estimates are received from the receiver responsive to iteratively transmitted data packets, and one of the predefined spatial mapping matrices is selected for transmitting additional data packets to the receiver based on the received channel estimates.
US09083393B2
A user equipment (UE) including first and second antennas; a first wireless communication chip configured to output first and second signals corresponding to first and second frequency bands, respectively; a second wireless communication chip configured to output thirds signals corresponding to a third frequency band; and a radio frequency (RF) front-end module configured to transmit the first and second signals corresponding to the first and second frequency bands output from the first wireless communication chip to the first antenna, transmit the third signal corresponding to the third frequency band output from the second wireless communication chip to the first antenna, transmit the second signal corresponding to the second frequency band externally received in the first antenna to the first wireless communication chip through a secondary Rx path, transmit the second signal corresponding to the second frequency band externally received in the second antenna to the first wireless communication chip through a primary Rx path, and transmit the third signal corresponding to the third frequency band received in the first and second antennas to the second wireless communication chip.
US09083388B2
A magnetic field transmitter, especially a transmitter used in conjunction with wireless communications earplugs. In one embodiment, a plate of magnetic material is used behind a coil of electrical conductor to improve the efficiency of the transmitter and to provide electrical and magnetic shielding. The specific dimensions and characteristics of the preferred embodiment of the transmitter described herein provide for efficient wireless communications.
US09083386B2
In an electronic apparatus, a soft decision likelihood value is generated and subject to a decoding process supporting a convolutional code; and a data series is interleaved, subjected to an error correction process, and decoded data is generated. A detecting unit, based on information concerning the position of a symbol for which an error has been corrected successfully by the error correction process, estimates whether an error occurs in a symbol for which the error correction process failed and detects the position of a symbol estimated to have an error. A setting unit sets based on the decoded data and information concerning the position of the symbol estimated to have an error, a correction value of the soft decision likelihood value. The electronic device interleaves the order of a correction value series of the soft decision likelihood value and feeds the resulting correction value series back to the decoding process.
US09083377B2
A technique includes receiving an analog signal and generating at least one second signal that has a timing indicative of a magnitude of the analog signal. The technique includes acquiring a plurality of measurements of the timing, where the measurements vary according to a stochastic distribution; and providing a digital representation of the analog signal based at least in part on the measurements.
US09083372B2
A process variable transmitter is used to measure a process variable, and, in doing so, dynamically changes the resolution of the A/D converter based upon the measured value of the analog input signal. This can be done by automatically adjusting the configurable resolution gain adjustment based on the value of the analog signal being measured, by normalizing the input signal being measured so that it is centered in an optimal resolution window of the A/D converter, or by adjusting a voltage reference provided to the A/D converter.
US09083363B2
Systems and methods for a cold atom frequency standard are provided herein. In certain embodiments, a cold atom microwave frequency standard includes a vacuum cell, the vacuum cell comprising a central cylinder, the central cylinder being hollow and having a first open end and a second open end; a first end portion joined to the first open end; and a second end portion joined to the second open end, wherein the first end portion, the central cylinder, and the second end portion enclose a hollow volume containing atoms, the first end portion and the second end portion configured to allow light to enter into the hollow volume. The cold atom microwave frequency standard also includes a cylindrically symmetric resonator encircling the central cylinder, wherein the resonator generates a microwave field in the hollow volume at the resonant frequency of the atoms.
US09083361B2
An ADPLL includes a digital controlled oscillator, a first counter counting a number of clocks from the digital controlled oscillator, a second counter to count a multiplication number representing a number of the clocks in a reference clock, a TDC detecting a delayed amount of a phase of the clocks against a phase of the reference clock, an adder adding the delayed amount to a difference between the multiplication number and the number of clocks, a slew rate setting part setting a slew rate of the clocks, an ADC receiving the clocks to which the slew rate is set, a switching part switching between an output of the adder and an output of the ADC, and a controller controlling the slew rate by shifting a phase of the clocks to set a slew rate while the ADLL is locked by utilizing the TDC.
US09083359B2
A phase lock loop having a lock detector is provided. The lock detector is based on a replica charge pump and includes: a charge pump, a filter and a comparing circuit. The charge pump is arranged for providing an output according to a phase difference between an output signal and a reference signal. The filter is coupled to the charge pump, and is arranged for filtering the output of the charge pump to generate a filtered output voltage. The comparing circuit is coupled to the filter, and is arranged for comparing the filtered output voltage with a threshold setting to generate a lock indication signal to indicate whether the output signal is locked to the reference signal.
US09083355B2
Methods and apparatus for using end nodes, e.g., wireless terminals, to discover base stations and communicate information about discovered access nodes, e.g., base stations, to other access nodes in a system are described. As the wireless terminal roams in the system and new access nodes are encountered, one or more physically adjacent access nodes will be informed of the presence of the new access node as a result of communications with the wireless terminal. A message indicating an access node's inability to route a message to another access node which is known to a wireless terminal may trigger the wireless terminal to begin the process of updating access node routing and neighbor information.
US09083353B2
A semiconductor device includes a clock input circuit that receives an external clock signal, a PLL circuit for input timing control that performs phase adjustment between the external clock signal and a delayed clock signal to generate an internal clock signal used to acquire input data, and a delay circuit that delays the internal clock signal to output the internal clock signal that is delayed to a PLL circuit for input timing control as a delayed clock signal. The semiconductor device further includes a PLL circuit for output timing control that performs phase adjustment between the external clock signal and a delayed clock signal to generate an internal clock signal used to output output data, and a delay circuit that delays the internal clock signal to output the internal clock signal that is delayed to the PLL circuit for output timing control as a delayed clock signal.
US09083345B2
A circuit arrangement for determining a capacitance of a number n of capacitive sensor elements (SE1˜SEn) comprises at least one collecting capacitor (CS1˜CSm), a reference voltage source (RQ), an evaluation device (AE) connected to the at least one collecting capacitor to evaluate a voltage present at the at least one collecting capacitor, a control unit (MC) for generating at least one control signal (SS1˜SSk), and at least one integrated circuit (IC1˜ICm) connected to the reference voltage source, the sensor elements, and the at least one collecting capacitor. The at least one integrated circuit comprises a number k of changeover switches (WS1˜WSk) responsive to the at least one control signal to connect the respectively associated sensor element to the reference voltage source in a first switching position, and to the at least one collecting capacitor in a second switching position.
US09083330B2
An output driver for driving a data output signal through an output pad includes a plurality of calibration paths to calibrate the impedance of the output pad. Depending upon the desired impedance, various ones of the calibration paths are selectively coupled to the output pad. Each selected calibration path adds a capacitive load to a data node, which affects the slew rate for the data output signal. To adjust the capacitive load on the data node in light of the calibration path selections, the output driver includes a plurality of selectable capacitors corresponding to the plurality of calibration paths. If a calibration path is not selected to couple to the output pad, the corresponding selectable capacitor capacitively loads the data node.
US09083322B2
An apparatus includes a capacitor, a current generating circuit communicatively coupled to the capacitor, and a current pulse timing circuit communicatively coupled to the current source circuit. The current timing pulse circuit is configured to time durations of a first plurality of current pulses from the current generating circuit for charging the capacitor and a second plurality of current pulses for discharging the capacitor, and step the durations of the current pulses between a minimum duty cycle and a maximum duty cycle. A cycle of providing the first plurality of current pulses and providing the second plurality of current pulses results in generation of a subsonic pseudo-sinusoidal pulse signal at the capacitor.
US09083319B2
An oscillator and the control method thereof. The oscillator includes an oscillation unit to receive a first current and to generate an oscillating signal according to the first current, a frequency-to-voltage converter to receive the oscillating signal and to generate a converted voltage according to a frequency of the oscillating signal, and a voltage-to-current converter to receive the converted voltage and to generate the first current according to the converted voltage, wherein the first current is modulated from a first value to a second value after the initiation of the oscillation unit.
US09083310B2
A laminated structural type balun includes a low pass filter that is provided between an unbalanced terminal inputting and outputting unbalanced signals and a first balanced terminal inputting and outputting balanced signals and includes a first coil and a first capacitor; and a high pass filter that is provided between the unbalanced terminal and a second balanced terminal inputting and outputting balanced signals and includes a second capacitor and a second coil. The first capacitor and the second capacitor are arranged in a different area from the first coil and the second coil in a laminated direction.
US09083309B2
A movable section located in a hollow portion covered with a wall and a first sealing layer which are on a substrate and the first sealing layer located in an area facing the movable section are provided, the movable section is located between the substrate and the first sealing layer, and at least part of the movable section and the first sealing layer is an electric conductor.
US09083305B2
Disclosed is a pass band type acoustic wave filter capable of obtaining an excellent attenuation characteristic in attenuation bands, in which an IDT electrode having a meander structure is used as at least one of the input-side electrode and the output-side electrode, and the attenuation band is provided over/under the pass band. An electrode having a meander structure in which a plurality of IDT blocks are connected to each other in series between the input port or the output port and the ground port is arranged as the input-side IDT electrode and the output-side IDT electrode, and the electrode finger between the neighboring IDT blocks is removed, so as to suppress excitation of an undesired acoustic wave.
US09083303B2
An acoustic wave device includes a substrate, a dielectric film formed on the substrate and a pair of IDT electrodes opposing each other provided between the substrate and the dielectric film. At least one of the substrate and the dielectric film is piezoelectric. The IDT electrodes each include an electrode finger that extends in at least one direction. A film thickness of the dielectric film changes in a gap portion between a tip of the electrode finger of one of the IDT electrodes and the other opposing IDT electrode in the direction of extension of the electrode finger.
US09083297B2
An integrated circuit (IC) includes a programmable gain amplifier. The programmable gain amplifier comprises a first-stage amplifier configured to operate with at least one relatively high power supply voltage in order to accommodate at the input of the first-stage amplifier a relatively large range of input signals, the first-stage amplifier having a gain setting that is adjustable from a set of predetermined gain settings separated in relatively coarse increments so as to minimize the number of analog switches that must be implemented with high-voltage active devices in order to set each gain setting. The programmable gain amplifier also includes a second-stage amplifier configured to operate with at least one relatively low power supply voltage, lower than the high power supply voltage in order to minimize the required IC area for the second-stage amplifier, wherein the gain of the second-stage amplifier is adjustable from a set of gain settings separated in relatively small increments between the coarse increments in order to achieve a combined predetermined gain resolution. The gain of the programmable gain amplifier is programmable by adjusting the gain of each of the first-stage and second-stage amplifiers.
US09083296B2
Exemplary embodiments are directed to systems, devices, and methods for enhancing an amplifier. An amplifier may include a first cascode circuit including a first transistor and a second transistor. The amplifier may include a second cascode circuit coupled to a differential output and including a first pair of transistors including a first transistor and a second transistor and a second pair of transistors including a third transistor and a fourth transistor. Further, the amplifier may include a differential input including a first transistor coupled to each of the first transistor of the first cascode circuit and the first and second transistors of the second cascode circuit, the differential input further including a second transistor coupled to each of the second transistor of the first cascode circuit and the third and fourth transistors of the second cascode circuit.
US09083287B2
An electronic biasing circuit provides a DC bias voltage to a circuit to be biased. The biasing circuit has a first transistor and a second transistor. A gate of the first transistor is connected to a gate of the second transistor and supplies the DC bias voltage. A source of the first transistor is connected to a supply reference voltage. A source of the second transistor is connected to the supply reference voltage via a resistor element. The currents flowing through the first and second transistor are forced to be equal. A third transistor is connected in series with the first transistor and a fourth transistor is connected in series with the second transistor. Currents flowing through the third and fourth transistors are forced to be equal.
US09083271B2
A motor control system and method are provided for a vehicle that reduces torque ripples due to motor system characteristics while the vehicle is running at ultra-low speed in an electric vehicle running mode. The system includes a current command generator that generates a current command based on a torque command, a motor speed, and a reference voltage. A current controller generates a voltage command based on the current command. A coordinate transformer transforms the voltage command into a 3-phase voltage command by a coordinate transformation and a PWM (pulse width modulation) signal generator generates a switch signal based on the 3-phase voltage command. A PWM inverter generates a 3-phase driving current to drive a motor based on the switch signal and a current control ripple compensator applies a reverse phase harmonic wave to the current controller to reduce a harmonic wave caused by errors generated from the current controller.
US09083269B2
A method and a circuit system for operating an electric machine are presented. The method is carried out in particular in a starting phase, a current being limited using a controllable resistor, the controllable resistor being implemented by at least one semiconductor switch, which is controlled using a clocked signal, and the signal being set in such a way that in shutdown phases, the at least one semiconductor switch is not completely shut down.
US09083268B2
A controlling circuit for a fan includes three comparators, a capacitor, and a thermistor. When the temperature around the thermistor changes, the resistance of the thermistor changes. The comparators control the charging and discharging time of the capacitor, thereby generating a corresponding pulse width modulation signal to the fan according to the temperature, to adjust the speed of the fan.
US09083251B2
A controller for a power converter includes a drive circuit coupled to generate a drive signal in response to an error signal representative of a load of the power converter. The drive circuit includes a pulse skipping circuit coupled to generate a blanking signal in response to the error signal. The pulse skipping circuit includes an enable circuit and a blanking circuit. The enable circuit is coupled to output an enable signal in response to the error signal. The blanking circuit is coupled to output the blanking signal in response to the enable signal and a ramp signal. The ramp signal is generated in response to the error signal. A duration of the blanking signal corresponds to a length of time for the ramp signal to reach a reference signal. The length of time is responsive to the error signal.
US09083247B2
A resonant converter system includes a first stage having inverter circuitry and resonant tank circuitry configured to generate an AC signal from a DC input signal, a transformer configured to transform the AC signal, and a second stage. The second stage features synchronous rectifier (SR) circuitry including a plurality of SR switches each having a body diode and SR control circuitry. SR control circuitry is configured to generate gate control signals to control the conduction state of the SR switches so that the body diode conduction time is minimized and a negative current across the SR switches is reduced or eliminated. The method includes controlling the conduction state of SR switches to conduct as the body diode associated with the switch begins to conduct and controlling the SR switch to turn off as the current through the switch approaches a zero crossing.
US09083243B2
The present invention relates to a protection circuit for protecting a half-bridge circuit. The protection circuit detects an incorrect response of the half-bridge by monitoring the current of a first switch at a series resistor of a second switch. The protection circuit has a detector for detecting the voltage across the resistor and an evaluation circuit which is designed in such a manner that it evaluates an output signal from the detector after the first switch has been switched on and provides a fault signal at an output when the voltage across the resistor is greater than the threshold voltage.
US09083236B2
The present invention refers to high-voltage generators, in particular to a step-down DC-to-DC converter circuit (buck converter) for supplying a DC output voltage Uout which may e.g. be used in a voltage supplying circuitry of an X-ray radio-graphic imaging system. According to the invention, the peak value of the buck converter's storage inductor current IL is controlled by a control circuit μC′ which regulates the on-time Δton of a semiconductor switch S in the feeding line of this storage inductor L. As a result thereof, an output current sensor CS, which is commonly used in today's buck converter designs, becomes redundant.
US09083229B1
Systems and methods are provided for regulating power in an integrated circuit system. A system includes a processing unit configured to monitor one or more operating parameters in the integrated circuit system. Based on the one or more monitored operating parameters, the processing unit is configured to predict an occurrence of an event that will cause an increased load on the integrated circuit system and further to assert a voltage adjustment command based on the predicted event. A power regulator is coupled to a power supply. The power regulator is configured to supply a regulated output voltage at a nominal voltage level. The power regulator is further configured to receive the voltage adjustment command and to supply the output voltage at an adjusted output level responsively to the voltage adjustment command.
US09083225B2
A rotary electric machine includes a rotor core, a stator, a field yoke, and a field winding. The rotor core is fixed to a rotary shaft, which includes a magnetic body for forming a magnetic path, and magnetic salient poles. The stator has teeth and a stator winding wound around the teeth by concentrated winding. A slot is formed between adjacent ones of the teeth in a circumferential direction. The field yoke magnetically connects the stator and the magnetic body. The field winding is located in proximity to at least one of the winding ends of the stator winding in an axial direction of the rotary shaft. The field winding generates a magnetic pole on the magnetic salient poles when energized.
US09083224B2
A disk drive apparatus includes a rotor hub including an outer surface with a hub screw groove and a hub information mark indicative of a start position of the hub screw groove. A method of manufacturing the disk drive apparatus includes the steps of preparing a spindle motor including the rotor hub, preparing a clamper including a clamper screw groove, and fitting a recording disk to the spindle motor. The method further includes the steps of detecting a position of the hub information mark and, based on the detected position of the hub information mark, positioning each of the clamper and the spindle motor in a circumferential direction, and screwing the clamper to the spindle motor.
US09083220B2
A method for servicing a rotor of a generator includes the steps of, dismantling a non-drive end of the generator, removing insulation from portions of an existing Wye ring and existing connection lugs, removing portions of the existing Wye ring near the existing connection lugs, installing a replacement Wye ring in the generator, connecting the replacement Wye ring to the existing connection lugs, and insulating the replacement Wye ring and the existing connection lugs. The method is performed on the generator in-situ.
US09083200B2
Disclosed is an uninterruptible power supply, including a rectifier for generating a DC voltage; an energy storage unit; an inverter for converting the DC voltage into a three-phase modulating voltage; a filter; a bypass switch circuit for selectively outputting a three-phase AC voltage or the three-phase modulating voltage as a three-phase load voltage; and a control circuit for controlling the operation of the uninterruptible power supply. The control circuit may use a flux compensation block with different operating modes to adjust the three-phase load voltage at the startup phase of a second inductive load and at the stable phase of the second inductive load, thereby compensating or correcting the flux of the second inductive load to prevent the flux distribution of the second inductive load from being saturated.
US09083197B2
A DC power supply apparatus includes a charging circuit, which charges a secondary battery of a vehicle from an AC power source device or a DC power source device. The charging circuit includes a non-insulating converter circuit and an insulating converter circuit. A breaker relay disconnects the AC power source device and the charging circuit in an initial charging period to supply a large charging current to the secondary battery by the non-insulating converter circuit. As a result, charging can be performed with high efficiency without the insulation transformer. The breaker relay connects the AC power source device and the charging circuit after the initial charging period. Only the insulating converter circuit supplies the charging current to the secondary battery. Thus, adverse effect of stray capacitance of a circuit of the vehicle can be eliminated.
US09083192B2
A current selectable USB charger includes a USB (universal serial bus) connector, a crossover switch, a pair of voltage dividers and a power supply. The power supply provides preferably a +5 volt DC voltage to the pair of voltage dividers. The pair of voltage dividers includes a first voltage divider and a second voltage divider, each being formed of a pair of series-connected resistors. The voltage on the junction of the series-connected resistors of the first voltage divider is selectively provided, through the crossover switch, to one of the D− pin and the D+ pin of the USB connector. The voltage on the junction of the series-connected resistors of the second voltage divider is selectively provided, through the crossover switch, to one of the D+ pin and the D− pin of the USB connector.
US09083186B2
A semiconductor device includes a power source selection circuit configured to turn on and off each of a plurality of power source switches. The power source selection circuit includes a power source selection unit configured to select one power source from among the plurality of power sources, and a feedback control unit configured to output an on command signal to turn on an electrical connection between the selected power source and the electric circuit to a power source switch to be connected to the selected power source. When the power source selection unit switches a power source to select to another, the feedback control unit feeds back a signal indicative of that an off command signal to turn off electrical connections between the plurality of power sources and the electric circuit has been output to all of the plurality of power source switches at a predetermined delay time.
US09083177B2
A fault protection system of a power system of a dynamically positioned vessel is provided. The power system has a power distribution bus having three or more bus subsections, electric connections including bus ties which connect the bus subsections in a ring configuration, and circuit breakers connected between the bus subsections. The fault protection system includes a generator circuit breaker for coupling a generator to a bus subsection, feeder circuit breaker(s) for coupling load(s) to the bus subsection, a first circuit breaker for connecting one end of the bus subsection to a bus tie that provides an electric connection to another bus subsection, the first circuit breaker being a bus tie breaker, a second circuit breaker for coupling another end of the bus subsection to a further bus subsection, protection relays for operating the circuit breakers, and communication links between protection relays that exchange information via said communication links.
US09083174B2
The object of the invention is a thermal overload protection device (22) for protecting an electric component (10), in particular an electronic component, wherein the overload protection device (22) has a short-circuit unit (24) for short-circuiting connections (12, 14) of the component (10), and an actuating member (26) actuating the short-circuit unit (24) in a temperature sensitive manner. According to the invention it is provided that the short-circuit unit (24) is attached to a circuit path support (16) in at least one area (28), and is supported in at least another area (30) on the component (10) disposed on the circuit path support (16) via the actuating unit (26), and/or at least one of the circuit paths (18, 20) contacting one of the connections (12, 14) to be short-circuited.The invention further relates to a respective arrangement (36) having a circuit path support (16), at least one component (10) disposed thereupon, and at least one assigned overload protection device (22).
US09083160B2
An example includes a hand tool for repairing high-voltage electric power transmission cable, the tool including a generally straight elongate bar extending from a proximal portion including a back end to a distal portion including a tip that is generally smaller in diameter than the proximal portion, the proximal portion including a hand-graspable handle, the bar defining a hollow extending into the handle, the hollow extending from an interior wall of the hollow to an opening in the handle, the bar including a shoulder encircling the bar defining a transition between an at least partially conical shape extending from the tip to the shoulder and a spreader portion extending from the shoulder to the handle, wherein the hollow is sized to receive the transmission cable, with the opening being larger in diameter than both the conductor of the transmission cable and an insulator of the transmission cable.
US09083149B1
The present invention provides a photorefractive hybrid cell including a window and a gain media disposed adjacent the window. The gain media includes nanoparticles therein. The window includes a material that forms a space-charge field. The gain media includes a material having refractive index properties that depend on an electric field. The nanoparticles include a coating which may include birefringent or polar molecules, other nanoparticles, organic material, or inorganic material.
US09083148B2
The present invention provides, in at least one embodiment, a system and method for power control of lasers. The system includes a device's control signal fed into a laser. The laser can be a master oscillator power amplifier (MOPA) fiber laser. The device includes an equivalent model circuit representing at least one parameter of the laser, such as the gain fiber inversion in the power amplifier. The device measures the power at the equivalent model circuit. Then, the device uses its feedback signal to control and/or adjust the output power control signal fed into the laser based on the measured power. By controlling the power fed into the laser, the laser can be operated at much lower frequencies while keeping the laser power within acceptable limits.
US09083136B1
A semiconductor laser light source includes a semiconductor laser block mounted on a stem which is a support base, the semiconductor laser block which is a block has a plurality of surfaces, and a plurality of semiconductor laser chips emit laser light beams of different wavelengths, respectively. Each of the semiconductor laser chips is mounted on each surface of the semiconductor laser block.
US09083135B2
A composition of matter is provided having the general chemical formula K(H,D)2P(16Ox,18Oy)4, where x<0.998 or y>0.002, and x+y≈1. Additionally, a method of fabricating an optical material by growth from solution is provided. The method includes providing a solution including a predetermined percentage of (H,D)216O and a predetermined percentage of (H,D)218O, providing a seed crystal, and supporting the seed crystal on a platform. The method also includes immersing the seed crystal in the solution and forming the optical material. The optical material has the general chemical formula K(H,D)2P(16Ox,18Oy)4, where x<0.998 or y>0.002, and x+y≈1.
US09083134B2
A universal series bus (USB) connector including a base, a first terminal set, and a second terminal set and a method of manufacturing the universal series bus connector are provided. The first terminal set includes a pair of first differential signal terminals and a pair of second differential signal terminals, and terminals of the pair of first differential signal terminals are adjacent to each other and terminals of the pair of second differential signal terminals are adjacent to each other. Two of terminals of the second terminal set are located at two opposite sides of the pair of first differential signal terminals, and another two of the terminals of the second terminal set are located at two opposite sides of the pair of second differential signal terminals.
US09083129B2
A multipolar lead evaluation device may be configured to easily permit electrical contact to be made between a pacing system analyzer and the terminal pin and each of the terminal contacts of an implantable lead without damaging the implantable lead. Alligator clips may be used to secure electrical conductors from the pacing system analyzer to spring contact clips disposed within the lead evaluation device.
US09083123B2
A visually evident connection system for a plug-in power/data cable including a power/data cable connector securable to a power/data cable. The connector is configured to be received by a power/data receptacle having an illumination region. In response to an interconnection between the connector and the receptacle, the connector is configured to provide visual evidence of the interconnection by illumination of a component other than the illumination region of the receptacle. The source of illumination of the component is provided by the illumination region of the receptacle.
US09083116B2
A connector of the present invention includes a first connector housing (11) and a second connector housing (101) which are fitted to each other, a fitting operation member (20) which makes the first connector housing 11 and the second connector housing, which are initially fitted, to be completely fitted, a grommet (40) which urges the fitting operation member to move from a standby position to an operational position, and temporary locking arms (16) which, while the fitting operation member is temporarily locked at the standby position and the first connector housing and the second connector housing are initially fitted, cancel the temporary locking.
US09083114B2
A connector includes a connector housing that receives a terminal fitting, a spacer that is inserted into a spacer installation opening of the connector housing to prevent the terminal fitting received in the connector housing from being fallen out, a temporary locking mechanism that temporarily fixes the spacer to a temporary locking position where the spacer is not engaged with the terminal fitting, a main locking mechanism that locks the spacer pushed toward a more inner side of the housing than the temporary locking position to a main locking position where the spacer is engaged with the terminal fitting. The temporary locking mechanism allows the spacer to move from the temporary locking position to the main locking position.
US09083113B2
A connector comprising a connector body having a first end and a second end, the connector body configured to receive a prepared coaxial cable, the prepared coaxial cable including an outer conductor and a center conductor, a clamp disposed within the connector body, the clamp including an internally threaded portion and a ramped surface, wherein the clamp threadably engages the prepared coaxial cable, a moveable ramped component disposed within the connector body, the moveable ramped component including an internally ramped surface, and a compression member configured for axial movable engagement with the connector body, wherein, upon axial compression of the compression member, the outer conductor flares out and is pressed between the ramped surface of the clamp and the internally ramped surface of the moveable ramped component is provided. Furthermore, a clamp and an associated method are also provided.
US09083110B2
A quick disconnect power adapter for maintaining a connection between a plug and a receptacle. In various embodiments, the quick disconnect power adapter maintains a completed circuit for providing power from a power source to an electrical device with a releasable fastener. In particular embodiments, the releasable fastener includes one or more magnets. In various embodiments, the quick disconnect power adapter is configured such that the electrical contact points of the plug and receptacle cannot be touched or otherwise contacted by a user when the plug and receptacle are not engaged.
US09083082B2
Apparatus, methods, and systems provide conversion of evanescent electromagnetic waves to non-evanescent electromagnetic waves and/or conversion of non-evanescent electromagnetic waves to evanescent electromagnetic waves. In some approaches the conversion includes propagation of electromagnetic waves within an indefinite electromagnetic medium, and the indefinite medium may include an artificially-structured material such as a layered structure or other metamaterial.
US09083077B2
An antenna device includes an antenna that performs wireless communication with an electronic key. A substrate is connected to the antenna. A housing includes the antenna and the substrate. A cover is coupled to the housing to cover the substrate, which is exposed from the housing. The cover includes a part formed from a transparent material and facing at least part of the substrate.
US09083073B2
Described herein are techniques related one or more systems, apparatuses, methods, etc. for integrating a near field communications (NFC) coil antenna in a portable device. For example, the NFC antenna is integrated under a metal chassis of the portable device. The metal chassis and a conductive coating—that is integrated underneath the full metal chassis—are designed to include one or more slots to provide high impedance to Eddy current induced in the conductive coating.
US09083060B2
The present disclosure provides a cable-type secondary battery, comprising: an inner electrode; and a sheet-form laminate of separation layer-outer electrode, spirally wound to surround the outer surface of the inner electrode, the laminate being formed by carrying out compression for the integration of a separation layer for preventing a short circuit, and an outer electrode.According to the present disclosure, the electrodes and the separation layer are compressed and integrated to minimize ununiform spaces between the separation layer and the outer electrode and reduce the thickness of a battery to be prepared, thereby decreasing resistance and improving ionic conductivity within the battery. Also, the separation layer coming into contact with the electrodes absorbs an electrolyte solution to induce the uniform supply of the electrolyte solution into the outer electrode active material layer, thereby enhancing the stability and performances of the cable-type secondary battery.
US09083058B2
Disclosed is a nonaqueous electrolytic solution which enables formation of a nonaqueous-electrolyte battery having high capacity and excellent storage characteristics at high temperatures, while sufficiently enhancing safety at the time of overcharge. A nonaqueous-electrolyte battery produced by using the nonaqueous electrolytic solution is also disclosed. The nonaqueous electrolytic solution comprises an electrolyte and a nonaqueous solvent, and includes any of specific nonaqueous electrolytic solutions (A) to (D).
US09083054B2
A lithium ion secondary battery is provided with a positive electrode, a negative electrode containing an active material, and an electrolytic solution, wherein the active material includes a core portion capable of occluding and releasing lithium ions, an amorphous or low-crystalline coating portion disposed on at least a part of the surface of the core portion, and a fibrous carbon portion disposed on at least a part of the surface of the coating portion, and the coating portion contains Si and O as constituent elements, while the atomic ratio y (O/Si) of O relative to Si satisfies 0.5≦y≦1.8.
US09083051B2
Provided is a process for producing a fuel cell electrode catalyst having high catalytic activity which uses a transition metal, e.g., titanium, which process comprises thermal treatment at relatively low temperature, i.e., not including thermal treatment at high temperature (calcining) step. The process for producing a fuel cell electrode catalyst comprises a step (1) of mixing at least a transition metal-containing compound, a nitrogen-containing organic compound and a solvent to provide a catalyst precursor solution; a step (2) of removing the solvent from the catalyst precursor solution; and a step (3) of thermally treating a solid residue obtained in the step (2) at a temperature of 500 to 1100° C. to provide an electrode catalyst; wherein the transition metal-containing compound is partly or wholly a compound comprising at least one transition metal element (M1) selected from the group 4 and 5 elements of the periodic table as a transition metal element.
US09083040B2
A rechargeable battery pack includes a plurality of unit cells, a protection circuit module, flexible printed circuit boards, and a case. The plurality of unit cells are comprised of a rechargeable battery and divided into a first group of unit cells and a second group of unit cells. The protection circuit module electrically protects the unit cells. The flexible printed circuit boards connect the unit cells to the protection circuit module. The case is equipped with the unit cells, the protection circuit module and the flexible printed circuit boards. The flexible printed circuit board forms a concave groove retracting corresponding to a positive electrode lead tab or a negative electrode lead tab in one of the first group of unit cells and the second group of unit cells, and include a bending part corresponding to the concave groove.
US09083033B2
Disclosed is a method including (a) mixing a precursor of a material for preparing at least one material selected from the group consisting of low crystalline carbon and amorphous carbon with a hydrophilic material, followed by purification to prepare a mixture for coating, (b) mixing the mixture for coating with a crystalline carbon-based material to prepare a core-shell precursor in which the mixture for coating is coated on a core including a crystalline carbon-based material, and (c) calcining the core-shell precursor to carbonize the material for preparing the at least one material selected from the group consisting of low crystalline carbon and amorphous carbon into the at least one material selected from the group consisting of low crystalline carbon and amorphous carbon.
US09083023B2
A desulfurization unit for a fuel cell system includes a first desulfurizer arranged in a temperature environment ranging from 50° C. to 200° C. and accommodating a desulfurizing agent including a porous material serving as a base material, the desulfurizing agent exerting a desulfurization effect in a normal temperature range, the first desulfurizer adsorbing a sulfur compound included in a source gas in the temperature environment ranging from 50° C. to 200° C. when the source gas having a low dew point is supplied through a source gas passage to the first desulfurizer and when the source gas having a high dew point is supplied through the source gas passage to the first desulfurizer.
US09083022B2
Provided is an electrode active material comprising a nickel-based lithium transition metal oxide (LiMO2) wherein the nickel-based lithium transition metal oxide contains nickel (Ni) and at least one transition metal selected from the group consisting of manganese (Mn) and cobalt (Co), wherein the content of nickel is 50% or higher, based on the total weight of transition metals, and has a layered crystal structure and an average primary diameter of 3 μm or higher, wherein the amount of Ni2+ taking the lithium site in the layered crystal structure is 5.0 atom % or less.
US09083013B2
In an electrochemical device having an element main body 1A enclosed in an exterior package 1B, a peripheral region of the exterior package 1B is provided with an elastic structure or a plurality of elastic structures R1, R2 having an elastic force in a thickness direction (Z-axis direction) of films. Each of the elastic structures R1, R2 has a first region of the exterior package 1B folded along a film outer edge, and a second region of the exterior package 1B opposed to the first region. Two ends R11, R13 (R21, R23) of the first region in a direction along the film outer edge are in contact with the second region, and between the two ends R11, R13 (R21, R23) there is a space (with a maximum height 2R) between the first region and the second region.
US09083011B2
Provided is an SOFC, including a fuel electrode (20), a thin-plate-like interconnector (30) provided on the fuel electrode and formed of a conductive ceramics material, and a conductive film (70) formed on a surface of the interconnector (30) opposite to the fuel electrode (20). The conductive film (70) is formed of an N-type semiconductor (e.g., LaNiO3). The N-type semiconductor generally has the property of exhibiting a smaller conductivity (a current hardly flows) at higher temperature. Therefore, a portion with a higher current density (thus, a portion with higher temperature) in the conductive film (70) in the vicinity of the interconnector (30) has a smaller conductivity (a current hardly flows). By virtue of this action, even though a “fluctuation in current density of a current flowing through the interconnector (30) and an area in the vicinity thereof” occurs for some reasons, the fluctuation can be suppressed.
US09083008B2
A bipolar plate assembly for a fuel cell is provided. The bipolar plate assembly includes a cathode plate disposed adjacent an anode plate, the cathode and anode plates formed having a first thickness of a low contact resistance, high corrosion resistance material by a deposition process. The first and second unipolar plates are formed on a removable substrate, and a first perimeter of the first unipolar plate is welded to a second perimeter of the second unipolar plate to form a hermetically sealed coolant flow path. A method for forming the bipolar plate assembly is also described.
US09083002B2
An organic light-emitting display device, having a first substrate, a second substrate facing the first substrate, a plurality of pixels disposed between the first and second substrates comprising a first electrode, a second electrode, and an organic light-emitting layer disposed between the first and second electrodes, for suppressing external light reflection and reducing pixel blurring by disposing a scattering structure in a direction a light is extracted at a distance equal to or below an adjacent pixel pitch.
US09083000B2
Disclosed is a light-emitting element with a microcavity structure which is capable of amplifying a plurality of wavelengths to give emission of a desired color. The light-emitting element includes a pair of electrodes and an EL layer having a light-emitting substance interposed between the pair of electrodes. One of the pair of electrodes gives a reflective surface and the other electrode gives a semi-reflective surface. The light-emitting element is arranged so that the emission of the light-emitting substance covers at least two wavelengths λ and an optical path length L between the reflective surface and the semi-reflective surface satisfies an equation L=nλ/2 where n is an integer greater than or equal to 2.
US09082999B2
An organic optoelectronic device incorporating a hermetic thin-film encapsulation, and encapsulation method are provided. This device has a useful emission or absorption face and, behind this face, a substrate coated with an array of radiation-emitting or radiation-absorbing organic structures inserted between, and electrically contacting, electrodes that are respectively proximal and distal relative to the substrate. Separating beads between structures, composed of an insulating material, extend between the respective proximal electrodes of the structures from peripheral edges of these electrodes. The device includes a hermetic encapsulation that has at least one inorganic internal film surmounting the distal electrode, a photosensitive polymer layer covering this internal film, and a dielectric inorganic external film acting as a barrier covering the polymer layer. The polymer layer is etched with a discontinuous geometry formed of segments that respectively surmount the structures and end beyond the structures in line with the beads.
US09082983B1
A thin film transistor having a solution-processed n-type copolymer semiconductor material. A thin-film transistor (TFT) device including, an organic TFT device having at least one substrate, at least one gate electrode, at least one electrically-insulating dielectric material, at least one drain electrode, at least one source electrode, and at least one n-type solution-processable semiconductor material.
US09082981B1
Disclosed are curable linear polymers that can be used as active and/or passive organic materials in various electronic, optical, and optoelectronic devices. In some embodiments, the device can include an organic semiconductor layer and a dielectric layer prepared from such curable linear polymers. In some embodiments, the device can include a passivation layer prepared from the linear polymers described herein. The present linear polymers can be solution-processed, then cured thermally (particularly, at relatively low temperatures) and/or photochemically into various thin film materials with desirable properties.
US09082975B2
Provided is a Bi-based piezoelectric material having good piezoelectric properties. The piezoelectric material includes a perovskite-type metal oxide represented by the following general formula (1): Ax(ZnjTi(1-j))l(MgkTi(1-k))mMnO3 General formula (1) where: A represents a Bi element, or one or more kinds of elements selected from the group consisting of trivalent metal elements and containing at least a Bi element; M represents at least one kind of an element selected from the group consisting of Fe, Al, Sc, Mn, Y, Ga, and Yb; and 0.9≦x≦1.25, 0.4≦j≦0.6, 0.4≦k≦0.6, 0.09≦l≦0.49, 0.19≦m≦0.64, 0.13≦n≦0.48, and l+m+n=1 are satisfied.
US09082965B2
A memory device including: one inert electrode including an electrically conductive material, a part of at least one material of resistivity higher than that of the material of the inert electrode, positioned around the inert electrode, a solid electrolyte positioned on at least one part of the inert electrode and of the part of electrically insulating material, and including metal ions originating from an ionizable metal part positioned on the solid electrolyte. The ratio between the coefficient of electrical resistivity of the material of resistivity higher than that of the material of the inert electrode and the coefficient of electrical resistivity of the material of the inert electrode is equal to or higher than approximately 100, and the coefficient of thermal conductivity of the electrically insulating material is equal to or higher than approximately 10 W·m−1·K−1.
US09082964B2
An embodiment, relates to a phase changeable memory cell. The phase changeable memory cell is formed with an ultra small contact area formed by filament conductive path. This contact area between a heating electrode and phase changeable material layer is determined by the forming of filament path, which is conductive and much smaller in cross-sectional area than the minimum area that can be achieved by lithography. This leads to high heating efficiency and ultra-low programming current. As the disclosed structure has no requirement on endurance for the formed filament and use phase changeable material rather than filament-forming material to provide high on/off resistance ratio, drawbacks of filament-forming material on low endurance and low sensing margin are avoided in the proposed cell structure. Therefore, by using ReRAM-related filament-forming materials to get sub-litho-dimension conductive path as heating electrode and using high on/off ratio phase changeable material as the storage media, it is possible to reduce the power consumption of phase changeable memory dramatically without the drawbacks of filament-forming materials that are shown in ReRAM.
US09082961B2
According to one embodiment, a method of manufacturing a multilayer film, the method includes forming a first layer, forming a second layer on the first layer, and transcribing a crystal information of one of the first and second layers to the other one of the first and second layers by executing a GCIB-irradiation to the second layer.
US09082959B2
An exemplary actuator in the form of a plate is disclosed, which includes, at least two generators for exciting an acoustic standing wave in the actuator. The actuator can have at least two main surfaces and a plane of symmetry S running perpendicularly to the main surfaces, with respect to which the generators are arranged symmetrically. A first lateral surface area can have a length L that substantially corresponds to the wavelength of the acoustic standing wave excited in the actuator. A second lateral surface area of the actuator can have a length (B) that is greater than the wavelength of the acoustic standing wave excited in the actuator, and that is not equal to a multiple of half the wavelength of the excited acoustic standing wave.
US09082956B2
Techniques for reducing damage in memory cells are provided. Memory cell structures are typically formed using dry etch and/or planarization processes which damage certain regions of the memory cell structure. In one or more embodiments, certain regions of the cell structure may be sensitive to damage. For example, the free magnetic region in magnetic memory cell structures may be susceptible to demagnetization. Such regions may be substantially confined by barrier materials during the formation of the memory cell structure, such that the edges of such regions are protected from damaging processes. Furthermore, in some embodiments, a memory cell structure is formed and confined within a recess in dielectric material.
US09082955B2
An object of the present invention is to provide a technique for suppressing thermal disturbance of a phase change memory device having a three-dimensional structure. In the phase change memory device having a three-dimensional structure, a material having a high thermal conductivity is used as a gate insulation film of a MOS transistor for selection, and causes heat transmitted to a Si channel layer from a phase change recording film to successfully diffuse to a gate electrode. In this way, since heat generated from a recording bit diffuses to a non-selected bit adjacent to it, it is possible to suppress thermal disturbance. BN, Al2O3, AlN, TiO2, Si3N4, ZnO and the like are useful as a gate insulation film having a high thermal conductivity.
US09082952B2
A curved high intensity focused ultrasound (HIFU) transducer comprising a curved piezoelectric array having opposite concave front and convex back surfaces, and a plurality of acoustic transmission areas, a plurality of electrodes located on the convex back surface of the curved piezoelectric array for applying electrical transmit signals to the acoustic transmission areas, and a printed circuit board spaced apart from and in opposition to the back surface of the curved piezoelectric array which couples electrical signals to the acoustic transmission areas, the printed circuit board comprising a plurality of metal contacts which are compliant in the presence of thermal expansion and contraction and which span the space between the printed circuit board and the curved piezoelectric array and are electrically coupled to electrodes of the acoustic transmission areas of the curved piezoelectric array.
US09082947B2
Discussed is a display device including a wiring substrate having a first substrate layer and a second substrate layer, a conductive adhesive layer configured to cover the wiring substrate, and a plurality of semiconductor light emitting devices coupled to the conductive adhesive layer, and electrically connected to a first electrode and a second electrode, wherein the first electrode is disposed at the first substrate layer, and the second substrate layer includes one surface facing the conductive adhesive layer and the other surface covering the first electrode, and an auxiliary electrode electrically connected to the first electrode and the second electrode are disposed on one surface of the second substrate layer.
US09082940B2
A method for producing an encapsulating layer-covered semiconductor element includes the steps of preparing a support sheet including a hard support board; disposing a semiconductor element at one side in a thickness direction of the support sheet; disposing an encapsulating layer formed from an encapsulating resin composition containing a curable resin at the one side in the thickness direction of the support sheet so as to cover the semiconductor element; curing the encapsulating layer to encapsulate the semiconductor element by the encapsulating layer that is flexible; cutting the encapsulating layer that is flexible corresponding to the semiconductor element to produce an encapsulating layer-covered semiconductor element; and peeling the encapsulating layer-covered semiconductor element from the support sheet.
US09082936B2
A flexible light sheet includes a thin substrate that allows light to pass through it, a transparent first conductor layer overlying the substrate, an array of vertical light emitting diodes (VLEDs) printed as an ink over the first conductor layer, each of the VLEDs having a bottom electrode electrically contacting the first conductor layer, a dielectric material between the VLEDs overlying the first conductor layer, and a transparent second conductor layer overlying the VLEDs and dielectric layer, each of the VLEDs having a top electrode electrically contacting the transparent second conductor layer. Each individual VLED may emit light bidirectionally. The VLEDs are illuminated by a voltage differential between the first conductor layer and the second conductor layer such that bidirectional light passes through the first conductor layer and the second conductor layer. Phosphor layers may be deposited on both sides to create white light using blue VLEDs.
US09082935B2
A light-emitting element includes: a light-emitting structure; a plurality of first contact portions separately on the light-emitting structure; and a plurality of reflective portions disposed separately among the plurality of first contact portions.
US09082933B2
The present invention is directed to a light emitting diode (LED) assembly and a method for fabricating the same. According to the present invention, there is provided an LED assembly comprising an LED comprising at least an N-type semiconductor layer and a P-type semiconductor layer; and bumps provided on the LED and electrically connected to the semiconductor layers, wherein the bump comprises a first region made of a gold (Au) compound including tin (Sn) and a second region made of gold.
US09082928B2
This patent incorporates several new modified irregular-shaped thermoelectric element designs and connections for use in thermoelectric conversion devices to increase efficiency and lower the cost and size of thermoelectric devices. Thermoelectric conversion devices using the new design criteria have demonstrated comparative higher performance than current commercially available standard thermoelectric conversion devices.
US09082924B2
The present invention relates to a method for preparing, on a silicon wafer, an n+pp+ or p+nn+ structure which includes the following consecutive steps: a) on a p or n silicon wafer (1), which includes a front surface (8) and a rear surface (9), a layer of boron-doped silicon oxide (BSG) (2) is formed on the rear surface (9) by PECVD, followed by a SiOx diffusion barrier (3); b) a source of phosphorus is diffused such that the phosphorus and the boron co-diffuse and in order also to form: on the front surface (8) of the wafer obtained at the end of step a), a layer of phosphorus-doped silicon oxide (PSG) (4) and an n+ doped area (5); and on the rear surface of the wafer obtained at the end of step a), a boron-rich area (BRL) (6), as well as a p+ doped area (7); c) the layers of BSG (2) and PSG (4) oxides and SiOx (3) are removed, the BRL (6) is oxidized and the layer resulting from said oxidation is removed. The invention also relates to a silicon wafer having an n+pp+ or p+nn+ structure, which can be obtained by said preparation method, as well as to a photovoltaic panel manufactured from such a silicon wafer.
US09082907B2
A device includes a neutron-sensitive composition. The composition includes, in weight percent, a non-zero amount of aluminum oxide (e.g., approximately 1% to approximately 3.5% aluminum oxide), greater than 12% (e.g., approximately 12% to approximately 17%) boron oxide, greater than approximately 60% silicon oxide (e.g., approximately 62% to approximately 68% silicon oxide), and a non-zero amount of sodium oxide (e.g., approximately 10% to approximately 14% sodium oxide). The device is capable of interacting with neutrons to form an electron cascade.
US09082906B2
The present invention relates to a photoluminescent composition comprising an acene compound having general formula (I) or (Ia) and a benzothiadiazole compound having general formula (II), and the relative use as photoluminescent composition in a spectrum converter. A spectrum converter comprising the photoluminescent composition defined above, comprising the above compounds having general formula (I) or (Ia) and (II) and a solar device comprising said spectrum converter, are also described.
US09082904B2
The present invention provides a solar cell module which has high design freedom and can be easily manufactured at low cost. A solar cell module (10) includes (i) a light guide plate (1), (ii) a fluorescence-dispersed film (2) in each of which a fluorescent substance is dispersed and which is adhered to respective at least one surface of the light guide plate (1), and (iii) a solar cell element (3) which is provided on another surface of the light guide plate (1) which another surface being perpendicular to the at least one surface. Therefore, it is not necessary to prepare a light guide plate in which a fluorescent substance is dispersed. Moreover, it is possible to arbitrarily pattern the fluorescence-dispersed film (2) or to stack the fluorescence-dispersed films (2).
US09082899B2
Electrically conductive polymeric compositions adapted for use in forming electronic devices are disclosed. The compositions are thermally curable at temperatures less than about 250° C. Compositions are provided which may be solvent-free and so can be used in processing or manufacturing operations without solvent recovery concerns. The compositions utilize (i) fatty acid modified epoxy acrylate and/or methacrylate monomer(s) and/or oligomer(s), (ii) fatty acid modified polyester acrylate and/or methacrylate monomer(s) and/or oligomer(s), or combinations of (i) and (ii). Also described are electronic assemblies such as solar cells using the various compositions and related methods.
US09082893B2
A luminescent device and a manufacturing method for the luminescent device and a semiconductor device which are free from occurrence of cracks in a compound semiconductor layer due to the internal stress in the compound semiconductor layer at the time of chemical lift-off. The luminescent device manufacturing method includes forming a device region on part of an epitaxial substrate through a lift-off layer; forming a sacrificing portion, being not removed in a chemical lift-off step, around device region on epitaxial substrate; covering epitaxial substrate and semiconductor layer and forming a covering layer such that level of surface thereof in the region away from device region is lower than luminescent layer surface; removing covering layer on semiconductor layer, and that on sacrificing portion surface; forming a reflection layer on covering layer surface and semiconductor layer surface; and forming a supporting substrate by providing plating on reflection layer.
US09082886B2
A tap cell includes a well region and a well pickup region of the well region; a VDD power rail; and a VSS power rail. A MOS capacitor includes a gate electrode line acting as a first capacitor plate, and the well pickup region acting as a part of a second capacitor plate. A first one of the first and second capacitor plates is coupled to the VDD power rail, and a second one of the first and second capacitor plates is coupled to the VSS power rail.
US09082871B2
A substrate of a semiconductor package includes a first wiring substrate having a first surface and a second surface facing each other, the first surface having a semiconductor chip mounted thereon, a first support carrier, and an adhesive film connecting the second surface and the first support carrier.
US09082870B2
Methods and apparatus are disclosed which reduce the stress concentration at the redistribution layers (RDLs) of a package device. A package device may comprise a seed layer above a passivation layer, covering an opening of the passivation layer, and covering and in contact with a contact pad. A RDL is formed above the passivation layer, above and in contact with the seed layer, covering the opening of the passivation layer, and electrically connected to the contact pad through the seed layer. The RDL has an end portion with a surface that is smooth without a right angle. The surface of the end portion of the RDL may have an obtuse angle, or a curved surface.
US09082868B2
A semiconductor component and a method for manufacturing the semiconductor component. In accordance with an embodiment, the semiconductor component includes a plurality of stacked semiconductor chips mounted to a support structure, wherein one semiconductor chip has a side with a plurality of electrical contacts electrically coupled to conductive tabs of the support structure. An electrical connector electrically connects an electrical contact formed from a side opposite the side with the plurality of electrical contacts to a corresponding conductive tab. Another semiconductor chip is mounted to the electrical connector and electrical contacts formed from this semiconductor chip are electrically connected to corresponding conductive tabs of the support structure.
US09082863B2
The present invention provides a transistor having electrically stable characteristics. In addition, the reliability of a semiconductor device including such a transistor is increased. The semiconductor device includes a gate electrode layer, a gate insulating film over the gate electrode layer, an oxide semiconductor stacked film overlapping with the gate electrode layer with the gate insulating film provided therebetween, and a pair of electrode layers in contact with the oxide semiconductor stacked film. In the semiconductor device, the oxide semiconductor stacked film includes at least indium and includes a first oxide semiconductor layer, a second oxide semiconductor layer, and a third oxide semiconductor layer which are sequentially stacked. Further, the first oxide semiconductor layer has an amorphous structure, the second oxide semiconductor layer and the third oxide semiconductor layer include a crystal part whose c-axis is substantially perpendicular to a top surface of the oxide semiconductor stacked film.
US09082860B2
A semiconductor device of stable electrical characteristics, whose oxygen vacancies in a metal oxide is reduced, is provided. The semiconductor device includes a gate electrode, a gate insulating film over the gate electrode, a first metal oxide film over the gate insulating film, a source electrode and a drain electrode which are in contact with the first metal oxide film, and a passivation film over the source electrode and the drain electrode. A first insulating film, a second metal oxide film, and a second insulating film are stacked sequentially in the passivation film.
US09082858B2
The band tail state and defects in the band gap are reduced as much as possible, whereby optical absorption of energy which is in the vicinity of the band gap or less than or equal to the band gap is reduced. In that case, not by merely optimizing conditions of manufacturing an oxide semiconductor film, but by making an oxide semiconductor to be a substantially intrinsic semiconductor or extremely close to an intrinsic semiconductor, defects on which irradiation light acts are reduced and the effect of light irradiation is reduced essentially. That is, even in the case where light with a wavelength of 350 nm is delivered at 1×1013 photons/cm2·sec, a channel region of a transistor is formed using an oxide semiconductor, in which the absolute value of the amount of the variation in the threshold voltage is less than or equal to 0.65 V.
US09082855B2
A thin film transistor display panel includes a gate electrode on a substrate; a gate insulating layer on the substrate and the gate electrode; a planarization layer on the gate insulating layer and at opposing sides of the gate electrode, where the planarization layer exposes the gate insulating layer; a semiconductor layer on the gate insulating layer; and a source electrode and a drain electrode on the semiconductor layer and spaced apart from each other.
US09082852B1
A FinFET includes a semiconductor fin supporting a first transistor and a second transistor. A first transistor gate electrode extends over a first channel region of the fin and a second transistor gate electrode extends over a second channel region of the fin. Epitaxial growth material on a top of the fin forms a raised source region on a first side of the first transistor gate electrode, an intermediate region between a second side of the first transistor gate electrode and a first side of the second transistor gate electrode, and a raised drain region on a second side of the second transistor gate electrode. The first and second transistor gate electrodes are short circuit connected to each other, with the first transistor configured to have a first threshold voltage and the second transistor configured to have a second threshold voltage different from the first threshold voltage.
US09082848B2
A semiconductor device and a method for manufacturing the same are capable of improving GIDL in a buried gate, and preventing degradation of device characteristics and reliability due to reduction in gate resistance. The semiconductor device may include: junction regions formed at both sidewalls of a trench formed in a semiconductor substrate; a first gate electrode formed in a lower portion of the trench; a second gate electrode formed on at least one inner sidewall of the trench which overlaps one of the junction regions on the first gate electrode; and a third gate electrode formed on one side of the second gate electrode on the first gate electrode.
US09082841B1
A semiconductor device includes a substrate, an insulation layer disposed over the substrate, covering a drift region, and including a first edge and a second edge opposite to the first edge, a gate layer covering the first edge of the insulation layer, and a metal layer including a metal portion connected to the gate layer and overlapping the first edge of the insulation layer. The metal portion includes a first edge located closer to a central portion of the insulation layer than an opposite second edge of the metal portion. A distance from the first edge of the metal portion to the first edge of the insulation layer along a channel length direction is a. A distance from the first edge of the insulation layer to the second edge of the insulation layer is L. A ratio of a/L is equal to or higher than 0.46.
US09082840B2
A method for preparing a semiconductor wafer into individual semiconductor dies uses both a dicing before grinding step and/or via hole micro-fabrication step, and an adhesive coating step.
US09082839B2
The present invention provides a method for plasma dicing a substrate. The method comprising: providing a process chamber having a wall; providing a plasma source adjacent to the wall of the process chamber; providing a work piece support within the process chamber; placing the substrate on a carrier support to form a work piece; providing an intermediate ring interposed between the substrate and the frame; loading the work piece onto the work piece support; generating a plasma through the plasma source; and etching the work piece through the generated plasma.
US09082828B2
Embodiments of the present disclosure provide a method for controlling moisture from substrate being processed. Particularly, embodiments of the present disclosure provide methods for removing moisture from polymer materials adjacent bond pad areas. One embodiment of the present includes providing a moisture sensitive precursor and forming a compound from a reaction between the moisture to be controlled and the moisture sensitive precursor.
US09082820B2
A first wiring part has an intermediate layer made of a material different from materials of a first insulator layer and a first conductor layer and located between the first insulator layer and the first conductor layer. In a step of forming a first hole, which penetrates through a first element part and the first insulator layer, from a side of a first semiconductor layer toward the first conductor layer, and forming a second hole, which penetrates through the first element part, the first wiring part, and a second insulator layer, from the side toward the second conductor layer, an etching condition of the first insulator layer when the first hole is formed is that an etching rate for the material of the first insulator layer under the etching condition is higher than an etching rate for the material of the intermediate layer under the etching condition.
US09082819B2
The invention relates to a process for thinning the active silicon layer of a substrate, which comprises an insulator layer between the active layer and a support, this process comprising one step of sacrificial thinning of active layer by formation of a sacrificial oxide layer by sacrificial thermal oxidation and deoxidation of the sacrificial oxide layer. The process is noteworthy in that it comprises: a step of forming a complementary oxide layer on the active layer, using an oxidizing plasma, this layer having a thickness profile complementary to that of oxide layer, so that the sum of the thicknesses of the oxide layer and of the sacrificial silicon oxide layer are constant over the surface of the treated substrate, a step of deoxidation of this oxide layer, so as to thin active layer by a uniform thickness.
US09082811B2
A bipolar power semiconductor transistor is disclosed. The transistor includes a semiconductor substrate of a first conductivity type, a first semiconductor region of the first conductivity type disposed on the semiconductor substrate; a semiconductor drift region of a second conductivity type, opposite the first conductivity type, disposed on the first semiconductor region, a body region of the first conductivity type located within the semiconductor drift region, a source region of the second conductivity type located within the body region, a gate placed above and in contact to the source region, the gate to control charge in a channel region between the semiconductor drift region and the source region and to thereby control flow of charge within the semiconductor drift region. The semiconductor substrate includes a material having silicon (Si) and the first semiconductor region includes a material having 3-step cubic silicon carbide (3C-SiC).
US09082808B2
A chip package is described which includes a first chip having a first surface and first sides having a first side-wall angle, and a second chip having a second surface and second sides having a second side-wall angle, which faces and is mechanically coupled to the first chip. The chip package is fabricated using a batch process, and the chips in the chip package were singulated from their respective wafers after the chip package is assembled. This is accomplished by etching the first and second side-wall angles and thinning the wafer thicknesses prior to assembling the chip package. For example, the first and/or the second side walls can be fabricated using wet etching or dry etching. Therefore, the first and/or the second side-wall angles may be other than vertical or approximately vertical.
US09082801B2
A rotatable locating apparatus including a fixing base, a rotatable rack, a first driving module, a carrier, and a second driving module is provided. The rotatable rack is pivoted on the fixing base through a first rotation axis. The first driving module is coupled to the rotatable rack to drive the rotatable rack rotating with respect to the fixing base along the first rotation axis. The carrier is provided with accommodating slots on an arc surface of the carrier, and the carrier is pivoted on the rotatable rack through a second rotation axis. The second rotation axis passes through a curvature center of the arc surface and is perpendicular to the first rotation axis. The curvature center is located on the first rotation axis. The second driving module is coupled to the carrier to drive the carrier rotating with respect to the rotatable rack along the second rotation axis.
US09082796B2
A processing device for processing stacked processed goods for the production of conducting, semiconducting, or insulating thin layers includes, in at least one embodiment, an evacuatable process chamber configured to receive a process gas. A tempering device keeps at least a partial region of a wall of the evacuatable process chamber at a predetermined first temperature during at least part of the processing. The first temperature is between a second temperature that is room temperature and a third temperature, generated in the evacuatable process chamber, that is above room temperature. A heated gas flow cycle flows through a gas guiding device in the evacuatable process chamber. The stacked processed goods are insertable through a lockable loading opening into the gas guiding device, and a gas inlet device feeds the process gas into the gas flow cycle. A process system may further include a cooling device and/or a channeling device.
US09082795B2
A thin film transistor substrate according to an exemplary embodiment of the present invention includes a semiconductor layer including metal disposed on an insulating substrate, a gate electrode overlapping the semiconductor layer, and a source electrode and a drain electrode overlapping the semiconductor layer, wherein the metal in the semiconductor layer comprises indium (In), zinc (Zn), and tin (Sn), and a molar ratio ( R , R [ mol % ] = [ In ] [ In + Zn + Sn ] × 100 ) of indium (In) to the metals in the semiconductor layer is less than about 20%, and more specifically, the molar ratio ( R , R [ mol % ] = [ In ] [ In + Zn + Sn ] × 100 ) of indium (In) of the metals in the semiconductor layer is about 5% to about 13%.
US09082791B2
This document relates to a method of forming low-resistance metal gate and data wirings and a method of manufacturing a thin film transistor using the same. The method of the wiring includes depositing a metal layer on a base layer; exposing a portion of the base layer by removing a portion of the metal layer; forming grooves in the base layer; forming a seed layer in the grooves of the base layer; and forming a wire consisting of the seed layer and a plated layer by plating a plating material on the seed layer formed in the grooves of the base layer.
US09082789B2
An integrated circuit device and method for manufacturing an integrated circuit device is disclosed. The integrated circuit device comprises a core device and an input/output circuit. Each of the core device and input/output circuit includes a PMOS structure and an NMOS structure. Each of the PMOS includes a p-type metallic work function layer over a high-k dielectric layer, and each of the NMOS structure includes an n-type metallic work function layer over a high-k dielectric layer. There is an oxide layer under the high-k dielectric layer in the input/output circuit.
US09082786B2
A method of forming a memory cell is provided. The method includes forming a first pillar-shaped element that includes a first semiconductor material, forming a first opening self-aligned with the first pillar-shaped element, and depositing a second semiconductor material in the first opening to form a second pillar-shaped element above the first pillar-shaped element. Other aspects are also provided.
US09082783B2
The semiconductor device fabrication method of the present invention includes: laminating a plurality of amorphous silicon films on a semiconductor substrate, forming through-holes that pass through the plurality of amorphous silicon films, and subjecting the plurality of amorphous silicon films 301 that include the through-holes to an etching process that uses an alkaline aqueous solution; wherein the plurality of amorphous silicon films is formed to include a first amorphous silicon film and a second amorphous silicon film in which the rate of etching by using the alkaline aqueous solution is slower than that of the first amorphous silicon film and the first amorphous silicon film is interposed between the semiconductor substrate and the second amorphous silicon film.
US09082782B2
This disclosure provides a method of fabricating a semiconductor stack and associated device, such as a capacitor and DRAM cell. In particular, a bottom electrode has a material selected for lattice matching characteristics. This material may be created from a relatively inexpensive metal oxide which is processed to adopt a conductive, but difficult-to-produce oxide state, with specific crystalline form; to provide one example, specific materials are disclosed that are compatible with the growth of rutile phase titanium dioxide (TiO2) for use as a dielectric, thereby leading to predictable and reproducible higher dielectric constant and lower effective oxide thickness and, thus, greater part density at lower cost.
US09082776B2
A semiconductor package includes a semiconductor substrate, a contact pad overlying the semiconductor substrate, an interconnect layer overlying the contact pad, a passivation layer formed between the contact pad and the interconnect layer, a bump overlying the interconnect layer, and a protection layer overlying the interconnect layer and the passivation layer and covering a lower portion of the bump. The protection layer includes a curved surface region.
US09082775B2
The present invention describes two systems (100, 300) for encapsulation of semiconductor dies. Both systems (100, 300) involve attaching an encapsulation spacer (102, 302, 302a, 302b) having one or more apertures (104, 304) on an associated substrate (150) so that a group of chips is located within the aperture (104, 304). The first system (100) involves dispensing encapsulant (103) directly into an aperture. The second system (300) involves attaching an encapsulant delivery layer (350, 351) onto the encapsulation spacer and discharging encapsulant into an aperture via a recessed gate (308).
US09082763B2
Disclosed embodiments include wire joints and methods of forming wire joints that can enable realization of fine pitch joints and collapse control for various packages. A first embodiment is a structure comprising a first substrate, a second substrate, and a wire joint. The first substrate comprises a first bonding surface, and the second substrate comprises a second bonding surface. The first bonding surface is opposite and faces the second bonding surface. The wire joint is attached to and between the first bonding surface and the second bonding surface.
US09082762B2
A process comprises manufacturing an electromigration-resistant under-bump metallization (UBM) flip chip structure comprising a Cu layer by applying to the Cu layer a metallic reaction barrier layer comprising NiFe. The solder employed in the flip chip structure comprise substantially lead-free tin. A structure comprises a product produced by this process. In another embodiment a process comprises manufacturing an electromigration-resistant UBM Sn-rich Pb-free solder bump flip chip structure wherein the electromigration-resistant UBM structure comprises a four-layer structure, or a three-layer structure, wherein the four layer structure is formed by providing 1) an adhesion layer, 2) a Cu seed layer for plating, 3) a reaction barrier layer, and 4) a wettable layer for joining to the solder, and the three-layer structure is formed by providing 1) an adhesion layer, 2) a reaction barrier layer, and 3) a wettable layer. In a further embodiment, the reaction barrier layer comprises metals selected from Ni, Fe, Pd, Pt, Co, Cu and their alloys, and combinations thereof. A structure comprises a product produced by the immediately foregoing process.
US09082756B2
A manufacturing of a semiconductor device includes forming one of a layer with a first metal and the layer with a second metal on one of a semiconductor chip mounting area of a support plate and a back surface of the semiconductor chip; forming the other of the layer with the first metal and the layer with the second metal on an area corresponding to a part of the area, in which one of the layer with the first metal and the layer with the second metal, of the other one of the semiconductor chip mounting area and the back surface of the semiconductor chip; and forming a layer which includes an alloy with the first metal and the second metal after positioning the semiconductor chip in the semiconductor chip mounting area to bond the semiconductor chip with the semiconductor chip mounting area.
US09082752B2
An electronic device includes a circuit board, a heat generating component positioned on the circuit board, a casing receiving the circuit board and the heat generating component, and a working medium. The working medium is contained in the casing and covers the heat generating component. The working medium is electrically insulated and phase-change material, and represents solid state at normal temperature.
US09082738B2
A semiconductor package, comprises an encapsulant which contains a semiconductor substrate, the package lower side being mountable on a surface. The semiconductor substrate backside is in close proximity of the semiconductor package lower side for improved thermal conductivity to the surface. The active side of the semiconductor substrate, facing the upper side of the semiconductor package, has a plurality of die contacts. A plurality of electrically conductive interconnects are connected to the die contacts and extend to the lower side of the semiconductor package for connecting the die contacts to the surface.
US09082737B2
A semiconductor package including a fail open mechanism is disclosed. An embodiment includes a semiconductor package having a chip carrier, a chip disposed on the chip carrier and an encapsulant encapsulating the chip and the chip carrier. The semiconductor package further including a pin protruding from the encapsulant and a fail open mechanism disposed on the encapsulant and connected to the pin, wherein the fail open mechanism is configured to be disconnected from the pin if a temperature exceeds a pre-determined temperature.
US09082726B2
An organic light-emitting display apparatus includes: a display substrate; a plurality of organic light-emitting diodes (OLEDs) on the display substrate, the OLEDs being divided from one another by a pixel defining layer (PDL); an encapsulation substrate on the display substrate and covering the OLEDs; a filling material on the PDL and between the display substrate and the encapsulation substrate; and a cavity between the OLEDs and the encapsulation substrate.
US09082719B2
Embodiments provide a method for removing a dielectric layer from a bottom of a trench while maintaining the dielectric layer on sidewalls of the trench. The method includes etching the dielectric layer at the bottom of the trench and generating a passivation layer on the dielectric layer at an upper portion of the trench by adjusting the conditions of a plasma etch process to a first mode; and a step of etching the dielectric layer at the bottom of the trench and etching the passivation layer at the upper portion of the trench by adjusting the conditions of the plasma etch process to a second mode before the dielectric layer at the bottom of the trench is completely removed.
US09082718B2
Various embodiments are directed to fine pattern structures, such as fine pattern structures having block co-polymer materials, methods of forming fine pattern structures with block co-polymer materials, and methods of fabricating semiconductor devices including fine pattern structures with block co-polymer materials. According to some embodiments, a method of fabricating a fine pattern structure includes providing a layer of alternating protrusion portions and recess portions, forming polymer patterns in recess regions formed in the recess portions, forming brush patterns on top surfaces of the protrusion portions, forming first polymer block patterns on the brush patterns and second polymer block patterns on the polymer patterns, and removing the second polymer block patterns and the polymer patterns.
US09082716B2
A method of manufacturing a semiconductor device, includes the steps of forming a top surface nitride film on a top surface of a substrate and a bottom surface nitride film on a bottom surface of the substrate, forming a protective film on the top surface nitride film, removing the bottom surface nitride film by wet etching while the top surface nitride film is being protected by the protective film, removing the protective film after the removing of the bottom surface nitride film, patterning the top surface nitride film so as to form an opening in the top surface nitride film, and forming a second oxide film on the bottom surface of the substrate while forming a first oxide film on a surface portion of the substrate which is exposed by the opening.
US09082712B2
A device wafer has a plurality of devices individually formed in a plurality of separate regions on the front side of the wafer, the separate regions being defined by a plurality of crossing division lines. The wafer is processed by imaging the front side of the wafer to detect and store a target pattern, holding the front side of the wafer and grinding the back side of the wafer to thereby reduce the thickness to a predetermined thickness, imaging the front side of the wafer and next positioning the wafer with respect to a ring frame according to the target pattern stored so that the wafer is oriented to a predetermined direction, and attaching an adhesive tape to the back side of the wafer to thereby mount the wafer through the adhesive tape to the ring frame.
US09082705B2
The present disclosure describes a method of forming a memory device. The method includes receiving a wafer substrate, forming a poly stack pattern on the wafer substrate, performing an ion implantation process to form a source and a drain in the wafer substrate, forming a memory gate and a control gate in the defined poly stack pattern, and forming a control gate in the control poly stack pattern. Forming the memory gate further includes performing a memory gate recess to bury the memory gate in an oxide layer.
US09082703B2
According to one embodiment, a nonvolatile semiconductor memory device includes: a semiconductor layer; a first insulating film provided on the semiconductor layer; a floating gate layer provided on the first insulating film; a second insulating film provided on the floating gate layer; and a gate electrode provided on the second insulating film, the first insulating film including silicon, oxygen, and carbon. Concentration of the carbon in a direction from the semiconductor layer side toward the floating gate layer side has a maximum between the semiconductor layer and the floating gate layer, and the maximum being located nearer to the semiconductor layer side than to the floating gate layer side.
US09082702B2
Provided are devices and methods utilizing TiN and/or TaN films doped with Si, Al, Ga, Ge, In and/or Hf. Such films may be used as a high-k dielectric cap layer, PMOS work function layer, aluminum barrier layer, and/or fluorine barrier. These TiSiN, TaSiN, TiAlN, TaAlN, TiGaN, TaGaN, TiGeN, TaGeN, TiInN, TaInN, TiHfN or TaHfN films can be used where TiN and/or TaN films are traditionally used, or they may be used in conjunction with TiN and/or TaN.
US09082698B1
One illustrative method disclosed includes, among other things, forming a fin in a substrate, forming a well implant region in at least the substrate, forming a punch-stop implant region in the fin, performing at least one neutral implantation process with at least one neutral implant material to form a neutral boron-diffusion-blocking implant region in the fin, wherein an upper surface of the neutral boron-diffusion-blocking implant region is positioned closer to an upper surface of the fin than either the punch-stop implant region or the well implant region and, after forming the well implant region, the punch-stop implant region and the neutral boron-diffusion-blocking implant region, forming a gate structure above the fin.
US09082696B2
A system and method for forming a resistor system is provided. An embodiment comprises a resistor formed in a U-shape. The resistor may comprise multiple layers of conductive materials, with a dielectric layer filling the remainder of the U-shape. The resistor may be integrated with a dual metal gate manufacturing process or may be integrated with multiple types of resistors.
US09082689B2
A semiconductor structure is provided that includes a base substrate, and a multilayered stack located on the base substrate. The multilayered stack includes, from bottom to top, a first sacrificial material layer having a first thickness, a first semiconductor device layer, a second sacrificial material layer having a second thickness, and a second semiconductor device layer, wherein the first thickness is less than the second thickness.
US09082688B2
A display device including an oxide semiconductor, a protective circuit and the like having appropriate structures and a small occupied area is necessary. The protective circuit is formed using a non-linear element which includes a gate insulating film covering a gate electrode; a first oxide semiconductor layer which is over the gate insulating layer and overlaps with the gate electrode; and a first wiring layer and a second wiring layer each of which is formed by stacking a conductive layer and a second oxide semiconductor layer and whose end portions are over the first oxide semiconductor layer and overlap with the gate electrode. The gate electrode of the non-linear element is connected to a scan line or a signal line, the first wiring layer or the second wiring layer of the non-linear element is directly connected to the gate electrode layer so as to apply potential of the gate electrode.
US09082686B2
A semiconductor package includes a first substrate, a plurality of memory chips horizontally disposed on the first substrate, and having one surfaces which face the first substrate, other surfaces which face away from the one surfaces, and first bumps formed on the other surfaces, a second substrate disposed on the plurality of memory chips and electrically connected, a sub-substrate horizontally disposed on the first substrate together with the plurality of memory chips and electrically connecting the first substrate and the second substrate, and a driving chip having second bumps on one surface thereof and mounted to the second substrate such that the second bumps are electrically connected with the second substrate.
US09082677B2
An area sensor of the present invention has a function of displaying an image in a sensor portion by using light-emitting elements and a reading function using photoelectric conversion devices. Therefore, an image read in the sensor portion can be displayed thereon without separately providing an electronic display on the area sensor. Furthermore, a photoelectric conversion layer of a photodiode according to the present invention is made of an amorphous silicon film and an N-type semiconductor layer and a P-type semiconductor layer are made of a polycrystalline silicon film. The amorphous silicon film is formed to be thicker than the polycrystalline silicon film. As a result, the photodiode according to the present invention can receive more light.
US09082672B2
A semiconductor device has a semiconductor substrate, an electrode pad formed on a surface of the semiconductor substrate, and a protruding electrode electrically connected to the electrode pad. The protruding electrode comprises a pedestal part formed on the electrode pad and a protruding part formed on the pedestal part. The protruding part has a columnar part with a width smaller than that of the pedestal part, and a tapered part with a width gradually increased from an end of the columnar part side toward an end of the pedestal part side. An angle of inclination of a side surface of the tapered part with respect to a plane surface perpendicular to the surface is larger than an angle of inclination of a side surface of the pedestal part and an angle of inclination of a side surface of the columnar part with respect to the plane surface.
US09082671B2
An array substrate for a liquid crystal display device comprises: gate and data lines crossing each other on a substrate to define a pixel region; a common line spaced apart from and parallel with the gate line; a thin film transistor in the pixel region and connected to the gate and data lines; a passivation layer on the thin film transistor; and pixel and common electrodes alternately arranged to produce an in-plane electric field, wherein each of the pixel and common electrodes has a double-layered structure of which the lower layer is formed of reflective conductive material and the upper layer is formed of transparent conductive material.
US09082669B2
An array substrate is disclosed. The array substrate includes an array of pixel units on a substrate, gate lines, and data lines. The array substrate also includes common electrode lines. Each pixel unit includes a TFT, a pixel electrode, and a common electrode. The TFT is connected with one of the gate lines, one of the common electrode lines, and the common electrode. The pixel electrode is connected with the data line. In addition, the array of pixel units includes a plurality of first pixel units and a plurality of second pixel units with opposite potential polarities, where the first pixel units and the second pixel units are arranged alternatively in same rows/columns.
US09082668B2
A display panel including a first switching element, a first pixel electrode electrically connected to the first switching element, the first pixel electrode including a reflective material. A first light emitting layer is disposed on the first pixel electrode, and emits light having a first color when a voltage is applied to the first pixel electrode. A thin encapsulation film is disposed on the first light emitting layer, and protects the first light emitting layer. A pressure sensitive adhesive layer is disposed on the thin encapsulation film, and a first color filter is disposed on the pressure sensitive adhesive layer, corresponding to the first light emitting layer, and has the first color.
US09082648B2
An insulated gate turn-off (IGTO) device has a layered structure including a p+ layer (e.g., a substrate), an n-type layer, a p-type layer (which may be a p-well), n+ regions formed in the surface of the p-type layer, and insulated planar gates over the p-type layer between the n+ regions. The layered structure forms vertical NPN and PNP transistors. The p-type layer forms the base of the NPN transistor. When the gates are sufficiently positively biased, the underlying p-type layer inverts to reduce the width of the base to increase the beta of the NPN transistor. This causes the product of the betas of the NPN and PNP transistors to exceed one, and the device becomes fully conductive. When the gate voltage is removed, the base width increases such that the product of the betas is less than one, and the device shuts off. No latch-up occurs in normal operation.
US09082647B2
There is provided a semiconductor device. The semiconductor device may include multiple contacts plugs, an insulation layer pattern, a metal oxide layer pattern, a metal pattern and a metal line. The contact plugs contact a substrate. The insulation layer pattern is formed between the contact plugs and has a top surface lower than those of the contact plugs. The metal oxide layer pattern is formed on the insulation layer pattern, and has a dielectric constant higher than that of silicon oxide. The metal pattern is formed on the metal oxide layer pattern and contacts sidewalls of the contact plugs. The metal line contacts top surfaces of the contact plugs and the metal pattern and extends thereon.
US09082644B2
A method of producing and testing a chip package is described. The chip package to be produced includes a semiconductor chip containing an integrated circuit and a reinforcing structure attached to the semiconductor chip. Further, the chip package has a lower main face and an upper main face opposite to the lower main face, wherein the lower main face is at least partly formed by an exposed surface of the semiconductor chip and the upper main face is formed by a terminal surface of the reinforcing structure on which external terminal pads of the chip package are arranged. After production, the package is subjected to a package-level burn-in test.
US09082636B2
Packaging methods and structures for semiconductor devices are disclosed. In one embodiment, a packaged semiconductor device includes a redistribution layer (RDL) having a first surface and a second surface opposite the first surface. At least one integrated circuit is coupled to the first surface of the RDL, and a plurality of metal bumps is coupled to the second surface of the RDL. A molding compound is disposed over the at least one integrated circuit and the first surface of the RDL.
US09082631B1
A circuit having a first MOS transistor of a first type configured in a common-source amplifier topology for receiving an input signal and outputting an intermediate signal, a first MOS transistor of a second type configured in a self-biased topology biased via a first self-biasing RC network for providing termination for the intermediate signal, a second MOS transistor of the second type configured in a common-source amplifier topology for receiving the intermediate signal and outputting an output signal, and a second of MOS transistor of the first type configured in a self-biased topology via a second self-biasing RC network for providing termination to the output signal.
US09082621B2
Each of first and second material substrates made of single crystal silicon carbide has first and second back surfaces, first and second side surfaces, and first and second front surfaces. The first and second back surfaces are connected to a supporting portion. The first and second side surfaces face each other with a gap interposed therebetween, the gap having an opening between the first and second front surfaces. A closing portion for closing the gap over the opening is formed. A connecting portion for closing the opening is formed by depositing a sublimate from the first and second side surfaces onto the closing portion. The closing portion is removed. A silicon carbide single crystal is grown on the first and second front surfaces.
US09082617B2
An integrated circuit and a method of fabricating the integrated circuit are provided. In various embodiments, the integrated circuit includes a semiconductor substrate, at least one deep n-well in the semiconductor substrate, at least one p-channel metal-oxide-semiconductor transistor in the deep n-well, at least one n-channel metal-oxide-semiconductor transistor outside of the deep n-well, an first interconnect structure, and a protection component. Both of the p-channel metal-oxide-semiconductor transistor and the n-channel metal-oxide-semiconductor transistor are disposed in the semiconductor substrate, and are electrically coupled by the first interconnect structure. The protection component is disposed in the semiconductor substrate, wherein the protection component is electrically coupled to the deep n-well.
US09082610B2
The present invention provides a method for cleaning a semiconductor wafer, in which the method includes cleaning steps of HF cleaning, ozonated water cleaning and HF cleaning in this order at least one time, wherein in the HF cleaning carried out last in the method for cleaning the semiconductor wafer, cleaning is so carried out that an oxide film formed on a surface of the semiconductor wafer by the ozonated water is not entirely removed and to remain a part of a thickness thereof on the surface of the semiconductor wafer. As a result, a method for cleaning a semiconductor wafer in which a metal impurity level and a particle level can be reduced simultaneously in the cleaning of the semiconductor wafer is provided.
US09082595B2
A coating apparatus is revealed that is designed to coat substrates by means of a physical vacuum deposition process or a chemical vacuum deposition process or a combination thereof. Said coating apparatus is particular in that it uses a rotatable magnetron (14) that is coverable with an axially moveable shutter (18). Such an arrangement enables to keep the magnetron target clean or to clean the target in between or even during subsequent coating steps. The shutter further provides for a controllable gas atmosphere in the vicinity of the target. The arrangement wherein the magnetron is centrally placed is described. Substrates are then exposed to the sputtering source from all angles by hanging them on a planetary carousel (24) that turns around the magnetron.
US09082594B2
A method for performing chamber-to-chamber matching includes receiving a voltage and a current measured at an output of an RF generator of a first plasma system. The method further includes calculating a sum of terms. The first term is a first product of a coefficient and a function of the voltage. The second term is a second product of a coefficient and a function of the current. The third term is a third product of a coefficient, a function of the voltage, and a function of the current. The method further includes determining the sum to be the etch rate associated with the first plasma system and adjusting power output from an RF generator of a second plasma system to achieve the etch rate associated with the first plasma system.
US09082593B2
An electrode having a gas discharge function, where the degree of freedom related to a maximum gas flow rate is abundant, an electrode cover member may be thinned, and a change of a gas behavior according to time is difficult to be generated in a processing chamber during gas introduction. The electrode includes: a base material having a plurality of gas holes; and an electrode cover member having a plurality of gas holes respectively corresponding to the plurality of gas holes of the base material in a one-to-one manner, fixed to the base material, and disposed facing a processing space in which the object is plasma-processed, wherein a gas hole diameter of the electrode cover member is larger than a gas hole diameter of the base material.
US09082592B2
There is provided a plasma processing apparatus for performing a plasma process on a substrate mounted on a mounting table in a processing chamber by generating inductively coupled plasma within the processing chamber by applying a high frequency power to a high frequency antenna. The apparatus includes a multiple number of gas nozzles protruding from a sidewall of the processing chamber toward a center of the processing chamber in a space above the mounting table, and each gas nozzle has a gas discharge hole at a leading end of the gas nozzle in a protruding direction and a gas discharge hole at a sidewall of the gas nozzle. Further, the apparatus includes a rotation device configured to rotate each of the gas nozzles on each central axis of the gas nozzles and each central axis is extended in the protruding direction of each of the gas nozzles.
US09082588B2
A multi charged particle beam writing apparatus of the present invention includes an aperture member to form multiple beams, a plurality of first deflectors to respectively perform blanking deflection of a corresponding beam, a second deflector to collectively deflect the multiple beams having passed through the plurality of openings of the aperture member so that the multiple beams do not reach the target object, a blanking aperture member to block each beam that has been deflected to be in the off state by the plurality of first deflectors, and a current detector, arranged at the blanking aperture member, to detect a current value of all beams in the on state in the multiple beams that have been deflected by the second deflector.
US09082585B2
An imaging region of a high-magnification reference image capable of being acquired in a low-magnification field without moving a stage from a position at which a defective region has been imaged at a low magnification is searched for and if the search is successful, an image of the imaging region itself is acquired and the high-magnification reference image is acquired. If the search is unsuccessful, the imaging scheme is switched to that in which the high-magnification reference image is acquired from a chip adjacent to the defective region.
US09082583B2
A sample holder is provided allowing for favorable observation of a cross-sectional sample using a retarding method. The sample holder includes: a sample placement member on which a first fixing member, a cross-sectional sample as an observation sample, and a second fixing member are placed in contact with each other, and inserted inside the electronic optical lens barrel of an electron microscope; and a voltage introduction means for introducing a voltage to the sample placement member. The sample placement member has a positioning section for positioning the first fixing member, the cross-sectional sample, and the second fixing member onto a placement position. A positioning section positions the first planar surface of the first fixing member and the second planar surface of the second fixing member which are disposed respectively adjacent to the observation surface of the cross-sectional sample, parallel to the observation surface at locations equidistant from the observation surface.
US09082572B2
In a tank type vacuum circuit breaker in which each of movable side and fixed side connection terminals of a vacuum interrupter arranged in a main tank and the lower end of each of conductors of a pair of bushings arranged in a standing condition in the main tank are connected by a flexible conductor and a shield for surrounding connection portions is provided, the shield is configured by combining: a main body side shield which is provided on axial both sides of the vacuum interrupter and covers a connection portion of the flexible conductor and the connection terminal; and a bushing side shield which is provided on the lower end side of the conductor and covers a connection portion of the conductor and the flexible conductor.
US09082567B2
A keypad comprises a keypad frame and a metal spacer disposed on a backside thereof. At least one metal fret having a plurality of metal standoffs is disposed amongst the corresponding keycaps. These metal standoffs connect to the metal spacer (for example, via laser welding). The keypad frame can include a plurality of registration components and the metal spacer can include corresponding registration component-receiving openings disposed therein.
US09082565B2
A composite switch comprises: a first switch that operates by applying a first load to a first key; and a second switch that operates by applying a second load to a second key disposed on the first key.
US09082563B2
A power breaker includes a fine motion mechanism portion having a chattering suppression portion formed of ring members and a ring member provided with sloping surfaces or curved surfaces at positions corresponding to one another in a state stacked up in a center axis direction, so that an impact generated upon collision of a movable electrode with a fixed electrode when a circuit is closed is trapped as a compression force. Hence, kinetic energy generated upon collision is consumed by energy absorption by friction due to a spring property of the ring members and a frictional force on the contact surfaces. It thus becomes possible to reduce a generation time of a chattering action.
US09082554B2
A method of a general biological approach to synthesizing compact nanotubes using a biological template is described.
US09082549B2
A multilayer ceramic capacitor includes flat-shaped inner electrodes that are laminated. An interposer includes an insulating substrate that is larger than contours of the multilayer ceramic capacitor. A first mounting electrode that mounts the multilayer ceramic capacitor is located on a first principal surface of the insulating substrate, and a first external connection electrode for connection to an external circuit board located on a second principal surface. The multilayer ceramic capacitor is mounted onto the interposer in such a way that the principal surfaces of the inner electrodes are parallel or substantially parallel to the principal surface of the interposer, that is, the first and second principal surfaces of the insulating substrate.
US09082547B2
An automatic winding machine has a rotation drive mechanism, four winding core shafts protruding from the drive mechanism and being rotated integrally with a rotation center of the drive mechanism, the winding core shafts whose axial centers are parallel to the rotation center, a reciprocating mechanism for reciprocating the winding core shafts, at least one pressing roller biased in the direction of bringing close to a rotation passage of the winding core shafts from the outer circumferential side, and a conductive wire supply mechanism for continuously supplying a conductive wire between the winding core shafts and the pressing roller.
US09082539B2
An improved system and method for producing magnetic structures involves a first magnetizing circuit having a first inductor coil used to magnetically print a first magnetic source onto a magnetizable material and a second magnetizing circuit having a second inductor coil used to magnetically print a second magnetic source onto said magnetizable material.
US09082538B2
A type of sintered Nd—Fe—B permanent magnet with high intrinsic coercivity of about 30KOe or more is produced by dual alloy method. The method comprises the following steps: preparing the powders of master phase alloy and intergranular phase alloy respectively, mixing the powders, compacting the powders in magnetic field, sintering the compacted body at 1050˜1125° C. and annealing at 890-1000° C. and 500-650° C. successively. In the process of preparing the powder of intergranular phase alloy, the nano-powder additive selected from the group consisting of NiAl, TiC, SiC, AlN, TiN, ZrN and the combination thereof is used to modify the powder of intergranular phase alloy.
US09082536B2
Disclosed herein is a common mode filter including: a coil part including a conductor coil provided in an insulating part; a plurality of external electrodes provided on the insulating part while being electrically connected to the conductor coil; and a magnetic material part provided in a region between the plurality of external electrodes on the insulating part. By this configuration, impedance characteristics of the common mode filter may be improved.
US09082526B2
Aspects of the present invention provide shielded cables for reducing the incidence of ground loops between connected electronic devices. According to one aspect of the present invention, a shielded cable is disclosed having two inner shield segments and an outer shield. The inner shield segments can each be grounded, but are physically separated from each other by a gap. The external shield is not grounded, and serves to contain EMI generated by signal conductors within the shielded cable and shield the signal conductors against external electrical events.
US09082523B2
A transparent conductor comprising: a graphene layer and a permanent dipole layer on the graphene layer configured to electrostatically dope the graphene layer.
US09082516B2
Systems and methods establish a magnetically insulated fusion process. An exemplary embodiment establishes a Field Reversed Configuration (FRC) plasma, wherein the FRC plasma is a closed field, magnetically confined plasma; collapses a metal shell about the FRC plasma; and establishes a fusion reaction in response to collapsing the metal shell about the FRC plasma.
US09082515B2
A stable operation is implemented by reducing an abnormal current. A variable resistance nonvolatile memory device includes: a memory cell array having memory cells each including a variable resistance element and a current steering element that are connected in series, each of the memory cells being located at a three-dimensional cross point of one of bit lines and one of word lines, and the current steering element being assumed to be conducting when a voltage exceeding a predetermined threshold voltage is applied; and a detection circuit that detects a faulty memory cell that is in a second low resistance state where a resistance value is lower than a resistance value in a first low resistance state. Both the bit line and the word line that are connected to the faulty memory cell detected by the detection circuit are fixed in the inactive state.
US09082509B2
In some embodiments, detecting resistance in a resistive memory cell may be done using a pulse edge. For example, a pulse may be applied through a resistive memory data cell and another through a reference delay circuit to determine which path has the larger delay in order to determine the resistive state of the data cell in question.
US09082507B2
A memory circuit includes a bit cell that receives a word line, complementary bit lines and an array supply voltage; a word line driver coupled to the word line, the word line driver receiving the array supply voltage; and a word line suppression circuit coupled to the word line. The word line suppression circuit includes a diode and a first switch coupled in series and a second switch. The switches are responsive to a control signal. The word line suppression circuit limits a word line voltage to a value lower than the array supply voltage such that the static noise margin (SNM) of the bit cell is increased.
US09082506B2
An operating method of a delay locked loop (DLL) circuit for a semiconductor memory device is disclosed. The DLL circuit may include a plurality of sub-circuits. The method may include calculating an additive latency value based on predetermined parameters, and controlling a set of the plurality of sub-circuits of the DLL circuit to be maintained in a turn-off state based on the calculated additive latency value, during a period of time after the semiconductor device receives an operation command in a power saving mode.
US09082498B2
A thin gate-oxide dual-mode PMOS transistor is disclosed that has a first mode of operation in which a switched n-well for the dual-mode PMOS transistor is biased to a high voltage. The dual-mode PMOS transistor has a second mode of operation in which the switched n-well is biased to a low voltage that is lower than the high voltage. The dual-mode PMOS transistor has a size and gate-oxide thickness each having a magnitude that cannot accommodate a permanent tie to the high voltage. An n-well voltage switching circuit is configured to bias the switched n-well to prevent voltage damage to the dual-mode PMOS transistor without the use of native transistors.
US09082496B2
A bit line, which is coupled to a resistive element of a memory cell is set to a first voltage level. The memory cell may be an MRAM cell or an RRAM cell. The resistive element is configured to have a first resistance in a first state of the memory cell and a second resistance in a second state of the memory cell. A source line, which is selectively coupled to the memory cell by an access transistor, is set to a second voltage level. A word line signal is asserted to apply a first bias voltage across the resistive element. The applied first bias voltage initiates a write operation at the memory cell. The word line signal is deasserted after a variable time duration based on a detection, during the write operation, of a current through the resistive element.
US09082493B2
A method includes an erase of a plurality of blocks of memory cells in which the memory cells within a block are simultaneously erased. The erase of each block of the plurality of blocks is performed using an erase pulse applied multiple times. The erase pulse is applied to the plurality of blocks in parallel. An erase verify is performed after each application of the erase pulse. After a number applications of the erase pulse, it is determined if a condition comprising one of a group consisting of any memory cell has been more erased than a first predetermined amount and any memory cell has been erased less than a second predetermined amount has been met. If the condition has been met, erasing is continued by applying the erase pulse to the block having the memory cell with the condition independently of the other blocks of the plurality of blocks.
US09082491B2
The invention provides a data writing method and device for a flash memory. According to the method, the flash memory obtains write data to be written to the flash memory, directs the flash memory to write a data page of the write data to a strong page of a target pair page of a target block, and directs the flash memory to write first predetermined data to a weak page of the target pair page for extending the data duration of the strong page of the target pair page.
US09082489B2
A method for programming a flash cell using a series of programming pulses, the method comprising providing a plurality of first successive programming pulses, wherein each of the first successive programming pulse is incremented by a first incremental amount and providing a plurality of second successive programming pulses, wherein each of the second successive programming pulses is incremented by a second incremental amount and wherein the second increment amount is smaller than the first incremental amount. A system and machine-readable media are also provided.
US09082488B2
A semiconductor memory device includes a memory block configured to include memory cells coupled to word lines and a peripheral circuit configured to perform a first program operation, a program verifying operation and a second program verifying operation for memory cells coupled to a word line selected from the word lines, and supply program allowable voltages having different levels to selected bit lines of program allowable cells located between program inhibition cells in the first program operation and the second program operation.
US09082483B2
A nonvolatile memory device includes a substrate including a plurality of active regions which are constituted by a P-type semiconductor; first and second vertical strings disposed over each active region, wherein each of the first and second strings includes a channel vertically extending from the substrate, a plurality of memory cells, and a select transistor, wherein the plurality of memory cells and the select transistor are located along the channel; and a bottom gate being interposed between a lowermost memory cell and the substrate, contacting the channel with a first gate dielectric layer interposed therebetween, and controlling connection of the first vertical string with the second vertical string.
US09082476B2
An apparatus and method are disclosed to implement digital signal processing operations involving multiply-accumulate (MAC) operations, by using a modified balanced data structure and accessing architecture. This architecture maintains a data-path connecting one address generation unit, one register file and one MAC execution unit. The register file has a hierarchical grouping organization of individual registers, which reduces bubble cycles caused by memory misalignments. This architecture uses parallel execution and can achieve two or more MAC operations per cycle.
US09082472B2
Battery backup devices and methods of performing a backup operation using the same are provided. A battery backup device can include a partial battery power controller configured to shut off power to components to be backed up one by one as data backup is completed on each device. The battery backup devices and methods provided can efficiently utilize battery power such that power consumption and charging time can be reduced.
US09082469B2
A semiconductor chip D1 of a flash memory which is stacked together with other semiconductor chips D2˜DN to form a multi-chip package (MCP), including a memory cell array 20 of the flash memory for storing an ID code and an upper address, wherein the ID code is written into the a fuse data region 20F of the memory cell array 20 before the assembly process. According to the invention, ID codes and upper addresses can be assigned and written to each of the semiconductor chips of a multi-chip package easily without increasing the size of the semiconductor chips in comparison with the prior art.
US09082467B2
A sub word line driver and a semiconductor integrated circuit device having the same are provided. The semiconductor integrated circuit device includes adjacent four sub word line drivers configured to drive four sub word lines in response to signals of four main word lines, wherein first and second sub word line drivers of adjacent sub word line drivers share one keeper transistor with each other, and third and fourth sub word line drivers of the adjacent sub word line drivers share one keeper transistor with each other.
US09082463B2
A memory is disclosed that includes a logic die having first and second memory interface circuits. A first memory die is stacked with the logic die, and includes first and second memory arrays. The first memory array couples to the first memory interface circuit. The second memory array couples to the second interface circuit. A second memory die is stacked with the logic die and the first memory die. The second memory die includes third and fourth memory arrays. The third memory array couples to the first memory interface circuit. The fourth memory array couples to the second memory interface circuit. Accesses to the first and third memory arrays are carried out independently from accesses to the second and fourth memory arrays.
US09082462B2
Embodiments relate to systems and methods for simplified addressing of a memory device whose total memory capacity is extendible by an additional memory capacity or a factor to a total extended memory capacity, the method comprising dividing the additional memory capacity into a set of binary memory fractions of the total memory capacity such that a sum of all binary memory fractions equals the additional memory capacity, and addressing each one of the binary memory fractions by a binary based addressing scheme.
US09082461B2
A processor-based electronic system includes several memory modules arranged in first and second ranks. The memory modules in the first rank are directly accessed by any of several processors, and the memory modules in the second rank are accessed by the processors through the memory modules in the first rank. The data bandwidth between the processors and the memory modules in the second rank is varied by varying the number of memory modules in the first rank that are used to access the memory module in the second set. Each of the memory modules includes several memory devices coupled to a memory hub. The memory hub includes a memory controller coupled to each memory device, a link interface coupled to a respective processor or memory module, and a cross bar switch coupling any of the memory controllers to any of the link interfaces.
US09082456B2
In certain aspects, receiving at least one motivating event at least partially at a processing shared image device. At least one designated attribute is transmitted at least partially from the processing shared image device, wherein the at least one designated attribute can be effected at least partially in response to the receiving the at least one motivating event at least partially at the processing shared image device. An obtained shared image is obtained at the processing shared image device that is obtained in accordance with the at least one motivating event, and is obtained at least partially in response to the transmitting the at least one designated attribute. The obtained shared image is processed to derive an at least one processed shared image at least partially at the processing shared image device.
US09082446B2
Provided are an optical disc drive and method for driving the optical disc drive. The method includes transporting a disc to a chucking position where a spindle is positioned using a loading roller, blocking power transferred from a loading motor to the loading roller, and chucking the disc on the spindle using power from the loading motor. Accordingly, damages to the disc caused by chucking may be prevented.
US09082432B1
A thin film magnetic head has a main magnetic pole layer; a first trailing shield that is positioned at the trailing side of the main magnetic pole layer, and that is close to the main magnetic pole layer; and a second trailing shield that is positioned at the trailing side of the first trailing shield, and that continues to the first trailing shield. An end surface of the second trailing shield positioned at the back side in the height direction has a first end side positioned at a medium opposing surface side, and a second end side positioned at the further back side in the height direction than the first end side, and at the trailing side closer than the first end side. An angle formed by a plane including the first end side and the second end side and a plane parallel to both the height direction and the track width direction is 30 degrees to 60 degrees.
US09082431B2
Disclosed is a data archive system that executes inspection of a recording quality of an optical disc, estimates a recording quality deterioration factor, and informs it to a user, and a method for estimating the recording quality deterioration factor. The data archive system has a server and a data library device. The server has a whole control part, a data library I/F part, and a recording medium. The data library device has multiple recording media, a recording medium storing part, multiple recording/reproducing parts, and a library control part. The recording medium stores attribute information about the recording medium. The whole control part executes first quality inspection on a first recording medium, executes second quality inspection on a second recording medium, refers to attribute information of the recording media recorded on the information recording medium, and controls so that a factor deteriorating the qualities of the recording media may be estimated.
US09082429B2
The optical disc device includes an optical pickup, a focus-error-signal generation section for generating a focus error signal of the differential astigmatic method by using a parameter and an electric signal outputted from a photodetector in the optical pickup, a control section for controlling the optical pickup to make a focus jump operation, and a parameter value changing section for temporarily changing a value of the parameter to be used to generate a focus error signal of the differential astigmatic method by the focus-error-signal generation section when the focus jump operation is performed by using the focus error signal of the differential astigmatic method.
US09082426B1
Methods for manufacturing electronic lapping guides (ELGs) for writer heads that closely track the pole formation of the writer heads are provided. Once such method includes forming an ELG adjacent to a writer head that is subjected to substantially all of the sub-processing actions associated with the pole formation of the writer head, lapping the pole material, measuring a resistance of the ELG during the lapping, comparing the measured resistance with a target resistance, and terminating the lapping based on the comparison of the measured resistance with the target resistance.
US09082417B2
An optical information recording apparatus configured to record information into an information recording medium by using holography, the apparatus including: a signal generation unit configured to generate two-dimensional data; and a two-dimensional spatial light modulator unit configured to display the two-dimensional data and to spatially modulate a transmitted or reflected beam, wherein the two-dimensional spatial light modulator unit includes a signal region and an external region, the signal region displays two-dimensional data based on user data, the external region displays two-dimensional data not including the user data, and the signal generation unit generates two-dimensional data in such a manner that a frequency of the two-dimensional data displayed on the external region becomes equal to or larger than a frequency of the two-dimensional data displayed on the signal region.
US09082415B2
A sound determination apparatus receives acoustic signals by a plurality of sound receiving units, and generates frames having a predetermined time length. The sound determination apparatus performs FFT on the acoustic signals in frame units, and converts the acoustic signals to a phase spectrum and amplitude spectrum, which are signals on a frequency axis, then calculates the difference at each frequency between the respective acoustic signals as a phase difference, and selects frequencies to be the target of processing. The sound determination apparatus calculates the percentage of frequencies at which the absolute values of the phase differences of the selected frequencies are equal to or greater than a first threshold value, and determines that the acoustic signal coming from the nearest sound source is included in the frame when the calculated percentage is equal to or less than a second threshold value.
US09082410B2
An audio processing apparatus includes a first microphone, a second microphone, and a masking unit configured to mask movement of air from outside of the apparatus to the second microphone. A filter coefficient is estimated and learned so as to minimize the difference between the output signal of the first microphone and the output signal of the second microphone, thereby suppressing a reverberation component generated in the closed space between the masking unit and the second microphone out of the output signal of the second microphone.
US09082398B2
In accordance with an embodiment, a method of decoding an audio/speech signal includes decoding an excitation signal based on an incoming audio/speech information, determining a stability of a high frequency portion of the excitation signal, smoothing an energy of the high frequency portion of the excitation signal based on the stability of the high frequency portion of the excitation signal, and producing an audio signal based on smoothing the high frequency portion of the excitation signal.
US09082378B2
A supporting structure for an electronic pad of a percussion instrument includes a pad member, a pair of a first engaging part and a second engaging part, and a connecting part which connects a first object (e.g. a leg fixed to a stand) and a second object (e.g. the second engaging part) in a rotatable manner about the rotation center. The connecting part includes a rotation-regulating unit which regulates the rotational displacement of the second object within the regulation range irrespective of a rotational torque less than a predetermined value which is applied to the second object disposed at the initial position relative to the first object. Due to a rotational torque above the predetermined value, the rotation-regulating unit shifts the regulation range so as to shift the initial position, and therefore the second object will be restored to the new initial position.
US09082371B2
The Invention relates to a keyboard instrument with a keyboard and a sound board including a front edge which runs substantially parallel to the keyboard. The sound board further includes a first lateral edge which forms a first angle (A) with the front edge, and a second lateral edge which forms a second angle (B) with the front edge. Strings are provided which are induced to vibrate by respective keys of the keyboard. There is also at least one sound bridge which is secured to the sound board and on which the other end of the strings which faces away from the keys is supported. The first angle (A) is >90°. The sound bridge extends at a right angle on the sound board approximately as far as a line that runs rearwards from the intersection of the front edge of the sound board and the first lateral edge.
US09082367B2
In a liquid crystal display (LCD) device having a touch panel function, power consumption is reduced in the standby state. The display section is divided into blocks each of which is formed of a plurality of display lines. The counter electrode is disposed for each block. A driving circuit selectively supplies, to the counter electrode of each block, the voltage used for the liquid crystal display and the voltage used for the touch panel scanning. The driving circuit has a source amplifier that supplies the video voltages to the video lines. The driving circuit reduces the current in the source amplifier, such that the current is lower than current at the time of a normal operation, to lower the power consumption, and stops the operation of the source amplifier and supplies the GND voltage to the video lines to further lower the power consumption.
US09082362B2
A display panel includes a display area, a peripheral area which includes a first peripheral area, and a second peripheral area opposite to the first peripheral area, a plurality of pixels in the display area, a plurality of data lines, a first gate line, a second gate line, a first gate driving circuit and a second gate driving circuit. Each data line corresponds to two pixel columns. The first gate line is at a first side of a pixel row. The second gate line is at a second side of the pixel row. The first gate driving circuit is in the first peripheral area and includes a first stage which provides a gate signal to the first gate line. The second gate driving circuit is in a second peripheral area of the display area and includes a second stage which provides a gate signal to the second gate line.
US09082358B2
There is disclosed a liquid crystal driving device which improves crosstalk using the function of adjusting an interlaced line number of common electrodes and the function of adjusting a polarity reversion line number.
US09082356B2
Present embodiments may include a liquid crystal display apparatus, using a line reversal method, wherein at least one pulse is inserted between charging periods, and a method of driving the liquid crystal display apparatus. According to present embodiments, in a liquid crystal display apparatus employing a polarity reversal method, audible noise may be removed without increasing a frame frequency and reducing a charging time of a storage capacitor.
US09082355B2
A liquid crystal display driving circuit and method. A data register block of a controller applies in advance a polarity control signal to data before the data are stored in latches of a data driver, exchanges the data, and then stores the exchanged data in the latches. Thereby, it is possible to provide multiplexers, which are otherwise required for respective channels, to one controller and to decrease the size of a chip.
US09082335B2
A display control apparatus is provided. Every time when the level of the signal is obtained, the peak display with respect to the level of the signal is initiated by the first peak display control unit in a predetermined display manner in the display position obtained by the peak position obtaining unit. On the other hand, the previous peak displays being displayed according to the level of the signal obtained at a previous time and a time before the previous time is continued, and the display manner of the previous peak display being displayed is changed according to the second peak display control unit. Accordingly, while one and more than one level are simultaneously displayed on one display device, the temporal sequence of the levels, which is simultaneously displayed with different display manners, can be recognized by the user.
US09082325B2
A platform system having a video module assembly. The video module assembly includes a receiving member and a first video module removably secured to the receiving member. The video module includes an array of light emitting devices, and the receiving member is configured to directly or indirectly detachably secure a second video module.
US09082311B2
A method of teaching reading includes displaying, by an application executing on a computing device, a singing exercise configured to allow a user to sing along as a song is played. Lyrics of the song are displayed as the song plays, thus allowing the user to read the lyrics as the user sings along to the song. An audio input is monitored as the song is played. A score representing how accurately the audio input matches the song is calculated. The score is provided to the user. The method calculates the user's vocal range and uses that vocal range in generating a score.
US09082309B1
Embodiments can dynamically generate questions useful for student evaluation. One embodiment of a method may include providing a user interface on a client device for a user to compose a dynamic question template (DQT) in a first representation. The DQT which may have a question, question variables, a correct answer, and question constraints may be received by a system running on one or more server machines. The system may compile the DQT and generate and store a DQT object in an object library. The system can then pre-generate or dynamically generate in real time a plurality of unique question variants using the DQT object and without further input from the user. In generating the unique question variants, the system may obtain values, as constrained by the question constraints, for the question variants and/or run simulations using other objects such as equations from the object library or libraries.
US09082301B2
A system and method for determining a predicted stopping performance of an aircraft moving on a runway. A predicted stopping force acting on the aircraft to stop the aircraft is determined by a processor unit as the aircraft is moving on the runway. A predicted deceleration of the aircraft moving on the runway is determined by the processor unit using the predicted stopping force acting on the aircraft to stop the aircraft. The predicted stopping performance of the aircraft on the runway is determined by the processor unit using the predicted deceleration of the aircraft.
US09082295B1
A cell phone is mated with the vehicle system and thereafter used to obtain access to the vehicle. A user who has a cell phone automatically can obtain access to the vehicle. An embodiment describes a USB key that provides access to the vehicle, and in an emergency, either a complete or partial version of the key can be downloaded from a server.
US09082293B2
A supplemental control system for a materials handling vehicle comprises a wearable control device, and a corresponding receiver on the materials handling vehicle. The wearable control device is donned by an operator interacting with the materials handling vehicle, and comprises a wireless transmitter and a travel control communicably coupled to the wireless transmitter. Actuation of the travel control causes the wireless transmitter to transmit a first type signal designating a request to advance the vehicle in a first direction. The receiver is supported by the vehicle for receiving transmissions from the wireless transmitter. A traction control of the vehicle is responsive to a receipt of the first type signal by the receiver to cause the vehicle to advance.
US09082292B2
Disclosed is a display apparatus which is used so as to produce a hardware remote controller capable of operating a plurality of instruments. The display apparatus includes a first display part which displays remote control information including external shape information of a remote control of a target instrument to be operated, and a second display part which displays a custom remote control object to be generated on the basis of the external shape information. The remote control information is acquired from a remote control database which includes external shape information of remote controls of the plurality of instruments on the basis of instrument information of the target instrument and/or the remote control of the target instrument.
US09082284B2
A method for managing hazards in a construction site is presented. One aspect of the inventive subject matter includes a hazard management process that utilitizes a hazard context database, a sensor interface, and a hazard analysis engine. The sensor interface is configured to acquire a site data feed that is representative of a construction site. The hazard analysis engine is configured to (i) instantiate a hazard object by comparing the site data feed to hazard criteria of the plurality of hazard contexts, (ii) update the hazard object based on the site data feed, (iii) generate hazard notification criteria related to the hazard object, (iv) obtain worker attributes from the site data, and (v) transmit a hazard notification to an output device when the worker attributes cause satisfaction of the hazard notification criteria.
US09082252B2
An automated banking machine system operates to cause financial transfers responsive to data read from data bearing records. The system is operative to read a financial card bearing account indicia with a card reader. A user is able to perform at least one banking operation responsive to account indicia read by the card reader from the card. The banking operations include dispensing cash and accessing financial accounts. In an example embodiment, the machine is operative to produce an audio output including verbal information through a headphone port to a headphone.
US09082236B2
A controlled access anesthesia cart has at least one drawer or compartment for storing general-use anesthesia items, and at least one drawer or compartment for storing controlled substances, e.g., narcotics. An RFID reader in the cart senses for RFID signals, and if a portable RFID transceiver is in range of about 3 meters of the cart, the compartments in the cart are unlocked for access. The anesthesiologist needs to enter a pass code for access to the controlled substances compartment(s). The compartments then remain unlocked so long as the portable RFID transceiver is present. When the portable transceiver is out of range, the cart immediately relocks the compartments automatically.
US09082224B2
The present invention is directed to systems and methods for controlling 2-D to 3-D image conversion. The system and method includes receiving an image and masking the objects in the image using segmentation layers Each segmentation layer can have weighted values for static and dynamic features. Iterations are used to form the final image which, if desired, can be formed using less than all of the segmentation layers. A final iteration can be run with the weighted values equal for static and dynamic features.
US09082214B2
A method for providing a three dimensional (3D) drawing experience. The method includes capturing a 3D image of a participant and then processing this image to key the participant's image from a background. The keyed participant's image is mixed with a 3D background image such as frames or scenes from a 3D movie, and the mixed 3D image is projected on a projection screen. For example, left and right eye images may be projected from a pair of projectors with polarization films over the lenses, and the projection screen may be a polarization-maintaining surface such as a silver screen. The user moves a drawing instrument in space in front of the projection screen, and spatial tracking performed to generate a locus of 3D positions. These 3D positions are used to create a 3D drawing image that is projected with the 3D background and participant images in real time.
US09082197B2
The invention provides a method for local image translation and a terminal with a touch screen, wherein the method for local image translation includes: obtaining a region to be translated from an original image; extracting a region with a remarkable characteristic through performing cluster analysis on the region; performing region growing according to the region with the remarkable characteristic to generate a target region; and fusing the target region translated to the target image with the target image. The above method for local image translation and the terminal with the touch screen can be used for translating the local images in various types of images.
US09082196B2
A method for controlling image resolution in graphics systems at runtime is provided. In use, the stream of commands and Shaders of the running application is intercepted and analyzed at run time. In the event that an on-the-fly change of resolution is required, the change is made by modification of the Shader assembly code or of the graphics library commands.
US09082180B2
A system, method, and computer program product for applying a spatially varying unsharp mask noise reduction filter is disclosed. The spatially varying unsharp mask noise reduction filter generates a low-pass filtered image by applying a low-pass filter to a digital image, generates a high-pass filtered image of the digital image, and generates an unsharp masked image based on the low-pass filtered image and the high-pass filtered image. The filter also blends the low-pass filtered image with the unsharp masked image based on a shaping function.
US09082179B2
When registering multiple multidimensional images based on landmarks, the system improves the distribution and density of the points in correspondence across images, which are of crucial importance for the accuracy and reliability of the resulting registration transform. Projection of input corresponding point landmarks is performed in order to automatically generate additional point correspondences. The input existing landmarks may have been manually or automatically located in the input multiple images. Projection is performed from each source landmark along one or more determined projection directions onto one or more determined projection targets in each image. The projection target(s) can be explicitly materialized or implicitly defined. Candidate new points are identified at the locations where the projection ray paths intersect with the projection target(s). Correspondence between the new points across images is transferred from the input landmarks from which they have been projected, with further distinction by projection direction and/or projection target in the case where a plurality of these was used. Subsequent registration can use all or a selected subset of all combined input landmark correspondences and correspondences between additional projected landmark points. The additional correspondences between projected landmark points contribute in refining the image registration. Such accurate, efficient and robust tools for image registration and any downstream processing, such as contour propagation or image fusion, are highly demanded for various medical applications, such as adaptive radiotherapy.
US09082178B2
There is disclosed an embodiment for performing a calibration of a sensor by using an image registration between a three-dimensional ultrasound image and computerized tomography (CT) image. An ultrasound image forming unit includes an ultrasound probe and forms a three-dimensional ultrasound image of a target object. A sensor is coupled to the ultrasound probe. A memory stores a three-dimensional computed tomography (CT) image of the target object and position information on a position between the three-dimensional ultrasound image and the sensor. A processor performs image registration between the three-dimensional CT image and the three-dimensional ultrasound image to form a first transformation function for transforming a position of the sensor to a corresponding position on the three-dimensional CT image and performs calibration of the sensor by applying the position information to the first transformation function.
US09082177B2
A method and system of rapidly detecting and mapping a plurality of marker points identified in a sequence of projection images to a physical marker placed on a patient or other scanned object. Embodiments of the invention allow a marker physical mapping module executable by an electronic processing unit to obtain a sequence of images based on image data generated by a scanner. Each image in the sequence of images represents an angle of rotation by the scanner and includes a plurality of marker points each having a U position and a V position. Expected U and V positions for the physical marker are calculated and a list of candidate marker points is created based on the expected positions. The images are processed and selected candidate marker points are added to a good point list.
US09082173B2
Processing data for encoding and decoding a message transmitted through a communication channel having adjacent information known during the encoding, the encoding method comprising the construction of a surjective correcting code produced from a characterization of the adjacent information in a system of spherical coordinates.
US09082157B2
The present invention relates to management of information relating to medical fluids, containers therefor, and medical fluid administration devices for administering such medical fluids to patients. Data tags (e.g., RFID tags) are generally associated with containers of the invention and may be electromagnetically read from and/or written to using an electromagnetic device, for example, that may be associated with a medical fluid administration device of the invention.
US09082150B2
In certain embodiments, an apparatus includes a memory and a processor. The processor is operable to present, in a first region of a display, information associated with a first service based at least in part upon the user. The processor is further operable to present information associated with a second, third and fourth service. Additionally, the processor may receive an update to the information associated with the first service and present, in the first region of the display, the update to the information associated with the first service. Finally, the processor is operable to detect a first touch on the first region of the display indicating a selection of the first service and present details associated with the first service in response to detecting the first touch.
US09082144B2
Matches for load or transportation services with transportation service providers (TSPs) are established, and estimated arrival times are provided. A transportation service request is provided and a received bid is received. An estimate of time of arrival is made based on an estimation of a time for performing a delivery of the load or provide the transportation service, and the time of arrival estimate is adjusted by at least one external factor expected to affect transit time. An anticipated turn-around time for availability of the TSP is made for a subsequent leg or backhaul and the adjusted time of arrival estimate and the anticipated turn-around time are used to estimate a time of availability of the TSP for the subsequent leg or backhaul. An accepted bid for the subsequent leg or backhaul is made based on an estimated time of availability.
US09082142B2
Self checkout and automated checkout systems and methods for multiple lane checkout stations, the automated checkout lane having a conveyor system that automatically transport objects through a portal data reader, wherein an operator (such as a checkout clerk) is provided with a portable/handheld data input and display device that allows the operator to move between multiple checkout stations for handling reading exceptions at the checkout station by employing the portable device.
US09082141B2
A computing device for use with a demand response system is provided. The computing device includes a communication interface for receiving customer data of a plurality of customers, wherein the customer data includes at least a location, a policy limitation, a participation history, and an enrollment status for each customer. A processor is coupled to the communication interface and programmed to select at least one participant from the plurality of customers, based on the customer data, to participate in at least one demand response event. The processor is further programmed to verify that the selected participant, based on the customer data, satisfies at least one precondition to receive at least one signal representative of the demand response event.
US09082136B1
This specification describes technologies relating to content presentation. In general, one aspect of the subject matter described in this specification can be embodied in methods that include the actions of receiving one or more respective identifiers, each being associated with a respective device, determining respective proximities of the to a content presentation medium, processing the identifiers to determine one or more characteristics that pertain to users of the one or more devices, selecting third party content items based on the characteristics, configuring the third party content items for presentation at the content presentation medium based on (a) the proximities of the devices to the content presentation medium and (b) the characteristics, and presenting the third party content items at the content presentation medium. Other embodiments of the various aspects include corresponding systems, apparatus, and computer program products.
US09082135B2
A user can specify particular news, weather, traffic, or other perishable content received on a particular Internet radio station or other media channel. The user can customize the station so that wherever the user is currently located, he can receive perishable content related to a preferred geographic location or other category. In some embodiments, a user can specify that a customized station plays local news from one city at the top of the hour, traffic from another city at 10 minutes past the hour, and music or other content at other times. The user can also customize the station to select the perishable content, or other original content, from the personal libraries of specified users. Thus, a user can customize not only the genre of content or select a particular local station, but can also modify the perishable content provided by the customized station.
US09082134B2
Planning the presentation of advertisements to travelers, includes using a computer and software to receive data pertaining to a departure time, a location of one or more travelers, a starting location of the traveler, and a vendor event, including a time and location for the event. The received information is used to calculate available time between the departure time and the time of the event, and to calculate, for a given mode of travel, a travel time from the starting location to the event location and then to the departure location. The calculated travel time plus a predetermined amount of time at the event location is compared with the calculated amount of time available, and if the calculated amount of time available is at least equal, present an advertisement corresponding to the vendor event to the traveler.
US09082132B2
Techniques for receiving user feedback for an instance of content. Embodiments provide an interface that includes an interactive element through which users can provide feedback for an instance of content. Responsive to a first user interacting with the interactive element, an indication of user feedback from the first user is registered for the instance of content, and the interactive element within the interface is disabled for the first user. Embodiments monitor the instance of content to detect changes to the instance of content. Additionally, upon detecting a change to the instance of content, the interactive element is enabled for the first user, such that the first user can again interact with the interactive element.
US09082128B2
A system for tracking user activities on a computing network and generating a peer-group score based on those activities may be implemented in hardware and software that when executed performs steps for receiving at a server information including a device identifier, a user score associated with the device identifier, and content provider information from a content provider, the device identifier being based on one or more of user-configurable and non-user-configurable parameters of a user device used to access network-accessible content of the content provider, categorizing the content provider as belonging to one or more classes of service based on the received information, retrieving from a database one or more provider-generated user scores belonging to an identical one of the one or more classes of service and being associated with an identical device identifier, and generating a peer-group score for the received device identifier based on the received user score and the one or more retrieved provider-generated user scores.
US09082123B2
Embodiments of computer-implemented methods and systems for activity-based recommendations are described. One example embodiment includes receiving data indicating historical activities of a user community, the historical activities including historical activities of the target user, selecting a reference group of users from the user community based on analysis of the historical activities of the target user, receiving generally current time activities of the reference group of users, the generally current time activities including those activities that have occurred within a defined time window, and recommending items to the target user based on the generally current time activities of the reference group of users.
US09082112B2
A charging system for autonomous transport vehicles including at least one charging contact disposed on each pick floor level of a storage and retrieval system, each of the at least one charging contact being located at a transfer station, at least one power supply configured to supply power to the at least one charging contact, and a controller in communication with the transfer station and being configured to communicate information relating to a transfer of items between the transfer station and a predetermined one of the autonomous transport vehicles and to apply power from the power supply to the at least one charging contact for charging the predetermined autonomous transport vehicle corresponding to the transfer and located at the transfer station, wherein the controller is configured to supply power to the charging contacts simultaneously with the predetermined autonomous transport vehicle exchanging items related to the transfer at the transfer station.
US09082110B2
A system and method are disclosed that enable an email service provider to implement an email forwarding service without losing associated page views. In one embodiment, rather than forwarding the entire email message, the email forwarding service generates a summary email message, and sends this summary email message to the forwarding email address pre-specified by the subscriber. This summary email message includes a link that is selectable by the user to view the original email message on a web site of the email service provider. Thus, even if the forwarding email address is hosted externally, the subscriber still views the full email message on a web site of the provider of the email forwarding service.
US09082109B2
A system for assembling a business process or a portion thereof includes a rules base containing executable rules and defined business process elements, a workflow orchestration engine, and at least one interface available to a process beneficiary. Information known about and or provided by a process beneficiary interacting with the at least one interface is used to execute one or more of the rules causing assembly of a new business process or a portion thereof according to workflow orchestration rules the new or modified process directing servicing of the process beneficiary accordingly.
US09082105B2
A system for paper-like forms processing includes a plurality of portable computing devices coupled by a network to a paper-like forms server. The portable computing devices are adapted to receive images (e.g., compound documents/forms), add stroke annotations to the received images, and send the annotated received images or the stoke annotations themselves to the paper-like forms server. The paper-like forms server comprises a central scheduler and a logging module. The paper-like forms server processes compound documents as paper like forms and sends input to and receives results from service providers to perform various types of paper like processing on the compound document. The paper-like forms server performs the scheduling, routing, logging, verification and billing for the paper-like processing of compound documents. The central scheduler also stores results from service providers for later retrieval.
US09082103B2
Method for monitoring assets that include a sensor system that obtains data about contents thereof, a processor that derives information about the contents from the sensor data, and a communication system that, when linked to a communications network, wirelessly transmits the information derived by the processor via the Internet. The information is received at a data processing and storage facility, associated with a unique identification code for each asset, and stored in association with the identification code. Access to the stored information is effected via the Internet.
US09082089B2
An approach is provided for managing bandwidth utilization. A networking device (e.g., router) corresponding to a customer is audited to determine utilization of a communication link serving the customer. A determination is made whether bandwidth, allocated to the customer, of the communication link is under-utilized. A notification is generated to inform the customer of the under-utilization based on the determination. Further, a determination can be made whether the allocated bandwidth of the communication link is over-utilized, in which case, the notification includes an indication of one or more sources of traffic through the networking device.
US09082086B2
A method, system, and computer-readable storage medium for computing a representation of similarity among items in a set of items. Computing a representation of similarity items may comprise generating a first similarity model that represents characteristics of the set of items, the characteristics being indicative of similarity among the items in the set of items. Additionally, computing the representation of similarity may comprise adaptively selecting a subset of the set of items for similarity evaluation based on the first similarity model, receiving a similarity evaluation for the adaptively-selected subset of items, and generating a second similarity model based on the first to similarity model and the received similarity evaluation.
US09082070B2
A screen printing apparatus is provided with a control unit for obtaining a residual quantity of a consumable consumed by a cleaning unit prior to starting printing on a plurality of print substrates. The control unit predicts a print executable number based on an obtained residual quantity a display/operation unit provides a prediction-result of a processable quantity. The screen printing apparatus enables preferred consumption prediction of consumable supplies such as a cleaning sheet of a cleaning unit and a cleaning agent at a required timing, thereby contributing to improvement of an operating ratio.
US09082060B2
Chip card inlay for contact-activated and contactlessly activated chip cards, having a planar substrate layer made of a non-conductive plastics material, on which an antenna having, at its end, planar conductive pads for attaching a chip is fastened, wherein the conductive pads are formed from a textile fabric having thread crossings, and on each top side of the textile fabric an electrically conductive contact zone is provided which has a three-dimensionally conductive terminal pad structure with weave points of the textile fabric as topographical contact zone elevations.
US09082055B2
A method for the authorization-dependent control of a contactless interface device of a communication device includes authenticating a user to the communication device. The contactless interface device is then deactivated so as to prevent a data transmission via the contactless interface device.
US09082053B2
Disclosed is a design code pattern capable of utilizing the elements having a freedom degree of a design and an aesthetic value in a design side by storing information of a suitable size in consideration of characteristics where a large amount of information is not required to connect with a target server by a gateway. The coded information is expressed as the design patterns including a plurality of design individuals wherein the number and order are applied to the design individuals on the basis of sizes and shapes of the designs.
US09082050B2
A computer of an image processing apparatus is provided with a computer-readable medium allowing the computer to execute: an image-obtain processing; a first display-control processing; a second display-control processing; a layout designation-judgment processing; a preview image-generation processing; and an operation-judgment processing. In the first display-control processing, the computer allows, on a condition that a print preview image is generated by the preview image-generation processing, the display screen to display the print preview image generated by the preview image-generation processing, instead of a previous print preview image previously displayed on the display screen; and in the first display-control processing, the computer allows the display screen to display the print preview image while magnifying or reducing the print preview image in a case that the computer judges, by the operation judgment processing, that two points on an image display device have moved away from each other or approached toward each other.
US09082047B2
A method for learning visual attribute labels for images includes, from textual comments associated with a corpus of images, identifying a set of candidate textual labels that are predictive of aesthetic scores associated with images in the corpus. The candidate labels in the set are clustered into a plurality of visual attribute clusters based on similarity and each of the clusters assigned a visual attribute label. For each of the visual attribute labels, a classifier is trained using visual representations of images in the corpus and respective visual attribute labels. The visual attribute labels are evaluated, based on performance of the trained classifier. A subset of the visual attribute labels is retained, based on the evaluation. The visual attribute labels can be used in processes such as image retrieval, image labeling, and the like.
US09082030B1
A multi-mode ring scanner (MMRS) has a ring unit for wearing on a finger. The MMRS optionally has a wrist unit coupled to the ring unit, such as via a cable. The MMRS optionally communicates wirelessly with a computing device. The ring unit has one or more scanners (such as an optical scanner or an RFID tag reader). The ring unit optionally has two paddle switches for activation by inward pressure from fingers adjacent to the finger. The two switches enable specifying operation of the MMRS in a plurality of modes and/or to communicate a plurality of information codes to the computing device. The computing device is optionally enabled to assign a function to each combination of activation of the two switches. A scanning system including the MMRS optionally provides feedback to a user based on feedback from a host processor.
US09082024B2
A method for enabling reading of an optical device that has an array of focusing elements and is configured to provide a synthetic image, comprises arranging (210) of the optical device to obtain a first predetermined shape and controlling (220) of an image plane selector to select an image plane at a first position relative a surface of the optical device. An observable two-dimensional section of the synthetic image taken at the selected image plane is thereby provided. A device for enabling reading of an optical device is also disclosed.
US09082007B2
Embodiments of the invention include systems, methods, and computer-program products for providing recreated image documents using templates or generic control documents. In this way, an entity may store limited amounts of image data from an original document and subsequently recreate the document image using document templates. As such, the invention may compile templates for image documents. Upon receiving a document from a transaction for storage, the system may store the metadata associated with that document, instead of storing the entire document as a high resolution image file. Using the template, in combination with the metadata, the system may recreate the image as a system generated image for user recall and reconciliation.
US09082000B2
An image processing device includes a memory unit, a candidate pupil detecting unit and a pupil determining unit. The memory unit is used in storing information regarding a pupil size. The candidate pupil detecting unit detects noncircular candidate pupils from an image in which an eye area is captured. The pupil determining unit extrapolates the shapes of the candidate pupils that are detected by the candidate pupil detecting unit and, based on the pupil size stored in the memory unit, determines a pupil from among the candidate pupils.
US09081996B2
The set T of all categories in a population of RFID tags is estimated within a specified error bound. For each of one or more frames, a reader broadcasts a probability p, a multiplicity d, a frame size M, and a seed value R to the present tags. A deterministic algorithm on each tag, and known to the reader, calculates (i) whether the tag will transmit in this frame, and, if so, (ii) in which slots the tag will transmit a single “1.” When the tags have responded, the reader calculates set T by initially assuming that all possible categories are in set T and then eliminating those categories that would have transmitted in those slots in which no tag transmitted. Alternatively, the reader initially assumes that set T is empty, and adds those categories that would have transmitted in those slots in which one or more tags did transmit.
US09081993B2
A card reader includes a taking-out detection mechanism for detecting taking-out of a card from a taking-out ready state, which is a state that a part of the card is protruded from the card insertion-and-ejection port to an outer side of the card reader so that the card is capable of being taken out from the card reader, and a resistance applying mechanism structured to abut with the card taken out from the card reader to apply a frictional resistance to the card so as to disturb taking-out of the card. The resistance applying mechanism may include a feed roller configured to feed the card in a direction ejecting the card from an inside of the card reader until the taking-out ready state and, when start of taking-out of the card from the taking-out ready state is detected by the taking-out detection mechanism, the feed roller may be temporarily rotated in a direction taking the card into the card reader.
US09081991B2
A ring oscillator (RO) based Design-For-Trust (DFTr) technique is described. Functional paths of integrated circuit (IC) are included in one or more embedded ROs by (1) selecting a path in the IC, based on path selection criteria, that has one or more unsecured gates, and (2) embedding one or more ROs on the IC until a stop condition is met. An input pattern to activate embedded RO is determined. Further, a golden frequency which is a frequency at which the embedded RO oscillates, and a frequency range of the embedded RO are determined. A Trojan in the IC may be detected by activating the embedded RO (by applying the input pattern), measuring a frequency at which the embedded RO oscillates, and determining whether or not a Trojan is present based on whether or not the measured frequency of the RO is within a predetermined operating frequency range of the RO.
US09081988B2
A computerized method for authenticating documents having VIZ sections, the method comprising capturing an image of a document to be authenticated from a scanner and enhancing the captured image, and using a processor for identifying and cropping a VIZ section in the image.
US09081986B2
Methods and apparatus for negotiation of data sharing arrangements. A user profile vector comprising user data is defined according to user selections and privacy and cost information relating to the user profile vector are computed. The user profile vector and service provider data requests by service providers are compared, and data sharing arrangements are entered into when a match is identified between the user profile vector and a provider data request. Data collection and sharing is conducted in accordance with the arrangements.
US09081979B2
A method for controlling copyright permissions when assembling multiple copyrighted works into a compiled file. The copyright permission level of each file is analyzed, either based on the copyright permission information present in metadata associated with the file or based on the digital file format of the file which reflects the permission level. The compiled file is assigned a permission level which is the same as or more restrictive than all of the permission level of the files in the compilation, and is generated in a format that enforces the assigned permission level. A notification may be displayed to the user to notify the use of the permission level assigned to the compiled file.
US09081974B2
Embodiments of the present disclosure provide a user interface that enables a user to more easily identify servers that may be used to set access permissions for content items. The method and system described herein includes receiving user credentials that are associated with a user. In response to receiving the user credentials, one or more servers associated with the user credentials are displayed. The one or more servers are configured to manage information rights for a content item created by the user. Upon receiving a selection of one of the one or more servers, a list of one or more templates supported by the selected server is displayed to the user. The one or more templates identify information rights that may be applied to the content item.
US09081973B2
A method for restricting, based on predefined user profile information, access to software executing on a computing device of a user. The method comprises the following steps. Input data is intercepted from a user input device. The input data is compared with a list of restrictions in the user profile information to determining if an action associated with the input data is prohibited. The input data is passed to the software for execution only if the action associated with the input data is not prohibited. A method for restricting, based on predefined user profile information, access to notifications generated for a user is also provided.
US09081970B2
The invention provides an apparatus for storing data using solid state technology. The apparatus is configured to employ a destruction mechanism that damages elements of the apparatus to render data stored within it irrecoverable in the event that predetermined conditions are met. There are various trigger mechanisms that initiate the destruction process, providing security for stored data from unauthorized access.
US09081964B2
A system includes a utility meter. The utility meter includes a network interface and a processor. The processor is configured to determine whether the network interface is operational subsequent to a bootup of the utility meter. The processor is also configured to initiate a reboot of the utility meter using known valid firmware instruction set of the utility meter if the network interface is determined to be non-operational.
US09081960B2
A storage device is coupled to a computing system comprising an operating system and application software. Access to the storage device is blocked by a kernel filter driver, except exclusive access is granted to a first anti-virus engine. The first anti-virus engine is directed to scan the storage device for malicious software and report results. Exclusive access may be granted to one or more other anti-virus engines and they may be directed to scan the storage device and report results. Approval of all or a portion of the information on the storage device is based on the results from the first anti-virus engine and the other anti-virus engines. The storage device is presented to the operating system and access is granted to the approved information. The operating system may be a Microsoft Windows operating system. The kernel filter driver and usage of anti-virus engines may be configurable by a user.
US09081954B2
In one embodiment, the present invention includes a method for receiving an integrity request in a device of a computer system from a software entity external to the device, performing a measurement of firmware of the device using an integrity measurement logic of the device, analyzing a plurality of pointer structures of the device to determine whether a potential security violation exists, and sending the measurement and a status report regarding the analysis to the software entity. Other embodiments are described and claimed.
US09081946B2
A USB mass storage device includes a memory, USB interface and USB controller. A biometric circuit provides biometric authentication and a secure microcontroller is operatively connected to the biometric circuit and the USB controller and operative in accordance as a trusted platform and having a command set to access security functions and trust authentication of a user using the biometric circuit.
US09081940B2
Embodiments for providing user transparent certificate verifications for web mashups and other composite applications are generally described herein. In some embodiments, a content buffer is provided for holding content until receiving verification results that allow the content to be presented in a browser user interface. A browser core receives an aggregation of content from a plurality of sources and performing local verification of digital certificates associated with the content received from the plurality of sources. A browser content interface intercepts content associated with verified digital certificates from the browser core to provide content associated with verified digital certificates to the content buffer for holding. An online certification module is arranged to receive untrusted certificates from the browser content interface and to perform verification of the received untrusted certificates using online certification services and/or local certificate store on the client device.
US09081939B2
Methods and systems for providing a content workflow include, for example, various embodiments for ascribing metadata and processing media assets such as video, audio, and the like for ingestion into a media delivery platform. The content workflow can be implemented in a client/server environment where media assets can be ingested and processed electronically. According to an exemplary embodiment, a method for operating a system includes receiving, via the system, a metadata file for at least one of audio and video content represented by a title, the metadata file including a provider identification; and generating, via the system and in response to the provider identification, one or more software elements representing one or more rules for distributing the content.
US09081936B2
A system and method for tracking a downloaded digital media file which employs reheader splicing of the digit media file for digital rights management (DRM) are provided. The system and method provide for receiving a request for a first file from a client, accessing the first file and a second file that is representative of the first file, applying data identifying the client into the second file, and combining the first and second file such that a size of the combined file is substantially the same size as the accessed first file, and downloading the combined first and second file to the client. The combining of the first and second file includes replacing corresponding object components of the first file with the objects components of the second file. The data identifying the client includes at least one of a transaction ID, merchant ID, user ID and order ID.
US09081935B2
A method is provided for establishing availability of a two-engine aircraft for a predefined ETOPS flight. The method may include calculating a probability of a dual independent engine shutdown sequence for each of a climb phase, a plurality of cruise phases including an ETOPS phase, and a descent phase into which the predefined ETOPS flight is divisible. The shutdown sequence may be composed of events that for each phase may include events having respective, conditional probabilities specific to a model of the two-engine aircraft, a product of which is the probability of the shutdown sequence for the respective phase. The method may include calculating the risk of the shutdown sequence as a function of a sum of the probabilities for the phases, and establishing availability of the aircraft based on the risk and a preexisting baseline. A similar method is provided for establishing availability of an ETOPS flight path.
US09081929B2
Exemplary systems, methods and computer-accessible mediums can encrypting a circuit by determining at least one location to insert at least one gate in the circuit using a fault analysis, and inserting the at least one gate in at least one section of the at least one location. The determination can include an iterative procedure that can be a greedy iterative procedure. The determination can be based on an effect of the particular location on a maximum number of outputs of the circuit.
US09081927B2
A viewer shows circuit design activities, displaying a signal, its corresponding trace, and the values of the trace over time. A global zoom-in, zoom-out, and zoom-fit are provided over the value display to adjust the time interval covered within the viewer. Non-linear manipulation of the traces within the viewer enables simultaneous zoomed in display of multiple time intervals, and zoomed out display of other time intervals. The non-linear manipulations may be performed within a same display region by designating zoom groups corresponding to the selection of a designated time period of activities of the circuit. Each zoom group may be scaled independently of other timer periods to zoom in or out of activities occurring within the designated time period. A list of behaviors may also be provided. Selection of a behavior generates a separate signal list for signals associated with the behavior and corresponding traces for enhanced debugging.
US09081924B2
Methods and apparatus for recording and visualizing transactions of a test bench simulation are disclosed. Transaction-specific data generated from a test bench simulation may be displayed in a sequence diagram view to provide a view of the transactions arranged sequentially in time.
US09081923B1
A computer-implemented method for use in a molding process by a computer processor includes specifying a simulating domain having a cavity part and a runner part; setting a filling condition of the cavity part without taking into consideration the runner part, wherein the filling condition includes gate pressures and filling rates of the cavities of the cavity part; and performing a steady state analysis to calculate flow conditions of a plurality of runner designs for the runner part by taking into consideration the filling condition of the cavity part, wherein the flow conditions include flow rates of a molding material in the runners of the runner part.
US09081922B2
A method of fabricating a mechanical part of structure that is defined relative to a predictive search of the risks of crack initiation therein by using a method of calculation by finite elements. A coarse mesh (9) is taken into account, and the individual size of the meshes (20) and a critical distance (d) are defined jointly by an operator. The meshes (20) making up the mesh (9) are defined to be of identical mesh size, with the critical distance (d) being defined as the sum of an integer number of depth dimensions of said meshes (20). If the results of the calculation by finite elements diverge, then a calibration weighting function is advantageously applied that takes account of the size of the meshes (20) by taking account of the critical distance (d).
US09081914B2
A system and methods to record a configuration record for components of an asset is provided. The system includes a user interface device comprising a screen having a plurality of attributes and a plurality of link hotspots coupled to the plurality of attributes. A database is coupled to the user interface device, wherein the database includes an aspect associated with each of the plurality of attributes. The system includes a processor coupled to the user interface device and the database, wherein the processor configured to couple the aspect to the plurality of link hotspots.
US09081908B2
Operating M-PHY communications protocol over a Serial Advanced Technology Attachment SATA-based interface and related devices, systems, and methods are disclosed. In one embodiment, the system operates the M-PHY communications over a SATA interface. Related cables, connectors, systems, and methods are also disclosed. In particular, embodiments of the present disclosure take the M-PHY standard compliant signals and direct them through a SATA compliant connector (and optionally cable) so as to allow two M-PHY standard compliant devices having SATA connectors to communicate.
US09081903B2
The present invention relates to an interface device and a method for communication between a medical device and a computer system. In some embodiments, the interface device comprises a conversion device and/or a processor-transceiver and a memory in electrical communication with the conversion device, wherein the memory contains data to instruct the conversion device and/or the processor transceiver how to communicate with the medical device.
US09081901B2
A data flow controller for reconfigurable computers. The novel data flow controller includes a first circuit for selecting one of a plurality of operating conditions and a second circuit for determining if the selected condition is met and outputting a control signal accordingly. In an illustrative embodiment, the operating conditions include: when all enabled data available signals are asserted and all enabled space available signals are asserted; when any enabled data available signal is asserted and all enabled space available signals are asserted; when all enabled data available signals are asserted and any enabled space available signal is asserted; and when any enabled data available signal is asserted and any enabled space available signal is asserted. By allowing a configurable element to operate under different possible conditions, data flow signals can also then be used to control what operation the element performs, in addition to controlling when.
US09081899B2
In an exemplary embodiment, a system may include a memory and a processor communicatively coupled to the memory. The processor is operable to receive a location for sample input data, retrieve the sample input data from the location and execute a web service, the web service processing the sample input data. The processor is further operable to receive sample output data, the sample output data generated by the web service, retrieve expected data, the expected data based in part on the sample input data and the web service, and retrieve data mapping information, the data mapping information associating a first data element from the sample output data with a second data element from the expected data. The processor is also operable to compare the sample output data to the expected data using the data mapping information and store the result of the comparison of the sample output data.
US09081894B2
In a system (20) handles plural communication channels (26), pre-configured instrumentation code (50) is loaded into a common program memory. The instrumentation code (50) is used to generate a surveillance element (70). The surveillance element (70) comprises multi-dimensional execution criteria and executable surveillance code configured to cause performance by a target processor unit of a surveillance element-specified surveillance action. The surveillance element (70) is executed by the target processor unit with respect to the respective subset of plural communication channels and permits continued transport of data over the plural communication channels.
US09081892B2
A method of verifying software includes receiving at least a portion of a software program. The portion of the software program may include a software function within a class. The method may also include generating a proxy class based on the class where the proxy class includes a proxy function that includes a call to the software function and analyzing the proxy function. The analysis of the proxy function may include analyzing the software function based on a proxy condition used by the proxy function, the proxy condition based on the software program and configured to apply conditions to parameters and/or variables in the software function.
US09081889B2
Improved techniques and systems for utilizing a portable electronic device to monitor, process, present and manage data captured by a remote sensor during a physical activity session are disclosed. The portable electronic device offers a convenient user interface that can be visual and/or audio based customized to a particular application, user-friendly and/or dynamic. The portable electronic device can pertain to a personal media device and thus also provide media playback.
US09081887B2
A medication storage and dispensing workstation for use in a medication management system administering the inventory and distribution of pharmaceuticals and medical supplies in a healthcare environment is disclosed. The workstation incorporates a linear drawer assembly having a plurality of discrete, removable, storage modules for containing medications and/or other medical supplies. The storage modules are arranged in a linear array extending longitudinally along the travel path of the linear drawer assembly. Each storage module, in turn, comprises a drawer that is extensible laterally relative to the linear arrangement of the storage modules. As such, the drawer assemblies comprise a compartmentalized “drawer-in-drawer” arrangement that provides an efficient use of storage space and enables a user to utilize the workstation in a workspace having a smaller footprint that traditional storage cabinet apparatus.
US09081883B2
A dynamic diagnostic plan generator arranges diagnostic test procedures related to a vehicle/power tool/patient symptom or operational problem in a sequence based on a probabilistic Failure Mode and Effects Analysis (FMEA). The diagnostic plan generator also tracks a vehicle/power tool/patient state, and provides instructions for test preparation steps and instructions for performing the diagnostic test procedures. The plan generator further generates schematic illustrations of the diagnostic test procedures, and creates a diagnostic data structure containing information related to the diagnostic test procedures. In addition, the diagnostic plan generator sends and receives information regarding actual failure mode occurrences, for example, to and from a central database. Furthermore, the diagnostic plan generator facilitates the creation of failure mode tests by an expert diagnostics author.
US09081879B2
An automated medical diagnostic system and method are disclosed. In an embodiment of the system and method, a matrix of cells is displayed via a graphical user interface on a computing device, each cell being representative of a patient health item (PHI) associated with a particular disease. A PHI is entered on the display in one of the cells and a differential diagnosis is updated based on the input PHI. The updated differential diagnosis is then displayed to a user. The system includes multiple diagnostic functions that use the matrix for input and output, wherein the diagnostic functions are selectively executed according to each newly input PHI so as to result in the differential diagnosis. In certain embodiments, the input PHIs are stored in a patient medical record. The computing device can operate independently or in a connection with a system server.
US09081876B2
A method and system are provided for navigating an image series that includes at least one image. The method and system involve receiving an input corresponding to a reference location; operating at least one processor for determining a target position in the image series based on the reference location, the at least one processor being configured to receive initial series data corresponding to an initial location in the image series and a separation distance corresponding to a distance between two sequential images in the image series; determine a target distance for the image series, the target distance corresponding to a distance from the reference location to the initial location; and determine the target position based on the separation distance and the target distance.
US09081875B2
Certain examples provide systems and methods to organize clinical data using detailed clinical models and frames. An example system includes a clinical element query processor to query data organized according to one or more detailed clinical models. The clinical element processor is to form a frame from instances of the queried data. The example system also includes a transformer to receive the frame and operate on the data in the frame to transform the frame into a component to be used as a part of a clinical application.
US09081868B2
A search system will receive a voice query and use speech recognition with a predefined vocabulary to generate a textual transcription of the voice query. Queries are sent to a text search engine, retrieving multiple web page results for each of these initial text queries. The collection of the keywords is extracted from the resulting web pages and is phonetically indexed to form a voice query dependent and phonetically searchable index database. Finally, a phonetically-based voice search engine is used to search the original voice query against the voice query dependent and phonetically searchable index database to find the keywords and/or key phrases that best match what was originally spoken. The keywords and/or key phrases that best match what was originally spoken are then used as a final text query for a search engine. Search results from the final text query are then presented to the user.
US09081856B1
Disclosed are various embodiments for prefetching of objects referenced on a network page. An encoded network page referring to at least one item is retrieved. The same item is included on a second network page. In response to an indication of user interest in the item on the first network page, at least an initial portion of a video resource associated with the indicated item and included on the second network page is retrieved. In response to a user selection of the same item, the retrieved initial portion of the video resource is rendered on the second network page.
US09081852B2
In one embodiment, a set of target search terms for a search is received. Candidate terms are selected, where a candidate term is selected to reduce an ontology space of the search. The candidate terms are sent to a computer to recommend the candidate terms as search terms. In another embodiment, a document stored in one or more tangible media is accessed. A set of target tags for the document is received. Terms are selected, where a term is selected to reduce an ontology space of the document. The terms are sent to a computer to recommend the terms as tags.
US09081844B2
A middleware messaging system is connected between user devices and content providers possibly through one or more networks. The middleware messaging system includes a coordination manager for coordinating partial messages transmitted between the user devices and the content providers. Partial messages are received by the middleware messaging system from one or more sources through one or more channels. Partial messages that are associated with each other comprise a single context and as such are coordinated and transmitted to one or more destinations through one or more channels.
US09081841B2
A method may be performed by a device of a group of devices in a distributed data replication system. The method may include storing objects in a data store, at least one or more of the objects being replicated with the distributed data replication system, and conducting a scan of the objects in the data store. The method may further include identifying one of the objects as not having a reference pointing to the object, storing a delete negotiation message as metadata associated with the one of the objects, and replicating the metadata with the delete negotiation message to one or more other devices of the group of devices.
US09081839B2
Push replication techniques are described for use in an in-memory data grid. When applications on a cluster perform insert, update or delete operations in the cache, a push replication provider asynchronously pushes updates from the source cluster to one or more remote destination clusters. The push replication provider includes a pluggable internal transport to send the updates to the destination cluster. This pluggable transport can be switched to employ a different communication service or protocol. A publishing transformer can chain multiple filters and apply filters on a stream of updates from source cluster to the destination cluster. A batch publisher can be used to receive batches multiple updates and replicate those batch to the destination cluster. XML based configuration can be provided to configure the push replication techniques on a cluster. A number of cluster topologies can be utilized, including active/passive, active/active, multi-site active/passive, multi-site active/active and centralized replication arrangement.
US09081824B2
The present disclosure relates to systems and methods customizing electronic communications. A future event associated with a first user may be determined, and a second user that is associated with the first user may be identified. A plurality of communications involving the first user and the second user may be analyzed. A selection rule may be applied based on the analyzed plurality of communications, the selection rule identifying content from the database. Content from the database may be selected based on the application of the selection rule. An electronic message may be provided to the first user identifying the future event, and the selected content may be provided to the first user.
US09081823B2
An online social networking system can be used to rank social network objects of various different object types, each according to its type. The objects may comprise types such as users, communities, blogs, blog entries, events, forums, forum topics, postings, photographs, and/or images. The product comprises code for carrying out a method that begins with receiving ranking data about social network objects that comprises data about events performed on the social network. For each social network object, a ranking function is applied to ranking data about the social network object based on its type. In addition, the recency of an event on the social network related to the social network object is evaluated, in order to calculate the score for the social network object. A relative ranking for each of the plurality of social network objects based on its score is determined, and the score and relative ranking of each of the social network objects stored.
US09081819B2
Techniques are provided for using bonds, which reflect relationships between items, to facilitate searches against the items. The degree of separation between any two given searchable items is based on the minimum number of bonds that have to be traversed to arrive at one of the two searchable items when starting at the other of the two searchable items. The bonds are used to respond to a search request, performing a search relative to a particular searchable item. For example, the search may involve only those searchable items that are within a particular degree of separation of the particular searchable item. As another example, the search may involve determining the order in which searchable items are compared against search criteria of the search request based on the degree of separation of the searchable items from the particular searchable item.
US09081818B2
An example method includes (i) creating, by a first serial attached SCSI (SAS) switch, a first topology map describing a portion of a SAS fabric associated with the first SAS switch; (ii) receiving, at the first SAS switch and from a second SAS switch, a second topology map describing a portion of the SAS fabric associated with the second SAS switch; and (iii) merging, by the first SAS switch, the first topology map and the second topology map to produce a consolidated topology map of the SAS fabric.
US09081816B2
A method of implementing a universal framework for searching across multiple search platforms in a secure federated search. The method includes receiving, at a federated broker, a query from an authorized user, obtaining a plurality of user credentials associated with the authenticated user, wherein each of the plurality of user credentials are used to access at least one source of a plurality of sources, determining a required query format for each of the plurality of sources, translating the query into a plurality of queries formatted according to the required query format of each of the plurality of sources, propagating the plurality of translated queries and the plurality of user credentials to each corresponding source to appear to each corresponding source to be the authorized user, receiving, at the federated broker, results of each of the plurality of queries from each source of the plurality of sources, and consolidating the results of each of the plurality of queries to be displayed in a uniform manner.
US09081810B1
An apparatus includes a touch sensitive area that is arranged and configured to receive one or more gestures, a memory that is arranged and configured to store one or more device gestures, where the stored device gestures correspond to a selection of one of one or more remote devices and a processor that is operably coupled to the touch sensitive area and the memory. The processor is arranged and configured to compare the gestures received in the touch sensitive area to the stored device gestures, determine a selected remote device based on the comparison and initiate contact with the selected remote device.
US09081803B2
A technique for improving the performance of RCU-based searches and updates to a shared data element group where readers must see consistent data with respect to the group as a whole. An updater creates one or more new group data elements and assigns each element a new generation number that is different than a global generation number associated with the data element group, allowing readers to track update versions. The updater links the new data elements into the data element group and then updates the global generation number so that referential integrity is maintained. This is done using a generation number element that is referenced by a header pointer for the data element group, and which in turn references or forms part of one of the data elements. After a grace period has elapsed, the any prior version of the generation number element may be freed.
US09081802B2
There are provided methods and systems for providing viewers of a digital image with information about identifiable and scenes within the image. In an embodiment, digital images, uploaded to a host website, are customized through the incorporation of some number of selectable informational links and other text based information to provide viewers of the image real-time access to social and advertising related information regarding certain identifiable objects and scenes in the image. The selectable information links are incorporated within and around the digital image in a process referred to herein as image tagging.