US09661074B2
A method begins by a dispersed storage (DS) processing module of a dispersed storage network (DSN) determining whether a change has occurred to a data object of a set of data objects. When a change has occurred, the method continues with the DS processing module accessing de-duplication tracking data for the set of data objects. When the change is deletion of an identified data object of the set of data objects, the method continues with the DS processing module determining whether the identified data object is the only data object in the set of data objects. When the identified data object is not the only data object in the set of data objects, the method continues with the DS processing module updating the linking information to delete linking the identified data object to addressing information.
US09661073B2
Computer-implemented methods for synchronizing a personalized web browsing experience on multiple devices by logging into a web browser on each device using a pre-existing profile are provided. In one aspect, a method includes receiving a request to open a first instance of a web browser, and receiving, in the first instance of the web browser, log in information for a pre-existing profile created independently of the web browser. The method also includes providing web browser personalization information for the pre-existing profile in response to the receipt of the log in information for the pre-existing profile. Systems, web browsers, and machine-readable media are also provided.
US09661072B2
A plurality of sources storing portions of a digital content item that includes a plurality of pieces is identified. The plurality of sources includes one or more peer computers of a peer-to-peer network. For each piece of the plurality of pieces of the digital content item, that piece is acquired from a source.
US09661068B2
Systems, methods, and computer readable media for sharing awareness information are provided. A non-aware electronic device can require awareness information including, for example, information about its environment or information about its status within its environment, in order to perform a particular device operation. When the non-aware device lacks an awareness component for detecting the required type of awareness information, the non-aware device can establish a communications path with an aware device that includes such an appropriate awareness component. The aware device can share the required type of awareness information as captured by its awareness component with the non-aware device. The distance between the non-aware device and the aware device can be less than a threshold distance to ensure that the shared awareness information is relevant to the non-aware device.
US09661065B2
Embodiments disclosed herein provide systems, methods, and computer readable media for indicating data object exposure in a cloud computing environment. In a particular embodiment, a method provides receiving information about a data object from the cloud computing environment. The method further provides analyzing the information to determine a plurality of exposure characteristics for the data object. The method further includes determining an indication of exposure of the data object based on the plurality of exposure characteristics.
US09661055B2
A method and a system for redirecting a client are disclosed, the method including: sending by the client a request message to a redirect agent; returning by the redirect agent a first response message to the client, an identification of a second realm being carried in the first response message; sending by the client the request message to a second server in the second realm. The data are maintained and modified only on the redirect agent, so that the redirection service between different realms may be realized without upgrading or maintaining the client. In addition, because the number of redirect agents is much smaller than the number of clients, the operation and maintenance costs may be reduced greatly.
US09661033B2
An apparatus, computer program product, and method for assisting communication with an intended communication partner. The apparatus may include a user interface and at least one computer processor. The computer processor initiates a communication session with a first contact. The processor identifies at least one second contact that has a potential to be confused with the first contact and highlights at least one difference between the first contact and the second contact in the user interface.
US09661028B2
A method, apparatus, and system for disaster recovery of an IP Multimedia Subsystem (IMS) are provided. The method includes: triggering a redundant Call Session Control Function (CSCF); obtaining, by the redundant CSCF, user backup data of registered IMS Private User Identities (IMPIs) that are associated with IMPUs and user service configuration data of IMS Public User Identities (IMPUs) in an IMS subscription from a network storage entity of a user; and recovering, by the redundant CSCF, a corresponding service according to the obtained user backup data of the registered IMPIs and user service configuration data of the IMPUs in the IMS subscription. With the present invention, the one-IMPU multi-IMPI, one-IMPI multi-IMPU, or multi-IMPI multi-IMPU service can be recovered, and this enables the user to have better service continuity experiences.
US09661025B2
Methods and apparatuses for identifying and detecting threats to an enterprise or e-commerce system are disclosed, including grouping log lines belonging to one or more log line parameters from one or more enterprise or e-commerce system data sources and/or from incoming data traffic to the enterprise or e-commerce system; extracting one or more features from the grouped log lines into one or more features tables; using one or more statistical models on the one or more features tables to identify statistical outliers; labeling the statistical outliers to create one or more labeled features tables; using the one or more labeled features tables to create one or more rules for identifying threats to the enterprise or e-commerce system; and using the one or more rules on incoming enterprise or e-commerce system data traffic to detect threats to the enterprise or e-commerce system. Other embodiments are described and claimed.
US09661024B2
The present invention extends to methods, systems, and computer program products for configuring applications and policies in non-cooperative environments. Embodiments of the invention provide the ability to configure non-cooperative applications and operating systems to comply with a policy. For example, applications and operating systems at a user's (e.g., an information worker's) personal device (e.g., smartphone) can be appropriately configured to provide more secure access to a corporate IT infrastructure. An IT worker can programmatically repackage an application to comply with a policy, deploy it to a user's personal device, and adjust the application's behavior during execution to comply with the policy. Adjusted behavior can include injecting custom user interfaces into an application to support various scenarios. Injecting a custom user interface can be facilitated by tracking visual context for an application across one or more displays and switching between the application's visual context and the custom user interface.
US09661019B2
Systems and methods for discovery and classification of denial of service attacks in a distributed computing system may employ local agents on nodes thereof to detect resource-related events. An information later agent may determine if events indicate attacks, perform clustering analysis to determine if they represent known or unknown attack patterns, classify the attacks, and initiate appropriate responses to prevent and/or mitigate the attack, including sending warnings and/or modifying resource pool(s). The information layer agent may consult a knowledge base comprising information associated with known attack patterns, including state-action mappings. An attack tree model and an overlay network (over which detection and/or response messages may be sent) may be constructed for the distributed system. They may be dynamically modified in response to changes in system configuration, state, and/or workload. Reinforcement learning may be applied to the tuning of attack detection and classification techniques and to the identification of appropriate responses.
US09661015B2
A device may include countermeasure circuitry that provides a countermeasure check that protects device logic. The device may also include enforcement circuitry that non-deterministically enforces the countermeasure check on the device logic so that the device logic is not always protected by a countermeasure action within the countermeasure check. The device may non-deterministically enforce the countermeasure check according to an enforcement rate, and the device may adjust the enforcement rate depending on a priority of the device logic or device logic portion protected by a particular countermeasure check.
US09661005B2
According to one embodiment, a system includes a processor and logic integrated with and/or executable by the processor, the logic being configured to identify a security issue affecting a first peer in one or more secure transmission control protocol/user datagram protocol (TCR/UDP) sessions, inform a second peer about the security issue using the first peer of the one or more TCP/UDP sessions, and perform at least one action in response to identifying and/or being informed about the security issue. In another embodiment, a method for providing a secure TCP/UDP session includes identifying a security issue affecting a first peer in one or more TCP/UDP sessions, informing a second peer about the security issue using the first peer of the one or more TCP/UDP sessions, and performing at least one action in response to identifying and/or being informed about the security issue.
US09660998B1
Methods and systems are provided herein to enable secure proxying of network traffic between trusted and untrusted environments. In particular, a secure proxy may be provided that includes a set of policies. The policies may be applicable to various network protocol layers (e.g., an application layer), network traffic types, and/or endpoint resolution. The set of policies may be used to inspect, restrict and/or modify traffic between the trusted and untrusted environment to ensure data and network security. A proxy device may use the set of policies, for example, to obtain current service-related information (such as the list of IP addresses) currently associated with a computing resource requested by an application. Such endpoint information may be used, in turn, to update a white list.
US09660995B2
The subject matter described herein includes methods, systems, and computer readable media for combating mobile device theft with user notarization. One method includes providing a supplicant video notarization system application executable on a supplicant device for initiating an interactive video call between a supplicant and a notary as a condition to the supplicant accessing a protected electronic resource. The method further includes providing a notary video notarization system application executable on a notary device through which the notary receives the interactive video call and interacts with the supplicant via the interactive video call to confirm the identity of the supplicant and that video of the supplicant provided in the call is live.
US09660990B2
A root user identifier of a computing system is disabled. Thereafter, and in response to determining that a problem with the computing system requires root privileges to the computing system to solve, a code patch for installation on the computing system is received from a third party. The code patch is installed on the computing system, resulting in a user identifier temporarily having the root privileges to the computing system. The user identifier is different than the root user identifier is. A password for the user identifier is provided to the third party to permit the third party to solve the problem with the computing system using the root privileges, via the user identifier temporarily having the root privileges to the computing system. The code patch is computer code installable on the computing system.
US09660985B2
Implementations of the present disclosure relate to systems and methods for service authorization. A server terminal device may receive user authentication information that is stored on the auxiliary device for user authentication associated with an authentication device. Based on the user authentication information, the server terminal device may then determine whether the authentication device meets the authentication condition. The implementations further relate to methods and systems for requesting service authorization.
US09660979B2
An information processing system and an information processing apparatus and method for transmitting image data from a portable terminal apparatus, to a different apparatus through a network so that the image data may be managed by the different apparatus. A camcorder image station has a folder for each user of a camcorder and has, in each of the folders, 10 sub folders of album 1 to album 10 to each of which a name is applied in advance. The user of the camcorder transmits images picked up by the user to the camcorder image station so that the images are registered into a predetermined album. The camcorder has an album list of 10 albums of album 1 to album 10 in advance and selects an album of one of the names from within the list to designate an album into which image data should be uploaded.
US09660975B2
Techniques for an ID federation gateway include determining whether a user associated with a request for a particular network resource is to be identified by the provider of the particular service or by a different party. The service also comprises causing the different party to provide identification data that indicates an identity for the user, if the user is to be identified by the different party. The method further comprises causing user credentials data, based on the identification data, to be sent to an authentication process of the provider for a set of one or more network resources that includes the particular network resource requested by the user, if the data indicates that the user is successfully identified.
US09660962B2
An indication to validate operation of a network-attached storage gateway is received. The network-attached storage gateway communicatively couples a client and an object store. a virtual namespace is generated based, at least in part, on a network-based file system implemented by the network-attached storage gateway. A first file system entity is selected from the virtual namespace. A first identifier of the first object in the object store is determined. The first object corresponds to the first file system entity. The first object is retrieved from the object store based, at least in part, on the first identifier. The first object is retrieved by bypassing the network-attached storage gateway. It is determined whether the first object matches the first file system entity.
US09660955B1
Methods, systems and computer program products to communicate using a synthetic Media Access Control (synMAC) addresses are provided. The method includes the step of receiving and storing a first message assigning a first synMAC address. The first synMAC address is distinct from a unique stored Media Access Control (MAC) address. A second message including a second synMAC address is received. The first synMAC address is compared to the stored second synMAC address. The second message is accepted and processed if the first synMAC address is equal to the second synMAC address. In another example, a first device assigns a common synthetic Media Access Control (synMAC) address to multiple devices. The first device then broadcasts a message including the common synMAC address to each of the devices.
US09660949B2
Methods and systems for providing geomessaging clients mobility between different geomessaging servers are discussed with relation to the interaction of nodes in either an IMS or a non-IMS based network.
US09660948B2
Methods, devices, and machine-readable media are provided to perform rule-based rate limiting. As provided in this disclosure, this may include receiving a message en route to a destination, determining one or more parameters of the message, and determining whether the parameters of the message match parameters of a rule that specifies taking a first action when more than some number of messages having those parameters are received within a specific amount of time. When the one or more parameters of the message match the one or more parameters of the first restriction rule, a sliding window counter that indicates a total number of corresponding messages received within the amount of time may be incremented. When the first sliding window counter exceeds the first number of messages, the specified action may be taken.
US09660943B2
According to one embodiment of the present invention, a system for providing call signaling services to client devices transmits a start channel message on a service topic from a first client device to a service instance. The system publishes from the service instance to the client devices a channel message including a channel topic. The service instance subscribes to the service topic and an associated channel topic. Each client device subscribes to a corresponding client topic. The system transfers signaling information between the client devices and the service instance by publishing signaling information to a channel topic and client topics to establish a communication channel between the client devices. The system communicates between the client devices by publishing information over the communication channel. Embodiments of the present invention further include a method and computer program product for providing call signaling services in substantially the same manners described above.
US09660933B2
Systems and methods are provided for dynamically allocating and accessing hosting server resources to users of hosting services. The system may include one or more servers that provide multiple levels of access to the hosting server resources, and an administration server configured with one or more migration paths that allow the user to migrate the account between two levels while the account remains accessible to all entities authorized to access the account. The hosting server resources may be divided according to virtual partitions that are resizable by the administration server. The system may include a migration interface stored on and accessible to the user from the administration server. The migration interface provides the user with options to migrate the account between the levels of access. The system may include an application programming interface that provides access to the administration server for changing the account's level of access.
US09660929B1
A system, method, and computer program product are provided for segregated policy decision making in the context of network function virtualization orchestration in a communication network. In use, at least one orchestration task is identified to be performed by a Network Function Virtualization Orchestrator (NFV-O) associated with a communication network. Additionally, the at least one orchestration task is assigned to be performed by a network service planning module, the network service planning module functioning to assure the at least one orchestration task is acceptable based on an orchestration template. Further, a policy decision module is queried with contextual information associated with the at least one orchestration task, the policy decision module functioning to assure one or more business goals are considered based on the contextual information.
US09660928B2
Methods, apparatuses and systems directed to hosting, on a computer system, a plurality of application instances, each application instance corresponding to a remote client application; maintaining a network connection to each of the remote client applications for which an application instance is hosted; allocating resources of a graphics processing unit of the computer system between at least two of the remote client applications; concurrently rendering, utilizing the resources of the graphics processing unit of the computer system, the graphical output of the application instances corresponding to the at least two of the remote client applications; and transmitting the rendered graphical output to the at least two of the remote client applications over the respective network connections.
US09660926B2
An embodiment of a method of requesting a plurality of media streams can include, as performed by a computing device, receiving a control input to control a playback function of at least one of the plurality of media streams, determining a download bandwidth between the computing device and a media source on a network, classifying the at least one of the plurality of media streams based on the control input and total download bandwidth, and sending a plurality of requests for the plurality media streams over a single connection to the media source, wherein at least one of an order or a content of the requests is based on the classification. The sending of the media stream requests can utilize at least one of a server-side protocol for multiplexing media streams over a single connection or one or more of HTTP pipelining or HTTP range requests over a single connection.
US09660919B2
A method for adaptive data connection retry by a wireless communication device is provided. The method can include detecting a failed attempt by the wireless communication device to establish a data connection for an application. The method can further include selecting a data retry pattern having a predefined association with the application from a set of predefined data retry patterns. The set of predefined data retry patterns can be defined based at least in part on application usage data collected by a network entity from wireless communication devices. The method can additionally include retrying data connection establishment in accordance with the selected data retry pattern.
US09660917B2
A system and method for controlling communications networks. Network performance information is gathered from a first communications network using performance information packet data packets. A network operator of the first communications network is controlled from a secondary communications network using the performance information packet data packets. Changes to the network operator are implemented based on instructions included in the performance information packet data packets.
US09660913B2
A network packet broker comprising a plurality of source ports for receiving incoming data packets, a plurality of destination ports for transmitting outgoing data packets, a switch chip arranged to direct incoming data packets from a source port to a destination port based on a configurable set of rules, and a port for receiving a configuration model from a user interface. The configuration model comprises a set of maps and a set of filters, each map specifying at least one source port and at least one destination port, and each filter specifying a condition under which a packet of interest may pass the filter. A rule generator is provided to convert the configuration model into a set of rules for configuring the switch chip. The rule generator is arranged to convert a plurality of maps into a set of rules which the switch chip can implement in one pass.
US09660911B2
The present invention relates to a method for confirming the delivery of a data packet in a mesh network by sending an acknowledgement (ACK) to an ingress mesh point (IMP). A mesh network comprises a plurality of mesh points that are wirelessly linked together. A data packet sent by a station (STA) is received by an IMP. A MAC frame is generated for transmission of the data packet and the frame is forwarded to an egress mesh point (EMP) in order to provide a service by the mesh network. The MAC frame includes a field comprising an IMP address and an EMP address. When the EMP, (or optionally an intermediate mesh point), receives a data packet successfully, the EMP or the intermediate mesh point sends an ACK to the IMP or preceding mesh point.
US09660905B2
A method forwarding data traffic based on a service chain policy for distributed gateway located within a network virtualization edge (NVE). The NVE may receive, within a first virtual overlay network, a data packet destined for a destination tenant end point located in a second virtual overlay network. The NVE may determine that a network service function is unavailable to treat the data packet between the first virtual overlay network and the second virtual overlay network. In order to route the data packet, the NVE may obtain a service chain policy that provides the location of a network node configured to treat the data packet with the network service function. The NVE may transmit the data packet toward the network node. A service chain policy may correspond to a sequence of network nodes that represents a path to the destination tenant end point.
US09660901B2
A first switch forms first and second LAGs and a main LAG comprising the first and second LAGs as sub-LAGs. Forming the first and second LAGs comprises receiving LACP data units which indicate that the first switch is connected to second and third switches through first and second pluralities of ports, and forming the first LAG of the first plurality of ports and the second LAG of the second plurality of ports. The second and third switches share a control plane. In forming the first and second LAGs, LACP data units are received from the second and third switches and include unique identifiers of the second and third switches respectively. Forming the main LAG comprises receiving one or more LACP data units which indicate that the first and second plurality of ports are to be part of the main LAG, and forming the main LAG based on such LACP data units. Other features are also provided.
US09660899B2
End-to-end multipathing through network having switching devices compatible with different protocols
A first cluster includes first switching devices that are compatible with a software-defined networking (SDN) protocol. A second cluster includes second switching devices within or partially overlapping the first cluster. Each second switching device is compatible with a protocol for an open systems interconnection (OSI) model layer. The first switching devices include one or more border switching devices located at a boundary between the first cluster and the second cluster. Each border switching device is also compatible with the protocol for the OSI model layer. The first switching devices effect first multipathing through the network except through the second cluster, and the second switching devices effect second multipathing just through the second cluster of the network. As such, the first switching devices and the second switching devices together effect end-to-end multipathing through both the first cluster and the second cluster of the network.
US09660894B2
A first electronic message collector collects electronic messages travelling on a first network and stores the electronic messages in a first storage. A second electronic message collector collects electronic messages travelling on a second network and stores the electronic messages in a second storage. An electronic message associator retains a mapping table in which the correlation, or similar, between electronic messages travelling from the first network to a gateway device and electronic messages travelling from the gateway device the second network are defined. The electronic message associator references the mapping table and associates the electronic messages stored in the second storage with the electronic messages stored in the first storage. From the result of the above-mentioned association, a status analyzer determines whether or not receipt of electronic message between the first network and the second network is accomplished normally.
US09660881B2
A method and system for determining signal penetration of one or more neighbor base stations is disclosed. The method comprises: receiving one or more measurement reports from one or more UEs associated with a serving base station, wherein the one or more measurement reports comprise signal strength values of the one or more neighbor base stations; identifying a location of each of the one or more UEs based on the one or more measurement reports; determining a distance between one or more pairs of UEs based on the location of the each UE; defining one or more penetration areas based on the one or more distances between the one or more pairs of UEs; and determining signal penetration in the one or more penetration areas based on the one or more pairs of UEs associated with each of the penetration areas.
US09660876B2
A computer-implemented method operable in a content delivery service (CDN), includes, by a collector system: receiving multiple event streams of event data, said multiple event streams comprising event data from a plurality of CD services in said CDN, each event of said event streams comprising: (i) a timestamp for said event, (ii) information relating to said event; and producing state data relating to information represented in said event data of said multiple event streams while being able to asynchronously respond to queries relating to said state data.
US09660869B2
Records are obtained from sources and typed datasets are assembled based on the obtained records. Relationships are identified among the typed datasets and at least one network comprising nodes and edges are assembled based on the identified relationships. A network analyzer assembles a vector and the vector is passed to analytics. The analytics then generate an output that is provided to a user or other device in the form of data.
US09660858B2
Systems, methods, and computer-readable storage media for maintaining consistent globally unique identifiers (GUIDs) for content items accessible via an asynchronous interface in a multi-user network-based content management environment (storage environment). The example content management system can make a content item within a data storage available to an authorized user via the asynchronous interface, and receive, from a client device, content item change information derived from data generated by an operating system function at the client device. Then the content management system can analyze the content item change information to determine a corresponding action at the content management system, and implement the corresponding action on the server side. The content management system can optionally provide a confirmation of the corresponding action to the client device.
US09660847B2
A transmit circuit can be configured to output two-level pulse amplitude modulation (PAM-2) or four-level pulse amplitude modulation (PAM-4). In the PAM-2 mode, pre-tap feed-forward equalization (FFE) and post-tap FFE can be applied to the PAM-2 signal by pre-taps and post-taps, respectively. In the PAM-4 mode, at least one post-tap is repurposed to generate, along with the main tap, the main PAM-4 signaling levels. At least one PAM-2 FFE tap is repurposed to apply FFE in the PAM-4 mode.
US09660846B2
Circuitry for receiving a high-speed serial data signal (e.g., having a bit rate in the range of about 10 Gpbs and higher) includes a two-stage, continuous-time, linear equalizer having only two serially connected stages. Phase detector circuitry may be provided for receiving the serial output of the equalizer and for converting successive pairs of bits in that output to successive parallel-form bit pairs. Further demultiplexing circuitry may be provided to demultiplex successive groups of the parallel-form bit pairs to final groups of parallel bits, which can be quite large in terms of number of bits (e.g., 64 parallel bits). Another aspect of the invention relates to multiplexer circuitry for efficiently going in the opposite direction from such relatively large groups of parallel data bits to a high-speed serial data output signal.
US09660842B2
Described is an apparatus which comprises: samplers operable to perform linear equalization training and to perform function of an un-rolled decision feedback equalizer (DFE); and logic to select output of offset samplers, from among the samplers, when two adjacent bits of an input signal are the same. Described is an equalization scheme which comprises a linear equalizer (LE) operable to match a first post-cursor residual ISI tap to a first pre-cursor residual ISI tap for a non-lone bit transition of the input signal.
US09660838B2
A method to be performed at a station configured to connect to a Long Term Evolution radio access network (LTE-RAN) to utilize enhanced Multimedia Broadcast Multicast Services using a Multicast-Broadcast Single-Frequency Network (MBSFN). The method including receiving a MBSFN subframe having a MBSFN subframe structure including a plurality of Orthogonal Frequency-Division Multiplexing (OFDM) symbols, a first one of the OFDM symbols having a first reference symbol inserted therein, a second one of the OFDM symbols having a second reference symbol inserted therein, determining a rate of change of channel conditions being experienced by the station and performing a non-destaggered channel estimation when the rate of change of channel conditions is greater than a predetermined threshold, the non-destaggered channel estimation using a first Channel Impulse Response (CIR) at the first OFDM symbol and a second CIR at the second OFDM symbol.
US09660837B2
A gateway provides duplex-directional, multimedia ad hoc mesh networking, peer-to-peer direct communications, power optimization, dynamic configuration, and data management, while operating within various devices and network topologies. A multitasking virtual machine monitor for mobile networked devices, that is capable of functional expandability and portability to various operating environments, interoperability with a variety of operating systems, the Gateway Control System (GCS) performs functional capabilities in both a local and a networked topology using local and remote hardware and software. Software within the GCS is partitioned into sequentially, autonomous code, referred to herein as “modules,” each module being configured to communicate with hardware and other gateway modules. Collectively, all gateway modules are referred to herein as the gateway stack (GS). Each member of the GS can be turned on or off, downloaded from a remote site, and dynamically configured.
US09660832B2
Techniques, including systems and methods for distributing electronic messages, are disclosed. In an embodiment, information relating to a message thread is maintained. The information includes information identifying one or more members of a distribution list to be excluded from receiving messages in the message thread. When it has been determined to prevent distribution of the electronic message to one or more members of the distribution list, the electronic message is distributed to members of the distribution list excluding the one or more members to whom distribution is to be prevented. The distributed electronic message may identify the distribution list as an intended recipient.
US09660830B2
A control method executed by a packet processing device, the control method includes receiving, by a first processor, a received packet; identifying first processing execution information corresponding to the received packet, from among a plurality of first processing execution information, by referring to the first memory, based on packet identification information included in the received packet; and transmitting processing specification information included in the identified first processing execution information together with the received packet, to a second processor, when the processing specification information included in the identified first processing execution information specifies processing by the second processor; receiving, by the second processor, the processing specification information included in the identified first processing execution information and the received packet; and executing the processing for the received packet in accordance with second processing execution information specified by the received processing specification information, by referring to the plurality of second processing execution information.
US09660824B2
A method is provided in one example and includes establishing a connection with each of a first set of endpoints associated with meeting attendees, and establishing a first online meeting between the first set of endpoints associated with meeting attendees in which the first online meeting has a meeting identifier associated therewith. The method further includes receiving first context information associated with the first online meeting from at least one of the first set of endpoints associated with meeting attendees, and establishing a second online meeting between a second set of endpoints associated with meeting attendees without disconnecting at least one of the first set of endpoints associated with meeting attendees in which the second online meeting has the same meeting identifier as the first online meeting associated therewith. The method still further includes maintaining the first context information within the second online meeting.
US09660808B2
One aspect relates to a communication protocol for communicating between one or more entities, such as devices, hosts or any other system capable of communicating over a network. A protocol is provided that allows communication between entities without a priori knowledge of the communication protocol. In such a protocol, for example, information describing a data structure of the communication protocol is transferred between communicating entities. Further, an authentication protocol is provided for providing bidirectional authentication between communicating entities. In one specific example, the entities include a master device and a slave device coupled by a serial link. In another specific example, the communication protocol may be used for performing unbalanced transmission between communicating entities.
US09660801B2
The present invention discloses methods and devices for key management in an as-a-service (aaS) context. Methods include the steps of: upon receiving a creation request in a provider computing-environment, creating a specific key in at least one location in the provider computing-environment by repetitively computing respective specific-key contributions: in a set of N computing resources in the provider computing-environment; and in a set of M customer locations in a customer computing-environment; and applying the respective specific-key contributions to change a specific-key value in the computing resources, wherein the respective specific-key contributions are never revealed to any computing resources, and to any customer locations, other than respective contributors; wherein at least one location is a region of memory located in a computing resource operationally connected to the provider computing-environment, wherein the customer locations are regions of memory located in a computing resource operationally connected to the customer computing-environment.
US09660794B2
A bi-directional full-duplex lock system applied in a data transmission interface of a liquid crystal display is disclosed. The data transmission interface includes a transmitter and a receiver. The bi-directional full-duplex lock system includes a detection module and a control module. The detection module detects a transmitter link state of transmitter and a receiver link state of receiver respectively. The control module controls transmitter to transmit a lock signal to receiver, controls receiver to transmit the lock signal to transmitter, and controls one receiver to transmit the lock signal to another receiver. The lock signal relates to transmitter link state and receiver link state. When transmitter transmits the lock signal to receiver, a phase of the lock signal will be reversed for the receiver to detect whether its own frequency is correct.
US09660789B2
A method performed by a central network node includes instructing one of a first network node and a second network node to transmit to a first wireless device. The central network node receives a first Channel Quality Indicator, CQI, and a third CQI sent by the first wireless device. The first CQI has been computed by the first wireless device based on a first unique signal transmitted by the first network node. The third CQI has been computed by the first wireless device based on a second unique signal transmitted by the second network node. The central network node identifies the one of the first and the second network nodes having a better channel quality, based on the received first CQI and the third CQI. The central network node sends a first message to the identified network node, instructing it to transmit to the first wireless device.
US09660788B2
The present invention provides a method and apparatus for performing an uplink Hybrid Automatic Repeat Request (HARQ) operation in an asymmetric multicarrier communication network environment. In one embodiment, a method includes transmitting a HARQ packet to a base station in a transmit time interval of one of a plurality of partitions of an uplink allocation interval on a first carrier by a mobile station. Then, the method includes determining a partition of the uplink allocation interval in which the HARQ packet is transmitted, and determining a HARQ feedback region in the subsequent downlink subframe corresponding to the determined partition. The method further includes receiving HARQ feedback information in the determined HARQ feedback region in the subsequent downlink subframe on a second carrier from the base station.
US09660781B2
Embodiments of the present invention disclose methods and related devices for sending and receiving uplink control signaling. On a terminal side, the terminal performs data processing and resource mapping separately for the uplink control signaling and uplink data that are scheduled by a base station, so as to obtain a frequency domain signal, where the performing resource mapping separately refers to mapping the data-processed uplink control signaling and uplink data to different resource block groups in a system bandwidth separately; and the terminal performs frequency-to-time conversion for the obtained frequency domain signal to obtain a time domain signal, and then sends the signal to the base station.
US09660780B2
The present invention relates to a method for receiving a reference CSI configuration information and a following CSI configuration information which is configured to report a same RI (Rank Indicator) as the reference CSI configuration information, receiving a first CSI-RS (Channel State Information-Resource Signal) configuration information associated with the reference CSI configuration and a second CSI-RS configuration information associated with the following CSI configuration, number of CSI-RS antenna ports according to the second CSI-RS configuration information is same as number of CSI-RS antenna ports according to the first CSI-RS configuration information; and transmitting CSI determined based on at least one of the first CSI-RS configuration information and the second CSI-RS configuration information.
US09660778B2
A method for wirelessly transmitting data and control information using a plurality of transmission layers includes determining a number of bits in user data codewords to be transmitted during a subframe and calculating a number of control vector symbols to allocate to control information during the subframe. The number of control vector symbols is calculated based on the number of bits in the user data codewords to be transmitted during the subframe and an estimate of the number of vector symbols onto which the user data codewords will be mapped. The estimate of the number of vector symbols depends on the number of control vector symbols to be allocated to control information. The control codewords may be mapped to the calculated number of control vector symbols and transmitting vector symbols carrying the user data codewords and the control codewords over the plurality of transmission layers during the subframe.
US09660773B2
A method, a user equipment, an eNB are provided for controlling DRX in a wireless communication system. A method includes receiving, from a master evolved Node B (MeNB), an indication that a Slave eNB (SeNB) is to be monitored; and monitoring the SeNB, in response to the indicator. The present disclosure relates to a pre-5th-Generation (5G) or 5G communication system to be provided for supporting higher data rates Beyond 4th-Generation (4G) communication system such as Long Term Evolution (LTE).
US09660772B2
A method for detecting and processing signals may include receiving a weak radio frequency (RF) signal by an array of antennas. The method may also include digitally sampling the weak RF signal from each antenna of the array of antennas and storing the digital samples of the weak RF signal from each antenna. The method may additionally include detecting a presence of the weak RF signal. Detecting the presence of the weak RF signal may include determining a correlation between the weak RF signal received by each of the antennas of the array of antennas using the digital samples of the weak RF signal from each antenna.
US09660763B2
Encoding of a plurality of encoded symbols is provided wherein an encoded symbol is generated from a combination of a first symbol generated from a first set of intermediate symbols and a second symbol generated from a second set of intermediate symbols, each set having at least one different coding parameter, wherein the intermediate symbols are generated based on the set of source symbols. A method of decoding data is also provided, wherein a set of intermediate symbols is decoded from a set of received encoded symbols, the intermediate symbols organized into a first and second sets of symbols for decoding, wherein intermediate symbols in the second set are permanently inactivated for the purpose of scheduling the decoding process to recover the intermediate symbols from the encoded symbols, wherein at least some of the source symbols are recovered from the decoded set of intermediate symbols.
US09660761B2
A method of monitoring the connection of a first end-user device to a network includes determining the amount of bandwidth present, tracking the amount of bandwidth in use by different classes of traffic, and tracking performance of the connection to detect when a threshold crossing has been reached. The method also includes transmitting a query to the first end-user device in response to the determined reaching of the threshold, the query requesting from a user of the first end-user device a communication action to perform based on the threshold being reached. The method further includes changing the communications session between the first end-user device and the network in accordance with the received communication action.
US09660757B2
The present invention is directed to a low latency fiber optic local area network with a network and a plurality of nodes connected through optical fibers. Each node has a plurality of bi-directional input/output interfaces. Each bi-directional input/output interface has a demultiplexer, at least one optical power coupler, a plurality of wavelength converters, and a plurality of internal optical waveguides. The internal optical waveguides extend from each wavelength converter and are for communication with the demultiplexer, the input fiber optic interface, and the optical fiber. Each optical power coupler has a fiber optic output interface for communication with other nodes, and each demultiplexer has a input fiber optic interface for communication with other nodes.
US09660749B2
A method for configuring a backhaul link subframe in a wireless communication system to which a carrier aggregation scheme is applied and an apparatus for the same are disclosed. The method comprises determining one of a plurality of subframe configurations as a first subframe configuration for a primary component carrier allocated to the relay node; configuring subframe configuration candidates for one or more secondary component carriers allocated to the relay node on the basis of the determined first subframe configuration; determining a second subframe configuration for each of the one or more secondary component carriers by using the configured subframe configuration candidates; and transmitting and receiving a signal to and from the relay node in accordance with the first subframe configuration and the second subframe configuration.
US09660747B2
A media signal broadcasting method, a media signal broadcasting system, a host device and a peripheral device are provided. The media signal broadcasting method is provided. The media signal broadcasting method includes the following steps. A host device and a peripheral device are provided. A first radio signal is received by the peripheral device. The first radio signal is converted to be a second radio signal by the peripheral device. The second radio signal is transmitted to the host device by the peripheral device. The second radio signal is received and is converted to be a media signal by the host device. A third radio signal is received and converted to be the media signal by the host device. The media signal converted from the third radio signal or the second radio signal is played by the host device.
US09660722B2
A system and method for performing an in-service optical time domain reflectometry test, an in-service insertion loss test, and an in-service optical frequency domain reflectometry test using a same wavelength as the network communications for point-to-point or point-to-multipoint optical fiber networks while maintaining continuity of network communications are disclosed.
US09660712B2
The method comprises: a step in which the base station transmits to a terminal configuration information related to the beam restricted sub-frame; and a step in which the base station transmits downlink data to the terminal via a sub-frame. The sub-frame includes the beam restricted sub-frame and a normal sub-frame, setting information includes information indicating a sub-frame set as the beam restricted sub-frame among multiple sub-frames, the beam restricted sub-frame is a sub-frame transmitted only based on a first beam subset, the normal sub-frame is a sub-frame transmitted based on the first beam subset and a second beam subset, the first beam subset is the set of beams generated based on a first precoding matrix set, and the second beam subset is the set of beams generated based on a second precoding matrix set including the first precoding matrix set.
US09660703B1
An electronic circuit for a portable battery-powered electronic device and a related system for wireless charging an electronic circuit for a portable battery-powered electronic device are disclosed. The electronic circuit is operable in a first mode as an actuator and in a second mode as a wireless charging receiver and comprises an electromechanical actuator, a capacitance, and a multi-mode switching circuitry. The electromechanical actuator comprises an inductor. The capacitance is selectively connectable to the inductor, at least in the second mode, to form therewith a resonant circuit for inductively receiving an electromagnetic wireless charging signal. The multi-mode switching circuitry comprises one or more switching devices for switching the electronic circuit between its different modes, wherein at least one of the switching devices is configurable as a rectifying device.
US09660701B2
A near-field coupling device that may facilitate communications with a transponder is provided. The near-field coupling device may include a ground plane, a dielectric substrate, one or more conductive strips and a terminating load. The conductive strips together with the ground planes form coupling elements. The near-field coupling device further includes one or more switching elements for selectively connecting and disconnecting the coupling elements with a transceiver. The connected coupling elements define a total characteristic impedance. Using the switching element, the ratio between the total characteristic impedance of the connected coupling elements and the terminating load may be changed in order to adjust the distribution of an electromagnetic field along the coupling elements according to the type and position of the transponder to be processed.
US09660700B2
A method, system and apparatus for automatically linking customizable and personalized information to a near field communication (NFC) tag comprises programming and/or encoding the NFC tag with a personalized message and then attaching the NFC tag body to an object such as a greeting card, event invitation, candle or gift basket. When the object is then received by the recipient, the recipient only needs to tap the NFC tag with a NFC enabled device in order to automatically access the personalized message. In some embodiments, the personalized message comprises a greeting, pictures, and/or other customizable digital content.
US09660699B2
A method for wireless power transmission includes obtaining, via a Q-value circuit, first and second voltages at respective first and second nodes of a resonance circuit. The first and second voltages are effective to determine if foreign matter is present in a space affecting wireless power transmission. The method includes controlling a switching section between the Q-value circuit and the resonance circuit such that at least a part of the electric power transmission process occurs at a different time than when the first and second voltages are obtained.
US09660694B2
Disclosed is a method performed by a radio unit (10) operable in a base station system of a wireless communication network, for reducing interference at the RU. The base station system comprises a baseband unit (30) the radio unit (10) and a plurality of radio heads (21-26) wherein the radio unit is connected to the plurality of radio heads via a number of metallic conductors (40), and wherein a signal is to be communicated to the radio unit at a first frequency range over one of the number of metallic conductors from one of the plurality of radio heads. The method comprises: detecting (206) if there is any near end crosstalk, NEXT, at a receiver of the RU, the receiver being connected to the one of the number of metallic conductors, and, when NEXT is detected, triggering (210) the one of the plurality of RHs to send the signal to be communicated over the one of the number of metallic conductors at a second frequency range different from the first frequency range where a lower NEXT is expected than at the first frequency range. Disclosed are also a corresponding radio unit and a computer program.
US09660691B2
Techniques for supporting data transmission and reception on multiple bands for carrier aggregation are disclosed. In an exemplary design, an apparatus (e.g., a wireless device) includes first and second antenna interface circuits coupled to first and second antennas, respectively. The first antenna interface circuit includes a first quadplexer for first and second bands. The second antenna interface circuit includes a second quadplexer for the first and second bands. The first quadplexer may be a duplicate of the second quadplexer, which may simplify implementation. Each antenna interface circuit may further include a diplexer, a duplexer, a triplexer, another quadplexer, switches, etc. The first and second quadplexers may support data transmission and reception on two bands in a first band group. Other circuits in the first and second antenna interface circuits may support data transmission and/or reception on additional bands, possibly in one or more other band groups.
US09660687B2
A front-end circuit for a wireless communication unit includes at least two antenna feeds. At least one of the antennas is coupled to an antenna switch. The circuit comprises filters and duplexers and is prepared to operate a number of FDD frequency bands. Each FDD band comprises an Rx band for receive signals and a Tx band for transmit signals. The circuit provides a single band operation mode for each frequency band and aggregated band operation modes. In an aggregated band operation mode Rx signals can be received in two different frequency bands at the same time as well as Tx signals can be transmitted in at least one of the two different frequency bands. In addition, TDD bands as well as GSM bands are covered.
US09660681B1
Light of at least two wavelengths is collimated in a forward path towards a reflector and light of at least one of the wavelengths is focused and detected in a return path, using in both paths a lens unit including a first convex surface and a second surface. A diffraction element diffracts the collimated light of the at least two wavelengths into different wavelength components. The reflector is moved so that one or more of the different wavelength components will be focused by the lens unit in the return path and detected. The second surface reflects the light of the at least two wavelengths from an input port towards the first convex surface and the first convex surface collimates the reflected light of the at least two wavelengths in the forward path, or the first convex surface focuses the one or more wavelength components towards the second surface that reflects the one or more wavelength components to an output port in the return path. The first convex surface can be replaced by a GRIN lens performing the focusing and collimating functions.
US09660675B2
Otherwise incompatible digital predistortion and uptilt can be used together, such as in a cable television or other cable communications system having a frequency-dependent signal loss at high frequencies. The predistortion can be used to compensate for a nonlinear gain compression of a power amplifier at higher frequencies. Additional uptilt and equalizer circuits can be included to address deleterious distortion effects that may otherwise arise by using predistortion and uptilt together. Training and adaptation of various components are described. Fine and coarse uptilt adjustments can be provided.
US09660670B1
A device includes circuitry configured to assess a broadband spectrum environment including signal and blocker characteristics via one or more receiver paths, determine operational parameters for the device based on the signal and blocker characteristics, and align one or more radio components from one or more radios for operation based on the operational parameters of the device.
US09660668B2
A local area network (LAN) backbone is implemented within an environment such as a self-contained environment (e.g., an automobile, an aircraft, a train, a ship, and/or any other environment). The LAN backbone is affected by AWGN, NBI, and/or impulse noise (noise). The LAN backbone supports communications based on an Ethernet communication protocol (e.g., a 1000Base-T1 based system that includes at least one single twisted pair). A device receives a first LDPC coded signal via the LAN backbone and decodes it to recover an input signal of a control system. The device also uses soft information generated during the decoding to compensate for the noise affecting the LAN backbone and then processes the input signal to generate a control signal for the control system. The device then and encodes the control signal to generate a second LDPC coded signal and transmits the second LDPC coded signal via the LAN backbone.
US09660666B1
Lossless content-aware compression and decompression techniques are provided for floating point data, such as seismic data. A minimum-length compression technique exploits an association between an exponent and a length of the significand, which corresponds to the position of the least significant bit of the significand. A reduced number of bits from the significand can then be stored. A prediction method is also optionally previously applied, so that residual values with shorter lengths are compressed instead of the original values. An alignment compression technique exploits repetition patterns in the floating point numbers when they are aligned to the same exponent. Floating point numbers are then split into integral and fractional parts. The fractional part is separately encoded using a dictionary-based compression method, while the integral part is compressed using a delta-encoding method. A prediction method is also optionally previously applied to the integral part, thereby increasing the compression ratio.
US09660659B2
A bias generator may include: an operational amplifier, a resister string, and a control circuit. The operational amplifier includes a first input terminal suitable for receiving a bandgap reference voltage, a second input terminal with an offset voltage and an output terminal. The resister string includes at least one resister coupled between a ground terminal and the output terminal of the operational amplifier, suitable for generating bias voltages. The control circuit is coupled between the second input terminal and the resister string, swaps the offset voltage, and selectively provides the offset voltage and the swapped offset voltage to the second input terminal of the operational amplifier.
US09660652B2
A driver includes first and second resistors coupled to a supply voltage and coupled to pairs of main transistors at positive and negative output nodes. The first and second pairs of main transistors provide emphasis and de-emphasis on the positive and negative output nodes. The driver also includes a delay inverter, a pull up booster and a pull down booster. The delay inverter delays and inverts each of a pair of differential input signals to provide delayed and inverted differential signals. The pull up booster provides a bypass current path that bypasses the first and second resistors but includes at least some of the first and second pairs of main transistors. The pull down booster provides an additional current path from the supply voltage through the first or second resistor to ground.
US09660646B1
A capacitive sensing device can include multiple capacitive sensors. A first device controller is operatively connected to a portion of the capacitive sensors, while a second device controller is operatively connected to another portion of capacitive sensors. A common node or shield can be connected between the first device controller and the second device controller. Charging and discharging events of selected drive lines in the capacitive sensing device and/or of the common node or shield can be synchronized to reduce undesirable effects such as noise and/or to prevent the charging events and the discharging events from overlapping with each other. One or more reference capacitive sensors can be shared by the multiple device controllers.
US09660644B2
A proximity switch assembly and method for detecting activation of a proximity switch assembly is provided. The assembly includes a plurality of proximity switches each having a proximity sensor providing a sense activation field and control circuitry processing the activation field of each proximity switch to sense activation. The control circuitry monitors the signal responsive to the activation field and determines a differential change in generated signal, and further generates an activation output when the differential signal exceeds a threshold. The control circuitry further distinguishes an activation from an exploration of the plurality of switches and may determine activation upon detection of a stable signal.
US09660640B2
A circuit includes an electronic component package that comprises at least a first lead, a III-N device in the electronic component package, a gate driver, and a ferrite bead. The III-N device comprises a drain, gate, and source, where the source is coupled to the first lead. The gate driver comprises a first terminal and a second terminal, where the first terminal is coupled to the first lead. The ferrite bead is coupled between the gate of the III-N transistor and the second terminal of the gate driver. When switching, the deleterious effects of the parasitic inductance of the circuit gate loop are mitigated by the ferrite bead.
US09660639B2
Power switching systems are disclosed comprising driver circuitry for enhancement-mode (E-Mode) GaN power transistors with low threshold voltage. Preferably, a GaN power switch (D3) comprises an E-Mode high electron mobility transistor (HEMT) with a monolithically integrated GaN driver. D3 is partitioned into sections. At least the pull-down and, optionally, the pull-up driver circuitry is similarly partitioned as a plurality of driver elements, each driving a respective section of D3. Each driver element is placed in proximity to a respective section of D3, reducing interconnect track length and loop inductance. In preferred embodiments, the layout of GaN transistor switch and the driver elements, dimensions and routing of the interconnect tracks are selected to further reduce loop inductance and optimize performance. Distributed driver circuitry integrated on-chip with one or more high power E-Mode GaN switches allows closer coupling of the driver circuitry and the GaN switches to reduce effects of parasitic inductances.
US09660631B2
A duty cycle detection circuit may include: a timing signal generation unit to generate a plurality of timing signal groups by selectively combining multi-phase clock signals according to an enable signal; and a detection unit to generate a duty detection signal by selectively combining signals of the plurality of timing signal groups according to the enable signal.
US09660621B1
An analog signal conditioning device and method employing a multi-path feedback mechanism to actively minimize the error of the overall desired signal conditioning transfer function to produce a corrected output signal, initially and over temperature, by exploiting characteristics of resistances manufactured simultaneously on a common thermally conductive substrate.
US09660612B2
Methods and apparatus, including computer program products, are provided for a tunable filter. In some example embodiments, there may be provided an apparatus. In some example embodiments, there is provided an apparatus. The apparatus may include a tunable radio frequency filter including a tunable phase shifter coupled to a resonator, wherein the tunable phase shifter tunes a center frequency of the tunable radio frequency filter by at least varying a phase of a radio frequency signal provided to the resonator. Related apparatus, systems, methods, and articles are also described.
US09660610B2
A crystal device has a crystal blank, a first excitation electrode part which is provided on an upper surface of the crystal blank, a first wiring part which extends from the first excitation electrode part to an edge part of the upper surface, a first lead-out terminal which is provided at the edge part of the upper surface of the crystal blank, a first mounting terminal which is provided at a position facing the first lead-out terminal, a first connection part which is provided so that one end is superimposed on the first lead-out terminal and the other end is superimposed on the first mounting terminal, a substrate having a mounting pad which is provided on its upper surface, a conductive adhesive which is provided between the mounting pad and the first mounting terminal, and a lid which is bonded to the upper surface of the substrate.
US09660609B2
Devices and method related to stacked duplexers. In some embodiments, an assembly may include a first wafer-level packaging (WLP) device having a radio-frequency (RF) shield. The assembly may also include a second WLP device having an RF shield, the second WLP device positioned over the first WLP device such that the RF shield of the second WLP device is electrically connected to the RF shield of the first WLP device.
US09660607B2
A solid state impedance tuner or impedance tuner system includes a control element array with a plurality of solid state control elements configured to be turned on simultaneously to achieve a desired impedance state. The control element array comprises N solid state control elements arranged along an RF transmission line. A controller selectively turns on or off each control element by application of a control signal to vary an impedance presented by the control element array, Another aspect is an impedance tuner module card configured in a standardized system architecture, with a chassis board, and at least one solid state tuner module integrated on the card A chassis electrical connector connected to the tuner module is configured for connection to a corresponding backplane connector. Methods for calibrating a solid state impedance tuner that includes at least two solid state tuner modules combined in one package are disclosed.
US09660598B2
Devices and methods for improving reliability of scalable periphery amplifiers is described. Amplifier segments of the scalable periphery architecture can be rotated to distribute wear. Further, extra amplifier segments can be implemented on amplifier dies to extend the overall lifetime of amplifiers.
US09660595B2
Disclosed herein is a linear amplifier using a nonlinear amplifying stage which includes a first amplifier and a second amplifier connected in cascade, including: a bias voltage generator in which a first bias voltage is applied to a gate terminal of the first amplifier, and a second bias voltage higher than the first bias voltage is applied to a gate terminal of the second amplifier, wherein the first amplifier and the second amplifier have a nonlinear gain characteristic in a region of arbitrary output power, and as the output power increases in the region of arbitrary output power, a gain of the first amplifier increases, while a gain of the second amplifier decreases.
US09660593B2
A system and method for linearizing a power amplifier using digital predistortion technique is provided including processing circuitry, the processing circuitry configured to apply a digital predistortion function based on a weighted static polynomial function, a weighted dynamic polynomial function and a threshold parameter which splits the nonlinear transfer characteristics of the device under test into a region where the static nonlinearity predominates and a region where the dynamic distortions predominate.
US09660588B1
A quaternary/ternary modulation selecting circuit of an audio amplifier includes a quaternary signal generating circuit, for receiving complementary analog input signals to generate complementary quaternary signals; and a ternary signal generating circuit for generating a ternary signal according to the complementary quaternary signals, wherein the ternary signal includes a positive ternary wave and a negative ternary wave; wherein when a difference in amplitude between the complementary analog input signals is within a predetermined range of zero amplitude, a signal pattern of the positive ternary wave generated from the ternary signal generating circuit is identical to a signal pattern of the negative ternary wave generated from the ternary signal generating circuit.
US09660582B2
A device including a spin channel to transport a spin current, a nano-oscillator, and a magnetoresistive device that receives the spin current from the nano-oscillator. The nano-oscillator includes a magnetization state that oscillates between a first state and a second state in response to an input voltage or current. The oscillation of the nano-oscillator may induce the spin current within the spin channel. The magnetoresistive device includes a magnetization state that is set based at least in part on the received spin current.
US09660578B2
An electronic device comprises a controllable capacitor bank and a capacitive divider arranged in parallel with the capacitor bank and configured to linearize the capacitor bank in a linearization frequency range of a frequency characteristic of the electronic device. The capacitive divider comprises a series arrangement of a first series capacitance, and a main capacitor bank. A control circuit coupled to one or more control inputs of the capacitive divider and controllable capacitor bank is configured to modify the equivalent capacitance of the capacitive divider and the controllable capacitor bank for providing capacitance steps, each capacitance step being variable over frequency such that for each step a frequency change Δf of the frequency characteristic is maintained constant in the linearization frequency range.
US09660572B2
An aluminum frame structure for packaging solar panel, comprising: a vertical support member; an U-shaped member, coupled to the vertical support member while allowing the opening of the U-shaped member to face toward a level direction; and at least one protruding member, disposed inside the U-shaped member, each having at least one protrusion arranged at the opening of the U-shaped member and at a position neighboring to the vertical support member while allowing the gap between the highest point of the at least one protrusion and an imaginary line representing the contact slope to be formed larger than the thickness of the back film, and also enabling the contact area of the at least one protrusion and the contact slope to be at least larger than 50% of the area of the contact slope.
US09660565B2
A controller in an electric power steering system controls motor that assists a steering operation of a steering wheel by a driver by generating an assist torque. The controller includes an instruction calculator calculating a base assist instruction value and at least one of correction instruction values, a distributor distributing the instruction values a plurality of winding wire groups, and calculating a torque instruction value for each of the plurality of winding wire groups. Thus, the base assist instruction value and the correction instruction values are appropriately distributed to each of the plurality of winding wire groups, for an appropriate distribution of the instruction values among the plurality of winding wire groups for generating the assist torque.
US09660557B2
An electrostatic chuck includes a pedestal part formed of metal and including a gas passage, an insulation substrate mounted on the pedestal part and including a first surface facing the pedestal part and a second surface on an opposite side of the first surface, the first surface including a first hole part communicating with the gas passage, the second surface including a second hole part having a bore diameter less than that of the first hole part and communicating with the first hole part, and an insulation flow part formed of an insulating material and including a first end provided in the first hole part and a second end provided in the gas passage. The insulation flow part is configured to allow a gas supplied from the gas passage to flow into the second hole part.
US09660552B2
An apparatus for controlling paralleled inverter is disclosed. In the apparatus for controlling paralleled inverter, one synchronization signal is shaped by at least two inverters to respectively transmit a voltage command and an operation command.
US09660545B2
A matrix converter includes: a power convertor that includes a plurality of bidirectional switches configured to control a conducting direction using a plurality of switching elements; a command generator configured to generate a control command for a PWM control on the plurality of switching elements; and a commutation controller configured to perform a commutation control on the plurality of bidirectional switches in a case where the control command changes. In a case where the control command changes during execution of the commutation control, the commutation controller executes a handover step for handover to a next commutation control and then executes the next commutation control from a step in a course of the next commutation control.
US09660541B2
A switching power supply device includes a switching control circuit that generates a switching control signal such that a desired output voltage is generated from an input voltage, a drive circuit that turns on/off an output transistor in accordance with the switching control signal, and an on-pulse stop circuit that generates a pulse stop signal such that the number of ON pulses of the switching control signal is reduced in a state where a load is heavier than a first threshold but is lighter than a second threshold.
US09660539B2
A switching power supply includes a power converter which includes a transformer and a switch, a current sensor, a switch controller and a compensation resistor. The current sensor is operable for generating a current monitoring signal indicating a current through a primary winding of the transformer. The switch controller is operable for receiving a feedback signal indicating an output voltage of the power converter, generating a driving signal based on the feedback signal to control an input power and an output power of the transformer, receiving a line voltage signal indicating an input voltage of the power converter, and generating a compensation current corresponding to a peak value of the line voltage signal. The compensation resistor is coupled between the current sensor and the switch controller. A voltage of the current monitoring signal is inversely proportional to the input voltage under control of the compensation current and the compensation resistor.
US09660534B2
Control circuit for multiphase switching converter to reduce overshoot and associated control method
A multiphase switching converter having a plurality of switching circuits and a control circuit, the plurality of switching circuits provide an output voltage, the control circuit provides a plurality of switching control signals to turn ON the plurality of switching circuits successively based on the output voltage and a reference signal, when the output voltage is detected overshooting, the control circuit turns OFF a current switching circuit, and when the output voltage is detected recovering from overshooting, the control circuit turns ON the current switching circuit again for a first time period until a sum of the first time period and a second time period achieves a predetermined value, wherein the second time period is a time period the current switching circuit maintains ON uninterruptedly before the output voltage is detected overshooting.
US09660532B2
A converter includes a plurality of active circuitry elements over a substrate. The converter further includes a passivation structure over the plurality of active circuitry elements, the passivation structure having at least one opening that is configured to expose at least one electrical pad of each active circuitry element. The converter further includes a plurality of passive electrical components over the passivation structure, wherein each passive electrical component is selectively connectable with at least one other passive electrical component, and a first side of each passive electrical component is electrically coupled to an electrical pad of each of at least two active circuitry elements. The converter further includes a plurality of electrical connection structures, wherein a first electrical connection structure electrically couples an electrical pad of a first active circuitry element to a corresponding passive electrical component, and the first electrical connection structure is completely within the passivation structure.
US09660525B2
A switching power supply in an integrated circuit, an integrated circuit comprising a switching power supply, and a method of assembling a switching power supply in an integrated circuit are disclosed. In one embodiment, the invention provides a three-dimensional switching power supply in an integrated circuit comprising a device layer. The switching power supply comprises three distinct strata arranged in series with the device layer, the three distinct strata including a switching layer including switching circuits, a capacitor layer including banks of capacitors, and an inductor layer including inductors. This switching power supply further comprises a multitude of connectors electrically and mechanically connecting together the device layer, the switching layer, the capacitor layer, and the inductor layer. The switching circuits, the capacitors and the inductors form a switching power supply for supplying power to the device layer.
US09660523B2
A system and method allows for controlling a resonant switched-mode converter to provide a variable conversion ratio. The system and method operates to control the switching devices such that the impedance of the switched-mode converter is set to a plurality of configurations for a plurality of time intervals. The system and method may further include off-time modulation techniques for varying or maintaining the overall switching period of the switched-mode converter.
US09660521B2
A power conversion circuit includes first to fourth switching elements connected in series between ground and high voltage electrical paths, a first reactor, a main battery, a second reactor, a sub battery, a high voltage sensor for detecting a high voltage VH between the ground and high voltage electrical paths, and a controller. Upon issuance of an instruction for turning off all of the first to fourth switching elements, the controller determines that the third switching element is experiencing an ON failure when the high voltage VH is equal to the sum of a battery voltage VB1 of the main battery and a battery voltage VB2 of the sub battery, to thereby allow electrical power to be transferred between the batteries and a load even in the event of occurrence of the ON failure in the switching element.
US09660520B2
A power converter circuit rectifies a line voltage and applies the rectified voltage to a stack of capacitors. Voltages on the capacitors are coupled to a plurality of regulating converters to be converted to regulated output signals. The regulated output signals are combined and converted to a desired DC output voltage of the power converter. Input currents of the regulating converters are modulated in a manner that enhances the power factor of the power converter.
US09660512B2
There is provided an electronic device comprising: a plurality of switching elements connected to a power supply; a plurality of specific information storage units provided for the corresponding switching elements and configured to store specific information of respective corresponding switching elements; a processing unit configured to control the switching elements; and a communication line disposed between the specific information storage units and the processing unit, through which the specific information of the respective switching elements is sent from the specific information storage units to the processing unit.
US09660511B2
A gate driver circuit capable of quickly driving a semiconductor device without erroneous ignitions. It has a positive power supply for forward bias, a negative power supply for backward bias, a first bias circuit that outputs the positive- or negative-power-supply voltage according to gate driver signal S, a capacitor that is charged by the negative-power-supply voltage when the first bias circuit outputs the negative-power-supply voltage, and a second bias circuit that supplies the gate of the semiconductor device with the positive- or negative-power-supply voltage according to gate driver signal S. Only in an early stage of a transition period during which the semiconductor device is turned on, the second bias circuit supplies the gate of the semiconductor device, instead of the positive-power-supply voltage, with a voltage boosted by adding the charged voltage of the capacitor onto the positive-power-supply voltage outputted from the first bias circuit.
US09660508B2
An object of the present invention is to provide a rotary electric machine for vehicle which can improve workability and efficiently secure an attachment space at low cost. In a rotary electric machine according to the present invention, a terminal 34 is attached on the outside of a rear bracket 21 so as to be overlapped and fitted to a voltage adjustment device 22 in an axial direction. Fitting portions 22j and 22k made of conductors are provided on the voltage adjustment device 22. Portions 34m and 34p to be fitted, which are made of conductors, are provided on the terminal 34. The voltage adjustment device 22 and the terminal 34 are integrally fixed to the rear bracket 21, with the fitting portions being fitted into the portions to be fitted.
US09660506B2
An electric motor includes a housing, a rotor, a stator, a storage tank, and a communication passage. The stator has a stator core provided coaxially with the rotor to surround the rotor. The storage tank is provided at a lower portion of the housing to store lubricating oil and divided by the stator core into a first storage tank and a second storage tank. The communication passage is provided to communicate the first storage tank with the second storage tank. The communication passage, as seen in an axial direction, extends above an oil level of the lubricating oil stored in the first storage tank and the second storage tank such that an air flows between an upper portion of the first storage tank and an upper portion of the second storage tank.
US09660502B2
A motor includes: a shaft to which a rotor is attached and having an internal cooling medium passage in an inside of the shaft, a cooling medium passing through the internal cooling medium passage; a housing including the shaft disposed therein and configured to rotatably support the shaft; and a cooling medium reservoir provided in the housing and provided on an upstream side of an inlet of the internal cooling medium passage in a flowing direction of the cooling medium, the cooling medium reservoir being configured to store the cooling medium and then flow the cooling medium to the internal cooling medium passage.
US09660498B2
The invention relates to a mount 2 in which is housed an electric motor 3 which has a shaft 10 extending along a longitudinal axis 13, said motor having a mass equilibrium line 22 transverse to the longitudinal axis 13 and passing through a center of gravity 40 of the electric motor, said mount 2 being connected to the motor 3 by a plurality of decoupling means 20 distributed around the periphery of the motor, characterized in that the longitudinal position D2 with respect to the mount 2 of at least one decoupling means 20 and a dimension D3 of this decoupling means 20 along the longitudinal axis 13 are determined with respect to the mass equilibrium line 22.
US09660497B2
A cordless portable pump device comprising a submersible pump, wiring means capable of conducting electrical current, a power supply comprising a rechargeable battery pack from a commercially available portable power tool having a voltage rating of at least fourteen volts, and a power receptacle suitably adapted to receive and retain the power supply.
US09660496B2
Provided is a canned motor to be coupled to a vacuum pump and used as a rotary driving source for the vacuum pump. The canned motor includes: a stator core; a rotor provided on an inner side of the stator core; and a non-conductive can provided between the stator core and the rotor. The non-conductive can is configured to separate the stator core and the rotor from each other. The non-conductive can is made of resin, ceramic, or composite material thereof. The non-conductive can is bonded to the stator core with an adhesive.
US09660481B2
A wireless charger assembly is used for transferring power to an electronic device through inductive charging. The wireless charger assembly includes a bottom case releasably mounted to an exterior flatbed, a transmitter coil, and a top case. The transmitter coil transmits power to a receiver coil of the electronic device through inductive charging. The top case has a working platform mounted around the working surface of the flatbed, a neck portion extending downwardly from the working platform, and a slot defined by the working platform and the neck portion. The neck portion releasably retained to the closed loop wall.
US09660476B2
A circuit assembly for discharging an electrical energy store includes a first discharge current path for uncontrolled, passive discharging of the energy store and for keeping a defined charge voltage of the energy store, and a second discharge current path for controlled, active discharging of the energy store. A semiconductor switch electrically connects to a positive current connection of the energy store and to a negative current connection of the energy store. A voltage limiter includes a first current connection for electrically connecting to the positive current connection of the energy store and a second current connection for electrically connecting to the negative current connection of the energy store. The circuit assembly further includes a first control path for providing a first control signal from the first current connection of the voltage limiter to the control connection of the semiconductor switch in order to control the semiconductor switch.
US09660469B2
A multi-battery charging circuit is described and it includes an electric power detecting unit for detecting remaining amount of electric power of each battery; a charging deciding unit provided with a first amount of electric power threshold and for comparing the remaining amount detected with the first threshold; and a charging unit for charging a plurality of batteries with a first strategy in a first time period, and with a second strategy in a second time period when the remaining amount of electric power of one or more of the batteries is equal to a second amount of electric power threshold, and with a third strategy in a third time period when the remaining amount is equal to a third amount of electric power threshold.
US09660468B2
According to an embodiment of the present invention, a recharging device includes a recharging port that receives a flameless candle and recharges a battery in the candle. The recharging device includes a first stacking structure that has a top portion and a bottom portion. There is a top stacking contact on the top portion. An electrical power bus is connected with the top stacking contact. The electrical power bus is also configured to provide electrical power to the flameless candle through the recharging port. The top portion of the first stacking structure is configured to mate with a bottom portion of a first stacking structure of another recharging device.
US09660457B2
In a feed line switching apparatus, a situation in which the feed line switching apparatus cannot work when feed lines have a predetermined connection relationship is prevented. The feed line switching apparatus includes a command acquisition unit which acquires a feed line switching command which designates a connection relationship of feed lines, a switching execution unit which switches the connection relationship of the feed lines in accordance with the feed line switching command acquired by the command acquisition unit, and a switching control unit which suppresses switching of the connection relationship of the feed lines in the switching execution unit for a predetermined feed line switching command.
US09660455B2
A system and method for running a plurality of gensets in parallel in a micro-grid system is disclosed. The system and method may include at least one genset configured to run at a load factor of greater than sixty percent, the number of the at least one genset supplying power at any given time including a minimum or less than minimum number of gensets capable of meeting a demand imposed by a load. The system and method may also include a turbo compounding system associated with at least one of the at least one genset, each of the electric turbo compounding systems configured to increase fuel efficiency of the at least one genset.
US09660453B2
A method of controlling a microgrid including at least one distributed generator (DG) and arranged for being connected to a power grid, by means of a converter via which the DG is connected in said microgrid. The method includes running the converter in a current control mode for controlling at least one current output of the DG in the microgrid; obtaining an indication that the converter should change from the current control mode towards a voltage control mode for controlling a voltage output of the DG in the microgrid; and entering the converter in an interstate mode, in response to the obtained indication, in which interstate mode the converter is configured for controlling both the current output and the voltage output.
US09660450B2
The present invention relates to a monitoring and controlling system and method for megawatt level battery energy storage power plant, which includes: a central monitoring and controlling module is used to determine the power command value of each energy storage substation of the battery energy storage power plant, and send it to all the local monitoring and controlling modules; the local monitoring and controlling modules is used to calculate the power command value of each energy storage unit of the energy storage substations controlled by it, and sending it to each energy storage unit, and upload to the central monitoring and controlling module to store. Between the central monitoring and controlling module and the local monitoring and controlling modules, the data transmission and communication are carried out through communication networks; the communication networks adopt real time and non real time communication parallel network structure.
US09660448B2
A method of configuring a renewable energy curtailment and control system uses a master controller and a plurality of controllers configured to control a cluster of renewable energy resources to deliver predetermined amounts of actual power and reactive power to a point of interconnect with a grid in accordance with contractual requirements with users of electrical power while reducing reactive power flow between renewable resources in the cluster.
US09660442B2
A frequency regulation method for a grid which is performed by a control device that connects, through a communication network, a controller for controlling at least one load device and a storage battery. The frequency regulation method including: obtaining, when it is detected that a frequency of a grid deviates from a predetermined range, an instruction signal including a power instruction value for keeping the frequency of the grid within the predetermined range; and generating a control signal for controlling the load device when the load device is operable in accordance with the instruction signal, and transmitting the control signal to the controller, and generating a control signal for charging or discharging the storage battery when the load device is not operable in accordance with the instruction signal, and transmitting the control signal to the storage battery.
US09660441B2
Electrical protection devices, such as for use with power systems for overvoltage protection, are disclosed. One electrical protection device includes a first electrical connection, a second electrical connection, a first electrical discharge device, and a second electrical discharge device. The first electrical discharge device includes a first conductive bus connected to the first electrical connection and a second conductive bus connected to the second electrical connection. The first electrical discharge device has a first breakdown voltage. The second electrical discharge device includes a third conductive bus connected to the first electrical connection and a fourth conductive bus connected to the second electrical connection. The second electrical discharge device has a second breakdown voltage.
US09660436B2
Systems and methods for detection of interconnected outputs of a power supply are provided. A first channel of a power supply is activated, such that power is supplied to a first load connected to the first channel. A first load voltage is measured for the first load. A second load voltage is measured for a second load connected to a second channel of the power supply. The second load voltage is compared to the first load voltage to generate an interconnection result. The power supply is shut down when the interconnection result indicates that the second load voltage matches the first load voltage, such that all channels of the power supply do not supply power to any load connected thereto.
US09660429B2
A electrical wire protection tube and a wire harness that can prevent breakage of a wire arranged in the handle swing portion of a two-wheeled vehicle. The electrical wire protection tube includes a tube main body portion made up of ring-shaped ribs and small-diameter short tube portions that are a resin molded body and are alternatingly arranged in a single line so as to form one passageway for an electrical wire. Each ring-shaped ribs has a maximum-diameter ridgeline portion and first and second truncated cone surface portions that are respectively located on different sides of the ridgeline portion and are inclined toward the small-diameter short tube portions. When the tube main body portion is bent into a U shape, the small-diameter short tube portions stretch on one side such that the first and second truncated cone surface portions of adjacent ring-shaped ribs come into close contact on the opposite side.
US09660427B1
A power transfer unit is disclosed. In a first implementation of the disclosed power transfer unit, a tubular assembly of the power transfer unit includes an encapsulated elbow hinge design with a reduced profile that permits substantially off-center installation of the housings of the power transfer unit. In a second implementation of the disclosed power transfer unit, the tubular assembly includes an inverted, telescoping tubing design that does not come apart during installation and use, and in some implementations may act as a stop for a closable member.
US09660424B2
A spark plug 1 has a center electrode 4 and a ground electrode 5 opposed to each other and causes a spark discharge to occur through application of a voltage between the center electrode 4 and the ground electrode 5 . Moreover, the center electrode 4 has a columnar main chip 10 provided at a distal end thereof by welding via a fusion portion 12 and an annular auxiliary chip 11 surrounding the fusion portion 12. Consequently, when a spark discharge occurring from the center electrode 4 is blown to the downstream side by the influence of a gas flow in a cylinder of an internal combustion engine, it is possible to suppress a cathode point from being formed in the fusion portion 12 since the fusion portion 12 is surrounded and thus protected by the auxiliary chip 11. As a result, it is possible to suppress wear of the center electrode 4, thereby extending the service life of the spark plug 1.
US09660420B2
A laser diode with an improved kink level in the L-I characteristic and capable of obtaining a stable high output in a horizontal transverse mode is provided. The laser diode includes an active layer made of nitride III-V compound semiconductor containing at least gallium (Ga) in 3B-group elements and at least nitrogen (N) in 5B-group elements, an n-type compound semiconductor layer provided on one of faces of the active layer, and a p-type compound semiconductor layer provided on the other face of the active layer. A region closest to the active layer, in the n-type compound semiconductor layer is a high-concentration region whose impurity concentration is higher than that of the other n-type regions.
US09660406B2
A wire connector having a collar surrounding a set of wire ports in a wire connector with the collar providing a collective shield between an environment external to the collar the collar but not between the set of wires within the collar.
US09660392B2
The invention relates to an electrical plug (24) having a connection unit (36) which can be coupled to an electrical line (26) in order to transmit electrical energy, having at least one electrical contact pin (30) which has a plug section (32) and a coupling section (34), wherein the coupling section (34) is electrically coupled to the connection unit (36), and wherein the plug section (32) is designed to provide a releasable plug connection to an associated contact socket (18) in order to electrically couple the contact pin (30) to the contact socket (18), and having a detection unit (38) which is designed to) detect a tensile force which is exerted on the contact pin (30) and/or a movement of the contact pin (30) relative to the contact socket (18), and to provide a disconnection signal for interrupting the energy transmission process.
US09660388B2
A connector module includes a housing that extends along a longitudinal axis between a mating end and a cable end. The housing is defined by a first shell and a second shell that mate at a seam and define an interior chamber therebetween. The first shell and the second shell each includes a cable exit segment that has at least one cable positioning feature extending from an inner surface of the respective cable exit segment. Each cable positioning feature includes at least two posts and a slot defined therebetween. The slots of the cable positioning features are configured to receive a cable between the at least two posts of each corresponding cable positioning feature. The cable extends from the cable end of the housing.
US09660386B2
There is provided a communication connector including a housing and a plurality of electrical contacts received by the housing. A printed circuit board (PCB) is provided and includes first and second pairs of electrically conductive signal traces on different layers of the PCB, each pair of the first and second pairs of traces being connected to a corresponding pair of the plurality of pairs of contacts; and at least one split ground plane including first and second sections being substantially electrically isolated from one another, wherein at least a portion of the first section is adjacent to at least a portion of the first pair of traces and at least a portion of the second section is adjacent to at least a portion of the second pair of traces.
US09660385B2
Electrical connector including a plurality of mating conductors. Each of the mating conductors extends between an engagement portion and an interior portion. The engagement portions of the mating conductors are configured to engage contacts of the mating connector. The engagement portions are located proximate to one another at a first nodal region. The interior portions are located proximate to one another at a second nodal region. The electrical connector also includes a first open-ended conductor electrically connected to the engagement portion of a first mating conductor of the plurality of mating conductors and extending from the first nodal region. The electrical connector also includes a second open-ended conductor electrically connected to the interior portion of a second mating conductor of the plurality of mating conductors and extending from the second nodal region. The first open-ended conductor is capacitively coupled to the second open-ended conductor.
US09660379B1
An exemplary vehicle connector assembly includes, among other things, a first housing, and a second housing configured to selectively engage the first housing in a first position to accommodate a first take-out location. The first housing is further configured to engage the second housing in a second position to accommodate a second take-out location different than the first take-out location. An exemplary electrical connection method includes, among other things, securing a first housing of a connector to a second housing in a first position to accommodate a first take-out location. The first housing is securable to the second housing in a second position to accommodate a second take-out location instead of the first take-out location. The first position circumferentially offset from the second position.
US09660377B2
A magnetic electrical connector is provided which has particular application to use in vehicles or aircraft to prevent damage due to passenger movement. The connector includes a socket having a housing with a front face, a plurality of conductor contact regions provided on the front face, and a magnet provided in the housing to physically retain a plug in connection with the socket in use.
US09660369B2
An assembly of cable and connector includes a flat flexible cable, an input-output connector and a paddle card. The flat flexible cable has parallel conductor wires, an insulated layer wrapped around the conductor wires. The conductor wires have at least one first integrated power wire and signal wires. A width of the first integrated power wire is larger than two times the width of one signal wire. The input-output connector has terminals separated into an upper-side terminal and a lower-side terminal. A number of the terminals is larger than a number of the conductor wires. The paddle card has a base board, and transferring circuits distributed on the base board. The transferring circuits has first pads on one side of the base board which are correspondingly connected to the conductor wires, and second pads on the other side of the base board which are correspondingly connected to the terminals.
US09660365B2
A printed circuit board includes at least two rigid printed circuit board parts which are connected to one another by at least one flexible connecting part which is thinner than the rigid printed circuit board parts. The at least two rigid printed circuit board parts can be moved toward one another by bending the flexible connecting part. A groove, which is produced by the different thickness of the rigid printed circuit board parts relative to the flexible connecting part, is filled with an elastic material.
US09660362B2
A device connects an electrical conductor to an area for electrical connection of an electrical switching device, the switching device having an electrical switching module connected to the area for electrical connection. The connecting device has at least one primary unit for electrically connecting a primary conductor to the area for connection, and an insulating shell receiving each primary connecting unit. The connecting device additionally has at least one secondary unit for connecting a secondary electrical conductor, and, for each secondary unit, an electrically conductive link piece connected between the secondary unit and a respective primary unit.
US09660358B2
A contact element for an electrical plug connecting device, having a molded first end section and a molded elongated receiving section which defines a longitudinal axis for mechanical and electrical coupling and/or receiving a mating contact element designed to be complementary to the contact element of a plug connecting device to be paired with the electrical plug connecting device, both of which are manufactured of an electrically conductive material. The elongated receiving section extends essentially cylindrically from the first end section. This end section as well as the elongated cylindrical receiving section are molded to be free of seams and butt joints by shaping the electrically conducting material by means of a force acting at least predominantly parallel to the longitudinal axis, and at least the receiving section molded by shaping the electrically conducting material forms a cylindrical interior sheathed by the molded electrically conducting material along the longitudinal axis.
US09660357B1
An electrical connector with an internal crimping mechanism. The electrical connector has a connector shell with one or more electrical connecting pins contained therein. One or more crimping screws are threaded through a hole in a wall of the connector shell. One or more crimping springs, with a first side and a second opposite side, are within the connector shell adjacent to the hole in the wall of the connector shell. There is a hole in the first side of the crimping spring through which the crimping screw passes to engage the second opposite side of the crimping spring. The crimping screw and the crimping spring are constructed to reversibly crimp an electrical wire between the second opposite side of the crimping spring and an internal wall of the connecting pin when said crimping screw is screwed into said electrical connector.
US09660355B2
A connection structure of an external conductor terminal for connection with an external conductor of an electric cable including the external conductor made up of twined cables enclosing an outer periphery of an insulating coating of one or more internal conductors and a protective coating covering the external conductor, wherein the external conductor terminal has a cylindrical connector portion connected to the external conductor and a terminal portion provided at one end of the connector portion; and the connector portion is fitted around a location on an outer periphery of the insulating coating where the external conductor is laid bare, the twined cables of the external conductor are provided in contact with an outer periphery of the connector portion, a ring member is fitted around outer peripheries of the twined cables and the twined cables are crimped.
US09660353B2
A small-sized elastic inner conductor right-angled elbow conductor connector includes: a first conductor capable of deforming elastically, the first conductor having a first axis, the first conductor deforms elastically and springs back in a longitudinal direction perpendicular to the first axis under the action of a second conductor, thereby elastically contacting the second conductor arranged perpendicular to the first axis and retaining the second conductor, when the second conductor is connected with the first conductor, such that the first conductor and the second conductor are able to be connected to each other at a right angle.
US09660351B2
A multi-faceted deployable antenna frame including a six-bar linkage structure in a lateral facet of the antenna frame, the six-bar linkage structure being convertible from a folded state into a deployed state and having two first bars and four second bars, each bar being coupled to two others by a hinge to form a closed loop, where in the deployed state, the six-bar linkage structure has a quadrilateral shape. The antenna frame also includes a deployment means for deploying the antenna frame by moving the six-bar linkage structures from the folded state into the deployed state, the deployment means including: a flexible, elongated member of a substantially inextensible material; a first guiding means provided at an end portion of one of the first bars and coupled to the elongated member; a storage means provided at the first bar that includes the first guiding means for storing a part of the elongated member; a driving means that is coupled to the elongated member to pull the elongated member to the storing means when deploying the antenna frame; and a second guiding means between two adjacent second bars, the elongated member being coupled to the second guiding means. A first end of the elongated member is attached to the storing means and a second end of the elongated member is coupled to another first bar, and wherein the elongated member is extending between said first end and said second end along a plurality of second bars.
US09660347B2
The disclosure is related to a printed coupled-fed multi-band antenna, and a related electronic system. The antenna includes a first antenna member structurally with a mushroom-shaped radiation portion and an antenna connection portion being electrically connected with a ground plane. The mushroom-shaped radiation portion is employed to activate first band electromagnetic wave. The antenna includes a second antenna member, which may be shaped as a U-shaped radiation portion. The second antenna member is floating within a region surrounded by the mushroom-shaped radiation portion, the antenna connection portion and the ground plane. The U-shaped radiation portion is coupled with both the ground plane and the mushroom-shaped radiation portion. The coupling effect allows the second antenna member to activate a second band electromagnetic wave. The multiple band signaling paths are formed over the printed antenna for application of a multi-band antenna.
US09660335B2
An antenna system includes a monopole antenna with a first end connected to a feed point on a printed circuit board (PCB) and a second end being electrically floating; and a matching conductive stub with a first end connected to a ground point on the PCB and a second end being electrically floating.
US09660333B2
A radiator includes an aperture plate defining multiple slots in first and second transverse directions, spring probes disposed within each of the multiple slots, printed circuit boards (PCBs) each having major and minor surfaces and being recessed on either side of multiple portions of one of the minor surfaces to define multiple pads plated with conductive pad material electrically interconnected with a PCB circuit and a grounding element. Each of the PCBs is disposed with the corresponding one of the minor surfaces inserted into a slot such that the PCBs form a crisscrossing pattern and the pads form horizontal blind-mate contacts with the spring probes that are in-plane with corresponding PCB planes. The grounding element is interposed between crisscrossing PCB pairs at complementary notches thereof.
US09660321B2
An app running on a communication device determines a current position of an antenna, which is to be aligned with a transmitter. The app determines a direction in which the antenna should be oriented so that the antenna is aligned with the transmitter when the communication device is placed by the antenna. The app may generate, based on the determined direction, one or more cues to enable alignment of the antenna so that the current position or a newly determined current position of the antenna is aligned with the determined position of the transmitter. The cues may include audible, visual and/or vibration cues. The app may acquire information from one or more sensors, which are located within the communication device and/or integrated within the antenna. The acquired information may be utilized to determine the current position and/or a newly determined current position of the antenna.
US09660320B2
A reflector dish assembly including a support structure, a reflector dish, and a reflector bracket configured for mounting the reflector dish. A support arm supports an electronic device and an elbow bracket is configured for coupling with an end of the support arm. A seat section of the elbow bracket is configured for engaging with the reflector bracket for securing the support arm in relation to the reflector dish. The reflector bracket includes a seat to receive the elbow bracket seat section, with the seat having bosses and support tabs spaced linearly from the bosses. The elbow bracket seat section includes guide slots configured for sliding over the bosses when the seat receives the seat section. The elbow bracket seat section includes support slots for receiving the support tabs of the reflector bracket seat and securing the guide slots with the bosses.
US09660317B2
A flexible high-frequency signal transmission line includes a dielectric body including laminated flexible dielectric layers. A signal line is provided in the dielectric body. A grounding conductor is arranged in the dielectric body to be opposed to the signal line via one of the dielectric layers. The grounding conductor is of a ladder structure including a plurality of openings and a plurality of bridges arranged alternately along the signal line. A characteristic impedance of the signal line changes between two adjacent ones of the plurality of bridges such that the characteristic impedance of the signal line rises from a minimum value to an intermediate value and to a maximum value and falls from the maximum value to the intermediate value and to the minimum value in this order.
US09660313B2
This invention is directed to a metal-air electrochemical power sources, specifically zinc-air batteries and fuel cells, and methods for removing solid or semi-solid spent fuel using a thickener-liquefier pair.
US09660301B2
An electronic apparatus is provided. The electronic apparatus includes: a battery; at least one pressure sensor provided on a surface of the battery; and a controller electrically connected with the at least one pressure sensor. The at least one pressure sensor samples a pressure parameter on the surface of the battery. The controller acquires the pressure parameter, detects a magnitude relation between the pressure parameter and a predefined threshold value, and generates a control instruction for protecting the battery based on the detected magnitude relation.
US09660297B2
Provided are methods of preparing a separator/anode assembly for use in an electric current producing cell, wherein the assembly comprises an anode current collector layer interposed between a first anode layer and a second anode layer and a porous separator layer on the side of the first anode layer opposite to the anode current collector layer, wherein the first anode layer is coated directly on the separator layer.
US09660291B2
A positive active material for a lithium secondary battery, a method of preparing the same, and a lithium secondary battery including the positive active material. The positive active material includes a core part and a shell part that include a nickel-based composite oxide, and a content of nickel in the core part is larger than that in the shell part.
US09660285B2
Disclosed are: a fuel cell which is provided with a membrane electrode assembly (50), an anode-side gas diffusion layer (52) and a cathode-side gas diffusion layer (54); and a method for manufacturing the cell. The degree of processing for suppressing protrusion of carbon fibers in the anode-side gas diffusion layer (52) and the degree of processing for suppressing protrusion of carbon fibers in the cathode-side gas diffusion layer (54) are set to be different from each other. Specifically, protrusion from the anode-side gas diffusion layer (52) is sufficiently suppressed, thereby being prevented from damaging the membrane electrode assembly (50). Meanwhile, the degree of suppression processing of the cathode-side gas diffusion layer (54) is set low, thereby securing drainage of generated water.
US09660279B2
Disclosed are a fuel unit for a hydrogen generator and methods for producing the fuel unit and the hydrogen generator. A fuel sheet (50) is made by disposing a plurality of fuel pellets (50A-50J) containing a hydrogen-containing material on a substrate (52), and one or more fuel sheets are formed into a non-cylindrical fuel sheet assembly my moving (e.g., bending) a portion of the fuel sheet (50) to position pellets adjacent to each other such that adjacent sides of the adjacent pellets lie in essentially parallel planes. A non-cylindrical fuel unit is produced from one or more of the fuel sheet assemblies. Fuel units can be replaceably disposed in a hydrogen generator, and fuel pellets can be selectively heated to produce hydrogen gas as needed.
US09660266B2
Disclosed is a lithium secondary battery including (i) a cathode active material including a lithium metal phosphate according to Formula 1 below, (ii) an anode active material including amorphous carbon, and (iii) an electrolyte for lithium secondary batteries including a lithium salt and an ether-based solvent, Li1+aM(PO4-b)Xb (1) wherein M is at least one selected from the group consisting of Group II to XII metals, X is at least one selected from F, S, and N, −0.5≦a≦+0.5, and 0≦b≦0.1.
US09660265B2
Lithium sulfur battery cells that use water as an electrolyte solvent provide significant cost reductions. Electrolytes for the battery cells may include water solvent for maintaining electroactive sulfur species in solution during cell discharge and a sufficient amount of a cycle life-enhancing compound that facilitates charging at the cathode. The combination of these two components enhances one or more of the following cell attributes: energy density, power density and cycle life. For instance, in applications where cost per Watt-Hour (Wh) is paramount, such as grid storage and traction applications, the use of an aqueous electrolyte in combination with inexpensive sulfur as the cathode active material can be a key enabler for the utility and automotive industries, for example, providing a cost effective and compact solution for load leveling, electric vehicles and renewable energy storage. Sulfur cathodes, and methods of fabricating lithium sulfur cells, in particular for loading lithium sulfide into the cathode structures, provide further advantages.
US09660262B2
A positive electrode for a nonaqueous electrolyte secondary battery according to the present invention includes particles A of a lamellar type lithium transition metal oxide and particles B of a spinel type lithium transition metal oxide, as a positive active material, at a ratio within the range of A:B=20:80 to 80:20 (weight ratio), in which a particle size distribution of the positive active material has a peak based on the particles A and a peak based on the particles B within the range of 1 to 50 μm. In the integrated distribution curve of the particle diameter, a particle diameter A(D50) at a degree of accumulation of the particles A of 50% and a particle diameter B(D50) at a degree of accumulation of the particles B of 50% satisfy the following expression (1), and a particle diameter A(D95) at a degree of accumulation of the particles A of 95% and a particle diameter B(D5) at a degree of accumulation of the particles B of 5% satisfy the following expression (2): B(D50)−A(D50)≧5 μm Expression (1) B(D5)>A(D95) Expression (2).
US09660260B2
Provided are a cathode active material coated with a fluorine-doped spinel-structured lithium metal manganese oxide, a lithium secondary battery including the same, and a method for preparing the same. The cathode active material has improved chemical stability and provides improved charge/discharge characteristics at elevated temperature (55-60° C.) and high rate. The cathode active material allows lithium ions to pass through the coating layer with ease and is chemically stable, and thus may be used effectively as a cathode active material for a high-power lithium secondary battery.
US09660259B2
A mixed positive electrode active material comprising a lithium manganese oxide represented by following [Chemical Formula 1] and a second positive electrode active material represented by following [Chemical Formula 2], and a lithium secondary battery comprising the same are disclosed. aLi2MnO3.(1−a)LixMO2 [Chemical Formula 1] In [Chemical Formula 1], 0
US09660257B2
A storage element for a solid-electrolyte battery is provided, having a main body which is composed of a porous matrix of sintered ceramic particles, and also having a redox system which is composed of a first metal and/or at least one oxide of the first metal, wherein a basic composition of the storage element comprises at least one further oxide from the group comprising Y2O3, MgO, Gd2O3, WO3, ZnO, MnO which is suitable for forming an oxidic mixed phase with the first metal and/or the at least one oxide of the first metal.
US09660252B2
The invention relates to a process for fabrication of an electrode film in an all-solid-state battery comprising successive steps to: a) Procure a substrate, preferably a conducting substrate, b) Deposit an electrode film on said substrate by electrophoresis, from a suspension containing particles of electrode materials, c) Dry the film obtained in the previous step, d) Thermal consolidation of the electrode film obtained in the previous step by sintering, sintering being done at a temperature TR that preferably does not exceed 0.7 times the melting temperature (expressed in ° C.), even more preferably does not exceed 0.5 times the melting temperature (expressed in ° C.), and much more preferably does not exceed 0.3 times the melting temperature (expressed in ° C.) of the electrode material that melts at the lowest temperature.
US09660244B2
A battery module includes a housing and battery cells disposed in the housing, each of the battery cells including two terminals. The battery module also includes bus bar cell interconnects including a first material, where each bus bar cell interconnect is configured to electrically couple two adjacent battery cells via an electrical coupling with a first terminal of one of the adjacent battery cells and a second terminal of the other adjacent battery cell, where at least one of the first and second terminals includes the first material. The battery module includes welds, each weld being disposed at a corresponding welding point to directly couple one of the bus bar cell interconnects with the corresponding at least one terminal including the first material. Each welding point is accessible for welding from a position above the battery cells when the interconnects are disposed over the battery cells.
US09660241B2
A method is provided for forming a sodium-containing particle electrolyte structure. The method provides sodium-containing particles (e.g., NASICON), dispersed in a liquid phase polymer, to form a polymer film with sodium-containing particles distributed in the polymer film. The liquid phase polymer is a result of dissolving the polymer in a solvent or melting the polymer in an extrusion process. In one aspect, the method forms a plurality of polymer film layers, where each polymer film layer includes sodium-containing particles. For example, the plurality of polymer film layers may form a stack having a top layer and a bottom layer, where with percentage of sodium-containing particles in the polymer film layers increasing from the bottom layer to the top layer. In another aspect, the sodium-containing particles are coated with a dopant. A sodium-containing particle electrolyte structure and a battery made using the sodium-containing particle electrolyte structure are also presented.
US09660232B2
A button cell terminal to electrically connect to a button cell and a circuit board includes: a spring contact terminal; a board joint; and a pressing force absorbing spring portion. The spring contact terminal is arranged into a spring shape deforming elastically in response to pressing force from the button cell in the X-axis direction and the Z-axis direction. The board joint is joined to the circuit board. The pressing force absorbing spring portion includes a bent arm for absorbing pressing force from the button cell through elastic deformation in response to pressing force from the button cell in the X-axis direction and the Y-axis direction.
US09660231B2
There is provided a battery pack capable of improving the safety thereof. The battery pack includes a battery array, side plates, a top cover and end plates. The battery array includes a plurality of battery cells aligned in a first direction. The battery array is formed as a hexahedron having (1-1)th, (1-2)th, (2-1)th (2-2)th, (3-1)th and (3-2)th planes. The top cover is provided to the (1-1)th plane of the battery array, and has reinforcing frames respectively formed at both sides based on the first direction. The reinforcing frame includes vertical and horizontal frames. The end plates are provided to the (3-1)th and (3-2)th planes, respectively. The end plates are fixed to the top cover. A holding part pressing both sides of the top cover on the (1-1)th plane are provided to the side plates, respectively.
US09660230B2
Provided is a battery pack including a pair of end plates facing each other, a plurality of battery cells arrayed between the end plates, and a pair of side plates each extending along a length of the plurality of battery cells, and coupled to the end plates, wherein each of the end plates includes a base plate, bending portions bent from each edge of the base plate in a direction away from the plurality of battery cells, each bending portion having a reinforcing bead unit, and a flange portion connected to the base plate at each bending portion. According to one or more embodiments of the present invention, deformation of the battery pack may be efficiently suppressed and deterioration of a function of a battery cell may be prevented by blocking volume expansion due to recharging and discharging operations of the battery cell.
US09660229B2
Battery packs include a battery pack housing, at least one battery release member held by the battery housing, a (blind) latch held by the battery pack housing in communication with the battery release member that releaseably locks the battery pack to a device, and a tactile feedback mechanism that is held by the battery pack housing and is in communication with the battery release member. The tactile feedback mechanism generates a tactile feedback that reduces or increases an application force required by a user to manually actuate the at least one release member. The tactile feedback transmitted through the at least one battery release member. The tactile feedback is generated when the at least one release member has been manually actuated by the user a sufficient distance to allow the user to easily remove the battery pack from the device.
US09660225B2
Provided is a secondary battery suitable for a portable information terminal or a wearable device, or an electronic device having a novel structure with a variety of forms and a secondary battery that fits the form of the electronic device. The secondary battery is sealed using a film having projections that can reduce stress on the film caused when external force is applied. The film has a pattern of projections formed by pressing (e.g., embossing). A top portion of each of the projections has a region thicker than a bottom portion of each of the projections. The thickness of the top portion of each of the projections is 1.5 or more times, preferably 2 or more times, as large as that of the bottom portion of each of the projections, and is a thickness such that each of the projections has a convex space.
US09660221B2
Display devices using feedback-enhanced light emitting diodes are disclosed. The display devices include but are not limited to active and passive matrix displays and projection displays. A light emissive element disposed between feedback elements is used as light emitting element in the display devices. The light emissive element may include organic or non-organic material. The feedback elements coupled to an emissive element allow the emissive element to emit collimated light by stimulated emission. In one aspect, feedback elements that provide this function include, but are not limited to, holographic reflectors with refractive index variations that are continuous.
US09660218B2
In one embodiment, a package of an environmental sensitive element including a flexible substrate, an environmental sensitive element and an encapsulation is provided. The environmental sensitive element is disposed on the flexible substrate. The encapsulation covers the environmental sensitive element, wherein the Young's mudulus of the encapsulation ranges from about 5 GPa to about 15 GPa, hardness of the encapsulation ranges from about 0.4 GPa to about 1.0 GPa, and water vapor transmittance rate (WVTR) of the encapsulation is less than 10−2 g/cm2 day.
US09660215B2
Embodiments of the present invention disclose a display panel and an encapsulation method thereof, and relate to the field of display technology. The display panel comprises a first substrate and a second substrate which are disposed in opposition to each other. The first substrate and the second substrate are encapsulated by a sealant. In a non-display area of the display panel, a first adsorption layer is disposed on one of the first substrate and the second substrate, and a second adsorption layer is disposed on the other of the first substrate and the second substrate. The first adsorption layer and the second adsorption layer may be attracted to each other by magnetic force. Embodiments of the present invention can effectively avoid the separation of the first substrate and the second substrate due to the stress released during the process of melting the sealant, thereby improving the problem of poor encapsulation caused thereby.
US09660211B2
A multicolor light-emitting element using fluorescence and phosphorescence, which has a small number of manufacturing steps owing to a relatively small number of layers to be formed and is advantageous for practical application can be provided. In addition, a multicolor light-emitting element using fluorescence and phosphorescence, which has favorable emission efficiency is provided. A light-emitting element which includes a light-emitting layer having a stacked-layer structure of a first light-emitting layer exhibiting light emission from a first exciplex and a second light-emitting layer exhibiting phosphorescence is provided.
US09660209B2
The present invention provides a method for manufacturing an OLED device and an OLED device manufactured therewith. The method for manufacturing an OLED device includes: (1) providing a substrate and forming, in sequence, an anode and a hole transporting layer on the substrate; (2) forming an emissive layer on the hole transporting layer through a solution film casting process, wherein the emissive layer comprises a red sub-pixel, a green sub-pixel, and a blue sub-pixel, of which at least one sub-pixel is formed of a quantum dot and at least one sub-pixel is formed of an organic light-emitting material; (3) forming, in sequence, an electron transporting layer and a cathode on the emissive layer; and (4) providing a package cover plate, which is set above the cathode, wherein the substrate and the package cover plate are bonded together by sealing enclosing resin to complete packaging of the OLED device. Since each sub-pixel of the emissive layer is formed through a solution film casting process, the manufacture of the OLED device requires no use of a fine metal mask so that the manufacturing cost is low, the utilization rate of material is high, and the yield rate is good.
US09660202B2
An organic electroluminescence (EL) device, including an anode; a cathode; and an emission layer between the anode and the cathode, the emission layer emitting a light via a singlet excited state, a stacking structure of at least three layers having different components being provided between the anode and the emission layer, wherein the stacking structure includes: a first layer including an electron accepting compound having a lowest unoccupied molecular orbital (LUMO) level of about −9.0 eV to about −4.0 eV; a second layer including a compound represented by the following Formula (1), the second layer being closer to the emission layer than the first layer; and a third layer including a compound represented by the following Formula (2), the third layer being closer to the emission layer than the second layer, wherein the emission layer includes a compound represented by the following Formula (3).
US09660193B2
It is an object of the present invention to provide a material composition for a bulk-heterojunction-type organic photoelectric conversion layer having high photoelectric conversion efficiency and durability through formation of a stable phase-separated structure by drying in a short time with high productivity and to provide an organic photoelectric conversion element, a method of producing the organic photoelectric conversion element, and a solar cell. The material composition for an organic photoelectric conversion layer contains at least a p-type conjugated polymer semiconductor material being a copolymer having a main chain including an electron-donating group and an electron-withdrawing group, an n-type organic semiconductor material having electron acceptability, and a solvent. The solvent is represented by a general formula (1).
US09660184B2
Spin transfer torque memory cells and methods of forming the same are described herein. As an example, spin transfer torque memory cells may include an amorphous material, a storage material formed on the amorphous material, wherein the storage material is substantially boron free, an interfacial perpendicular magnetic anisotropy material formed on the storage material, a reference material formed on the interfacial perpendicular magnetic anisotropy material, wherein the reference material is substantially boron free, a buffer material formed on the reference material and a pinning material formed on the buffer material.
US09660176B2
A method of manufacturing an electronic device including an electronic element, a base substrate, and a lid member, includes joining the lid member to the sealing part by application of an energy beam so that a plate thickness of the lid member may be larger in a part joined to the sealing part than in a part located inside of the part in a plan view along the thickness direction.
US09660175B2
A piezoelectric ceramic contains a main component, Mn as a first auxiliary component, and a second auxiliary component containing at least one element selected from the group consisting of Cu, B, and Si. The main component contains a perovskite metal oxide having the following general formula (1): (Ba1-xCax)a(Ti1-yZry)O3(0.100≦x≦0.145,0.010≦y≦0.039) (1) The amount b (mol) of Mn per mole of the metal oxide is in the range of 0.0048≦b≦0.0400, the second auxiliary component content on a metal basis is 0.001 parts by weight or more and 4.000 parts by weight or less per 100 parts by weight of the metal oxide, and the value a of the general formula (1) is in the range of 0.9925+b≦a≦1.0025+b.
US09660170B2
Micromachined ultrasonic transducer (MUT) arrays capable of multiple resonant modes and techniques for operating them are described, for example to achieve both high frequency and low frequency operation in a same device. In embodiments, various sizes of piezoelectric membranes are fabricated for tuning resonance frequency across the membranes. The variously sized piezoelectric membranes are gradually transitioned across a length of the substrate to mitigate destructive interference between membranes oscillating in different modes and frequencies.
US09660166B2
A thermoelectric conversion element (1) having, on a substrate (12), a first electrode (13), a thermoelectric conversion layer (14), and a second electrode 15, wherein a nano conductive material and a low band gap material are contained in the thermoelectric conversion layer (14); an article for thermoelectric power generation and a power supply for a sensor using the thermoelectric conversion element (1); and a thermoelectric conversion material containing the nano conductive material and the low band gap material.
US09660159B2
A semiconductor device having good TFT characteristics is realized. By using a high purity target as a target, using a single gas, argon (Ar), as a sputtering gas, setting the substrate temperature equal to or less than 300° C., and setting the sputtering gas pressure from 1.0 Pa to 3.0 Pa, the film stress of a film is made from −1×1010 dyn/cm2 to 1×1010 dyn/cm2. By thus using a conducting film in which the amount of sodium contained within the film is equal to or less than 0.3 ppm, preferably equal to or less than 0.1 ppm, and having a low electrical resistivity (equal to or less than 40 μΩ·cm), as a gate wiring material and a material for other wirings of a TFT, the operating performance and the reliability of a semiconductor device provided with the TFT can be increased.
US09660155B2
Provided are a light emitting diode, a method of manufacturing the same, and a use thereof. The light emitting diode having excellent initial light flux and excellent color uniformity and dispersion, the method of manufacturing the same, and the use thereof may be provided.
US09660148B2
A method for manufacturing a light emitting device comprises a package preparation step of preparing a package having a recess in which a light emitting element is locatable, wherein the package includes a projection extending from an upper surface of the package, the projection at least partially surrounding the recess, a sealing resin forming step of filling said recess in which said light emitting element is located with a sealing resin, and providing said sealing resin higher than the height of said package, and a sealing resin cutting step of cutting the sealing resin such that an upper surface of the sealing resin is at a height that is substantially the same as a height of the upper surface of the package.
US09660143B2
The present invention relates to a substrate having an upper surface that is not parallel to a reference plane, wherein the substrate may include the upper surface or an upper layer which is inclined or inflexed. In addition, the present invention relates to a light emitting diode comprising an active layer that is not parallel to a reference plane. The light emitting diode of the present invention may be characterized in that the active layer is inflexed. Furthermore, the light emitting diode of the present invention may be characterized in that the side wall of the light emitting diode is inflexed. Moreover, the light emitting diode of the present invention may be characterized in that the side wall of the light emitting diode is inflexed and inclined. Through the configuration, the size of a chip is identically maintained, and the area of the active layer for emitting light is increased. In addition, the area of the exposed active layer at the edge of the chip is increased, and light emitted from the side surface thereof is oriented toward the front side thereof, thereby enhancing a utilization rate of the emitted light.
US09660134B1
A polarization controlled device has a first layer comprising a group III-nitride semiconductor substrate or template; a second group III-nitride semiconductor layer disposed over the group III-nitride semiconductor substrate or template; a third group III-nitride semiconductor layer disposed over the second group III-nitride semiconductor layer; and a fourth group III-nitride semiconductor layer disposed over the third group III-nitride semiconductor layer. A pn junction is formed at an interface between the third and fourth group III-nitride semiconductor layers. A polarization heterojunction is formed between the second group III-nitride semiconductor layer and the third group III-nitride semiconductor layer. The polarization junction has fixed charges of a polarity on one side of the polarization junction and fixed charges of an opposite polarity on an opposite side of the polarization junction. When unbiased, the pn junction comprises a first electric field that opposes the flow of carriers across the pn junction and the polarization junction comprises a second electric field that opposes the flow of oppositely charged carriers across the polarization junction.
US09660126B2
A photovoltaic device having three dimensional (3D) charge separation and collection, where charge separation occurs in 3D depletion regions formed between a p-type doped group III-nitride material in the photovoltaic device and intrinsic structural imperfections extending through the material. The p-type group III-nitride alloy is compositionally graded to straddle the Fermi level pinning by the intrinsic structural imperfections in the material at different locations in the group III-nitride alloy. A field close to the surfaces of the intrinsic defects separates photoexcited electron-hole pairs and drives the separated electrons to accumulate at the surfaces of the intrinsic defects. The intrinsic defects function as n-type conductors and transport the accumulated electrons to the material surface for collection. The compositional grading also creates a potential that drives the accumulated separated electrons toward an n-type group III-nitride layer for collection. The p-type group III-nitride alloy may comprise an alloy of InGaN, InAlN or InGaAlN.
US09660111B2
Luminescent materials and methods of forming such materials are described herein. A method of forming a luminescent material includes: (1) providing a source of A and X, wherein A is selected from at least one of elements of Group 1, and X is selected from at least one of elements of Group 17; (2) providing a source of B, wherein B is selected from at least one of elements of Group 14; (3) subjecting the source of A and X and the source of B to vacuum deposition to form a precursor layer over a substrate; (4) forming an encapsulation layer over the precursor layer to form an assembly of layers; and (5) heating the assembly of layers to a temperature Theat to form a luminescent material within the precursor layer.
US09660108B2
A device includes a p-well region, and a first High-Voltage N-type Well (HVNW) region and a second HVNW region contacting opposite edges of the p-well region. A P-type Buried Layer (PBL) has opposite edges in contact with the first HVNW region and the second HVNW region. An n-type buried well region is underlying the PBL. The p-well region and the n-type buried well region are in contact with a top surface and a bottom surface, respectively, of the PBL. The device further includes a n-well region in a top portion of the p-well region, an n-type source region in the n-well region, a gate stack overlapping a portion of the p-well region and a portion of the second HVNW region, and a channel region under the gate stack. The channel region interconnects the n-well region and the second HVNW region.
US09660106B2
A flash memory structure includes a memory gate on a substrate, a select gate adjacent to the memory gate, and an oxide-nitride spacer between the memory gate and the select gate, where the oxide-nitride spacer further includes an oxide layer and a nitride layer having an upper nitride portion and a lower nitride portion, and the upper nitride portion is thinner than the lower nitride portion.
US09660101B2
Oxide layers which contain at least one metal element that is the same as that contained in an oxide semiconductor layer including a channel are formed in contact with the top surface and the bottom surface of the oxide semiconductor layer, whereby an interface state is not likely to be generated at each of an upper interface and a lower interface of the oxide semiconductor layer. Further, it is preferable that an oxide layer, which is formed using a material and a method similar to those of the oxide layers be formed over the oxide layers Accordingly, the interface state hardly influences the movement of electrons.
US09660100B2
A semiconductor device is formed in such a manner that a first insulator, a first oxide semiconductor, and a first conductor are formed; the first conductor is processed to form a second conductor; the first oxide semiconductor is processed to form a second oxide semiconductor; a second insulator is formed over the second conductor; a third insulator is formed over the second insulator; a fourth insulator is formed over the third insulator; the fourth insulator, the third insulator, the second insulator, and the second conductor are selectively processed to partly expose the second oxide semiconductor; a fifth insulator is formed over the second oxide semiconductor and the fourth insulator; and a third conductor is formed over the fifth insulator and then chemical mechanical polishing treatment is performed to expose a top surface of the fourth insulator.
US09660089B2
A thin film transistor substrate includes a substrate, a data line disposed on the substrate and which extends substantially in a predetermined direction, a light blocking layer disposed on the substrate and including a metal oxide including zinc manganese oxide, zinc cadmium oxide, zinc phosphorus oxide or zinc tin oxide, a gate electrode disposed on the light blocking layer, a signal electrode including a source electrode and a drain electrode spaced apart from the source electrode, where the source electrode is connected to the data line, and a semiconductor pattern disposed between the source electrode and the drain electrode.
US09660084B2
A method for forming a semiconductor device structure is provided. The method includes forming a dielectric layer over a substrate. The dielectric layer has a trench passing through the dielectric layer. The method includes forming a gate stack in the trench. The method includes performing a hydrogen-containing plasma process over the gate stack. The method includes removing a top portion of the gate stack to form a first recess surrounded by the gate stack and the dielectric layer. The method includes forming a cap layer in the first recess to fill the first recess.
US09660082B2
An integrated circuit transistor structure includes a semiconductor substrate, a first SiGe layer in at least one of a source area or a drain area on the semiconductor substrate, and a channel between the source area and the drain area. The first SiGe layer has a Ge concentration of 50 percent or more.
US09660073B1
A high-voltage semiconductor device is provided. The device includes a semiconductor substrate including a well region of a first conductivity type and an isolation structure in the well region. First and second regions are respectively defined on both sides of the isolation structure. First and second gate structures are respectively disposed on the first and second regions. First and second implant regions of a second conductivity type that is different from the first conductivity type are respectively in the first and second regions and adjacent to the isolation structure. A counter implant region is in the well region under the isolation structure and laterally extends under the first and second implant regions. The counter implant region has the first conductivity type and has a doping concentration that is greater than that of the well region. A method for fabricating the high-voltage semiconductor device is also disclosed.
US09660065B2
A method of producing a semiconductor device includes forming an insulating film on a substrate on which a semiconductor layer is formed; removing a part of the insulating film by etching to form an opening in the insulating film; supplying steam with a temperature greater than or equal to 200° C. and less than or equal to 600° C. to the opening formed in the insulating film; after supplying the steam, applying a solution including a silicon compound to a side surface or the insulating film defining the opening; and forming a hydrophobic film on the side surface of the insulating film defining the opening by polymerizing the silicon compound.
US09660063B2
A semiconductor structure includes a substrate; and a graded III-V layer over the substrate. The semiconductor structure further includes a p-doped gallium nitride (GaN) layer over the graded III-V layer. The semiconductor structure further includes one or more sets of GaN layers over the p-doped GaN layer. Each set of the one or more sets of GaN layers includes a lower GaN layer, wherein the lower GaN layer is undoped, unintentionally doped having N-type doping, or N-type doped. Each set of the one or more sets of GaN layers includes an upper GaN layer on the lower GaN layer, wherein the upper GaN layer is P-type doped. The semiconductor structure includes a second GaN layer over the one or more sets of GaN layers, the second GaN layer being either undoped or unintentionally doped having the N-type doping. The semiconductor structure includes an active layer over the second GaN layer.
US09660058B2
A method of fabricating a fin for a FinFET device includes providing a semiconductor substrate, forming a patterned silicon germanium layer on the semiconductor substrate, epitaxially growing a silicon layer on a top surface and sidewalls of the patterned silicon germanium layer, forming a sacrificial layer covering the patterned silicon germanium layer, and removing the sacrificial layer and a portion of the silicon layer disposed on the top surface of the patterned silicon germanium layer until a top surface of the sacrificial layer is co-planar with the top surface of the patterned silicon germanium layer. The method further includes removing the patterned silicon germanium layer and removing the sacrificial layer to form the fin. The epitaxially formed fin does not have the issues of line width roughness and edge roughness to improve the performance of the FinFET device.
US09660044B2
A power field effect transistor, a power field effect transistor device and a method of manufacturing a power field effect transistor are provided. During the manufacturing of the power field effect transistor, a body drive stage to manufacture the body region of the power field effect transistor is shortened to obtain a relatively low on resistance for the power field effect transistor. Before the implanting stage of the dopants of the body region, a pre body drive stage is introduced. During the pre body drive stage and the body drive stage sidewalls of a polysilicon layer of the power field effect transistor are oxidized to obtain a power field effect transistor which has at the sidewalls an oxidized polysilicon layer that is thick enough to prevent a premature current injection from the gate to the source regions of the power field effect transistor.
US09660042B1
A semiconductor device and manufacturing method thereof are provided in the present invention. A second opening is formed corresponding to a gate structure after a step of forming a first opening corresponding to an epitaxial layer. After the step of forming the second opening, a pre-amorphization implantation process is performed to form an amorphous region in the epitaxial layer, and the influence of the process of forming the second opening on the amorphous region may be avoided. The semiconductor device formed by the manufacturing method of the present invention includes a contact structure and an alloy layer. The contact structure is disposed in the second opening for being electrically connected to a metal gate. The alloy layer is disposed on the metal gate and disposed between the metal gate and the contact structure. The alloy layer includes an alloy of the material of the metal gate.
US09660026B1
There is provided an electronic device and a method for its manufacture. The device comprises an elongate silicon nanowire less than 0.5 μm in cross-sectional dimensions and having a hexagonal cross-sectional shape due to annealing-induced energy relaxation. The method, in examples, includes thinning the nanowire through iterative oxidation and etching of the oxidized portion.
US09660024B2
A semiconductor device includes a first memory cell including a first transistor and a first capacitor, the first transistor comprising a first gate electrode, a first source, and a first drain; a second memory cell including a second transistor and the first capacitor, the second transistor comprising a second gate electrode, a second source, and a second drain; a first word line coupled to the first gate electrode; and a second word line coupled to the second gate electrode. The first capacitor is electrically connected between the first and second transistors.
US09660021B1
A semiconductor device having a vertical drain extended MOS transistor may be formed by forming deep trench structures to define vertical drift regions of the transistor, so that each vertical drift region is bounded on at least two opposite sides by the deep trench structures. The deep trench structures are spaced so as to form RESURF regions for the drift region. Trench gates are formed in trenches in the substrate over the vertical drift regions. The body regions are located in the substrate over the vertical drift regions.
US09660020B2
Integrated circuits with improved laterally diffused metal oxide semiconductor (LDMOS) structures, and methods of fabricating the same, are provided. An exemplary LDMOS integrated circuit includes a p-type semiconductor substrate, an n-type epitaxial layer disposed over and in contact with the p-type semiconductor substrate, and a p-type implant layer disposed within the n-type epitaxial layer, wherein the p-type implant layer is not in contact with the p-type semiconductor substrate. It further includes an n-type reduced surface field region disposed over and in contact with the p-type implant layer, a p-type body well disposed on a lateral side of the p-type implant layer and the n-type reduced surface field region, and a shallow trench isolation (STI) structure disposed within the n-type reduced surface field region. Still further, it includes a gate structure disposed partially over the p-type body well, partially over the n-type surface field region, and partially over the STI structure.
US09660019B2
A concentric capacitor structure generally comprising concentric capacitors is disclosed. Each concentric capacitor comprises a first plurality of perimeter plates formed on a first layer of a substrate and a second plurality of perimeter plates formed on a second layer of the substrate. The first plurality of perimeter plates extend in a first direction and the second plurality of perimeter plates extend in a second direction different than the first direction. A first set of the first plurality of perimeter plates is electrically coupled to a first set of the second plurality of perimeter plates and a second set of the first plurality of perimeter plates is electrically coupled to a second set of the second plurality of perimeter plates. A plurality of capacitive cross-plates are formed in the first layer such that each cross-plate overlaps least two of the second plurality of perimeter plates.
US09660017B2
A microelectronic package includes a packaging substrate having a chip mounting surface; a chip mounted on the chip mounting surface of the packaging substrate with the chip's active surface facing down to the chip mounting surface; a plurality of input/output (I/O) pads distributed on the active surface of the chip; and a discrete passive element mounted on the active surface of the chip. The discrete passive element may be a decoupling capacitor, a resistor, or an inductor.
US09660009B2
An organic light emitting diode display includes a scan line, a data line, and a driving voltage line connected to a pixel. The pixel includes a switching transistor connected to the scan line and the data line, a driving transistor connected to the switching transistor, and a compensation transistor to compensate a threshold voltage of the driving transistor. The pixel also includes a first data connector to connect the compensation transistor to the driving transistor, a first storage electrode corresponding to the driving gate electrode and connected to the driving voltage line, and a second storage electrode overlapping a first storage electrode. An extended portion of the second storage electrode is in an overlapped portion between the first data connector and the scan line.
US09660007B2
A display device according to the invention includes: a first substrate that includes a flexible substrate, is segmented into a display area and a non-display area outside the display area, and includes a thin film transistor and an electroluminescent light-emitting element formed on the display area of the flexible substrate; and an IC chip that is bonded on the non-display area of the first substrate via an anisotropic conductive film, wherein the first substrate includes, between the flexible substrate and the anisotropic conductive film, at least one or more support layers whose plan view shape is larger than that of the IC chip and whose hardness is higher than that of the flexible substrate, and the IC chip is located inside the at least one or more support layers in a plan view.
US09660000B2
An OLED array substrate, comprising a plurality of pixel units, the pixel unit at least comprising a first sub-pixel, a second sub-pixel and a third sub-pixel, further comprising: a substrate, a TFT array and a pixel electrode formed on the substrate, and at least two organic luminescent material layers that display different colors formed on the pixel electrode, wherein the first sub-pixel comprises a first pixel electrode, the second sub-pixel comprises a second pixel electrode, the third sub-pixel comprises a third pixel electrode, an organic luminescent material layer of a first color covers the adjacent first pixel electrode and second pixel electrode in the pixel unit, an organic luminescent material layer of a second color covers the adjacent second pixel electrode and third pixel electrode in the pixel unit.
US09659999B2
A 3-dimensional stack memory device includes a semiconductor substrate, a stacked active pattern configured so that a plurality of stripe shape active regions and insulation layers are stacked alternatively over the semiconductor substrate, a gate electrode formed in the stacked active pattern, a source and drain formed at both sides of the gate electrode in each of the plurality of active regions, a bit line formed on one side of the drain to be connected to the drain, a resistive device layer formed on one side of the source to be connected to the source, and a source line connected to the resistive device layer. The source is configured of an impurity region having a first conductivity type, and the drain is configured of an impurity region having a second conductivity type different from the first conductivity type.
US09659995B2
A flexible display device includes a display panel having pliability and a dielectric elastomer unit on the display panel. The dielectric elastomer unit is reversibly deformable by an applied voltage to provide stiffness to the display panel.
US09659991B2
A back-side illumination image capturing apparatus includes a semiconductor substrate having a first surface for receiving incident light and a second surface located on the opposite side as the first surface, and including a photoelectric conversion portion, and a gate electrode disposed above the second surface. The apparatus further includes a first insulating layer disposed above the second surface of the semiconductor substrate, an interlayer insulation film disposed on the first insulating layer, a contact plug connected to the gate electrode, and a light-cutting portion for cutting light, of the incident light, that has passed through the photoelectric conversion portion. The light-cutting portion passes through at least part of the interlayer insulation film. The first insulating layer is located between the light-cutting portion and the semiconductor substrate.
US09659988B2
In an image pickup apparatus, during a period from a start of an accumulation period of electric carriers to an end of a reading period for a first photoelectric conversion unit and a second photoelectric conversion unit, the number of times an on-state voltage is supplied to a gate electrode of a first transfer transistor is larger than the number of times an on-state voltage is supplied to a gate electrode of a second transfer transistor. Additionally, among a plurality of pixels, in a pixel having a shortest distance from the gate electrode of the second transfer transistor to a contact plug, a distance from the gate electrode of the second transfer transistor to the contact plug is shorter than a distance from the gate electrode of the first transfer transistor to the contact plug.
US09659985B2
An integrated circuit includes a first semiconductor device, a second semiconductor device, and a metal shielding layer. The first semiconductor device includes a first substrate and a first multi-layer structure, and the first substrate supports the first multi-layer structure. The second semiconductor device includes a second substrate and a second multi-layer structure, and the second substrate supports the second multi-layer structure. The metal shielding layer is disposed between the first multi-layer structure and the second multi-layer structure, wherein the metal shielding layer is electrically connected to the second semiconductor device.
US09659984B2
A solid-state image sensor includes a semiconductor substrate having a photoelectric conversion element converting incident light into a charge and a charge retaining section temporarily retaining the charge photoelectrically converted by the photoelectric conversion element and a light shielding section having an embedded section extending in at least a region between the photoelectric conversion element and the charge retaining section of the semiconductor substrate.
US09659980B2
The present disclosure relates to a semiconductor photomultiplier comprising a substrate; an array of photosensitive cells formed on the substrate that are operably coupled between an anode and a cathode. A set of primary bus lines are provided each being associated with a corresponding set of photosensitive cells. A secondary bus line is coupled to the set of primary bus lines. An electrical conductor is provided having a plurality of connection sites coupled to respective connection locations on the secondary bus line for providing conduction paths which have lower impedance than the secondary bus line.
US09659974B2
The disclosure provides a pixel structure, a manufacturing method of a pixel structure, an array substrate, a display panel, and a display device. The pixel structure includes a plurality of data lines and a plurality of scan lines, and a plurality of pixel units formed by intersecting the plurality of data lines with the plurality of scan lines. A pixel unit corresponds to one of the plurality of data lines and one of the plurality of scan lines. The pixel unit includes a pixel electrode and a TFT. The pixel electrode of the pixel unit in a row is electrically connected to a TFT of a pixel unit in a preceding adjacent row of the pixel electrode of the pixel unit.
US09659972B2
A thin film transistor array panel includes: a substrate; gate lines on the substrate, each of the gate lines including a gate electrode; a semiconductor layer on the substrate; an etching stopper on the semiconductor layer; a data wiring layer on the substrate and including a data line, a source electrode connected to the data line, and a drain electrode; and a passivation layer covering the source electrode, the drain electrode, and the etching stopper, where the etching stopper includes an etching prevention portion between the source electrode and the drain electrode, a shortest distance A between an upper side and a lower side of an overlap area where the etching prevention portion and the semiconductor layer overlap one another is represented by a straight line in a plane view, and a width of a channel portion of the semiconductor layer is greater than the shortest distance A.
US09659966B2
A flexible display substrate, a flexible organic light emitting display device, and a method of manufacturing the same are provided. The flexible display substrate comprises a flexible substrate including a display area and a non-display area extending from the display area, and a wire formed on the flexible substrate. At least a part of the non-display area of the flexible substrate is formed in a crooked shape in a bending direction, and the wire positioned on at least a part of the non-display area of the flexible substrate includes a plurality of first wire patterns, and a second wire pattern formed on the plurality of first wire patterns and electrically connected with the plurality of first wire patterns.
US09659965B2
A liquid crystal display (LCD) device comprises a first substrate, a second substrate disposed to face the first substrate, a liquid crystal layer which is disposed between the first substrate and the second substrate and which includes multiple liquid crystal molecules, and a self-alignment layer formed between the first substrate and the liquid crystal layer, the self-alignment layer comprising a vertical alignment additive having a molecular structure having a hydrophilic group and a polymerized group formed in both ends of a core molecule, wherein a major axis of the vertical alignment additive is at an angle less than about 90° with respect to a surface of the first substrate.
US09659962B2
Semiconductor devices and methods of manufacture thereof are disclosed. A complimentary metal oxide semiconductor (CMOS) device includes a PMOS transistor having at least two first gate electrodes comprising a first parameter, and an NMOS transistor having at least two second gate electrodes comprising a second parameter, wherein the second parameter is different than the first parameter. The first parameter and the second parameter may comprise the thickness or the dopant profile of the gate electrode materials of the PMOS and NMOS transistors. The first and second parameter of the at least two first gate electrodes and the at least two second gate electrodes establish the work function of the PMOS and NMOS transistors, respectively.
US09659959B2
A semiconductor device includes a lower insulation layer, a plurality of base layer patterns separated from each other on the lower insulation layer, a separation layer pattern between the base layer patterns, a plurality of channels extending in a vertical direction with respect to top surfaces of the base layer patterns, and a plurality of gate lines surrounding outer sidewalls of the channels, being stacked in the vertical direction and spaced apart from each other.
US09659951B1
A single poly nonvolatile memory (NVM) cell includes first and second active regions disposed to face each other and third and fourth active regions spaced apart from the first and second active regions. A drain region, a junction region and a source region are disposed in the fourth active region. A floating gate is disposed on the first and second active regions and is disposed to extend onto the third and fourth active regions. A read/selection gate is disposed to cross the fourth active region between the drain region and the junction region. The first active region is coupled to a first array control gate line, and the second active region is coupled to a second array control gate line. The source region, the junction region and the floating gate constitute a floating gate transistor. The drain region, the junction region and the read/selection gate constitute a read/selection transistor.
US09659935B2
A method for forming MOS transistor includes providing a substrate including a semiconductor surface having a gate electrode on a gate dielectric thereon, dielectric spacers on sidewalls of the gate electrode, a source and drain in the semiconductor surface on opposing sides of the gate electrode, and a pre-metal dielectric (PMD) layer over the gate electrode and over the source and drain regions. Contact holes are formed through the PMD layer to form a contact to the gate electrode and contacts to the source and drain. A post contact etch dielectric layer is then deposited on the contacts to source and drain and on sidewalls of the PMD layer. The post contact etch dielectric layer is selectively removed from the contacts to leave a dielectric liner on sidewalls of the PMD layer. A metal silicide layer is formed on the contacts to the source and drain.
US09659916B2
A light emitting device package is provided. The light emitting device package may include a main body having a cavity including side surfaces and a bottom, and a first reflective cup and a second reflective cup provided in the bottom of the cavity of the main body and separated from each other. A first light emitting device may be provided in the first reflective cup, and a second light emitting device may be provided in the second reflective cup.
US09659907B2
Packages and methods of formation are described. In an embodiment, a package includes a redistribution layer (RDL) formed directly on a top die, and a bottom die mounted on a back surface of the RDL.
US09659906B2
A semiconductor device with improved heat radiation characteristics. It includes: a wiring board having a chip mounting surface and a plurality of electrode pads formed over the chip mounting surface; a semiconductor chip located over the chip mounting surface of the wiring board, having a plurality of bonding pads; a plurality of wires for coupling the electrode pads and the bonding pads; a heat slug located over the semiconductor chip; and a sealing member covering the chip mounting surface of the wiring board, the semiconductor chip, the wires, and the heat slug. A spacer lies between the chip mounting surface of the wiring board and the semiconductor chip and the sealing member lies between the semiconductor chip and the heat slug.
US09659902B2
A thermocompression bonding system for bonding semiconductor elements is provided. The thermocompression bonding system includes (1) a bond head assembly including a heater for heating an semiconductor element to be bonded, the bond head assembly including a fluid path configured to receive a cooling fluid; (2) a pressurized cooling fluid source; (3) a booster pump for receiving a pressurized cooling fluid from the pressurized cooling fluid source, and for increasing a pressure of the received pressurized cooling fluid; (4) a pressurized fluid reservoir for receiving pressurized cooling fluid from the booster pump; and (5) a control valve for controlling a supply of pressurized cooling fluid from the pressurized fluid reservoir to the fluid path.
US09659894B2
A device comprising a chip including a substrate defining one or more electronic devices and a printed circuit board electrically connected to the chip via one or more solder elements sandwiched between the chip and the printed circuit board, and the solder elements, and buffer layers having a Young's Modulus of 2.5 GPa or less.
US09659892B2
A method of manufacturing a semiconductor device includes: arranging a solder material containing at least tin, between a semiconductor element and a joined member provided with a nickel layer and a copper layer, such that the solder material is in contact with the copper layer, the nickel layer being provided on a surface of the joined member, and the copper layer being provided on at least a portion of a surface of the nickel layer; and melting and solidifying the solder material to form Cu6Sn5 on the surface of the nickel layer using tin of the solder material and the copper layer.
US09659888B2
Even when a thermal stress is applied to an electrode pad, the electrode pad is prevented from being moved. A substrate of a semiconductor chip has a rectangular planar shape. The semiconductor chip has a plurality of electrode pads. The center of a first electrode pad is positioned closer to the end of a first side in the direction along the first side of the substrate as compared to the center of a first opening. Thus, in a part of the first electrode pad covered with an insulating film, a width of the part closer to the end of the first side in the direction along the first side is larger than another width of the part opposite to the above-mentioned width.
US09659887B2
A semiconductor device includes a pad group including pads provided on a semiconductor substrate and arranged in a row to form a pad row as a whole. The pad group includes at least one first pad provided with a first via-connection part electrically connected therewith and extending in a first direction perpendicular to a row direction of the pad row, and at least one second pad provided with a second via-connection part electrically connected therewith and extending in a second direction opposite to the first direction. The at least one second pad is formed at a position moved in the first direction from the row direction of the pad row passing through a center of the at least one first pad.
US09659877B2
One aspect of the invention relates to a shielding device for shielding from electromagnetic radiation, including a shielding base element, a shielding cover element and a shielding lateral element for electrically connecting the base element to the cover element in such that a circuit part to be shielded is arranged within the shielding elements. Since at least one partial section of the shielding elements includes a semiconductor material, a shielding device can be realized completely and cost-effectively in an integrated circuit.
US09659874B2
A method of forming a deep trench in a semiconductor substrate includes: forming a first mask pattern over the semiconductor substrate, in which the first mask pattern has a first opening exposing a portion of the semiconductor substrate; forming a second mask pattern over the first mask pattern, in which the second mask pattern has a second opening substantially aligned with the first opening to expose the portion of the semiconductor substrate, and the second opening has a width greater than a width of the first opening to further expose a portion of the first mask pattern; and removing the portion of the semiconductor substrate, the portion of first mask pattern and another portion of the semiconductor substrate beneath the portion of the first mask pattern to form the deep trench.
US09659872B2
A step of forming a connecting member configured to electrically connect a first conductive line and a second conductive line includes a phase of perforating a laminate from a first semiconductor wafer to form a plurality of connection holes that reach the second conductive line and a phase of filling the plurality of penetrating connection holes with a conductive material to form conductive sections in contact with the second conductive line.
US09659871B2
Provided is a semiconductor device including a substrate with a plurality of logic cells, transistors provided in the plurality of logic cells, contact plugs connected to electrodes of the transistors, first via plugs in contact with top surfaces of the contact plugs, and first wires in contact with top surfaces of the first via plugs. The first wires may include a common conductive line connected to the plurality of logic cells through the contact plugs, and all of the first wires may be shaped like a straight line extending parallel to a specific direction.
US09659866B1
Dielectric pedestal structures embedded in a sacrificial material layer is formed between a substrate and an alternating stack of insulating layers and spacer material layers. After memory openings are formed through the alternating layer, a cavity is formed by removal of the sacrificial material layer selective to the dielectric pedestal structures. A memory film, a semiconductor channel layer, and a dielectric core are sequentially formed in the volume including the cavity and the memory openings. A backside trench is formed through the alternating stack in an area that straddles the dielectric pedestal structures. By recessing the dielectric pedestal structures selective to the semiconductor channel layer, planar regions and vertical regions of the semiconductor channel layer can be physically exposed, which are converted into source regions. Contact resistance can be lowered due the increased contact area provided by vertical source portions.
US09659864B2
A layer of an interconnect structure is formed over a substrate. The layer contains an interlayer dielectric (ILD) material and a metal line disposed in the ILD. A first etching stop layer is formed on the ILD but not on the metal line. The first etching stop layer is formed through a selective atomic layer deposition (ALD) process. A second etching stop layer is formed over the first etching stop layer. A high etching selectivity exists between the first and second etching stop layers. A via is formed to be at least partially aligned with, and electrically coupled to, the metal line. The first etching stop layer prevents the ILD from being etched through during the formation of the via.
US09659858B2
A component can include a substrate having a front surface and a rear surface remote therefrom, an opening extending from the rear surface towards the front surface, and a conductive via extending within the opening. The substrate can have a CTE less than 10 ppm/° C. The opening can define an inner surface between the front and rear surfaces. The conductive via can include a first metal layer overlying the inner surface and a second metal region overlying the first metal layer and electrically coupled to the first metal layer. The second metal region can have a CTE greater than a CTE of the first metal layer. The conductive via can have an effective CTE across a diameter of the conductive via that is less than 80% of the CTE of the second metal region.
US09659850B2
A package substrate that includes a first portion and a redistribution portion. The first portion is configured to operate as a capacitor. The first portion includes a first dielectric layer, a first set of metal layers in the dielectric layer, a first via in the dielectric layer, a second set of metal layers in the dielectric layer, and a second via in the dielectric layer. The first via is coupled to the first set of metal layers. The first via and the first set of metal layers are configured to provide a first electrical path for a ground signal. The second via is coupled to the second set of metal layers. The second via and the second set of metal layers are configured to provide a second electrical path for a power signal. The redistribution portion includes a second dielectric layer, and a set of interconnects.
US09659849B2
A multilayer wiring board has a high degree of freedom of wiring design and can realize high-density wiring, and a method to simply manufacture the multilayer wiring board. A core substrate with two or more wiring layers provided thereon through an electrical insulating layer. The core substrate has a plurality of throughholes filled with an electroconductive material, and the front side and back side of the core substrate have been electrically conducted to each other by the electroconductive material. The throughholes have an opening diameter in the range of 10 to 100 μm. An insulation layer and an electroconductive material diffusion barrier layer are also provided, and the electroconductive material is filled into the throughholes through the insulation layer. A first wiring layer provided through an electrical insulating layer on the core substrate is connected to the electroconductive material filled into the throughhole through via.
US09659847B2
A semiconductor die comprising a terminal structure for an active power device. The terminal structure comprises a metallic layer arranged to be electrically coupled between the active power device and an external contact of an integrated circuit package, a conductive sub-structure extending in parallel with the metallic layer, and located such that, when mounted within an integrated circuit device, the conductive sub-structure lies between the metallic layer and a reference voltage plane, and interconnecting elements extending between the metallic layer and the conductive sub-structure and electrically coupling the metallic layer to the conductive sub-structure. The plurality of interconnecting elements comprise first and second interconnecting elements extending between first and second lateral end regions of the metallic layer and the conductive sub-structure respectively such that the first and second interconnecting elements are laterally spaced with respect to the direction of travel of the fundamental signal for the active power device.
US09659838B1
An electronic chip package including a base defining a fluid inlet opening for receiving pressurized fluid from a fluid source and a fluid outlet opening. A dielectric body is arranged on the base and configured to support an electronic device. The dielectric body comprises a coolant flow chamber formed in a first surface thereof, and a plurality of impingement openings formed within the coolant flow chamber. The plurality of impingement openings are in communication with the fluid inlet opening of the base for generating a plurality of fluid streams to be expelled into the coolant flow chamber. The body further comprises a coolant return port formed within the coolant flow chamber and in communication with the fluid outlet opening of the base.
US09659836B2
Disclosed is a heat dissipation structure that includes a plurality of linear structures made of carbon, each of the linear structures having at least one of a first end and a second end being bent, and a coating layer formed on a surface of each of the linear structures, the coating layer having a part covering the other one of the first ends and the second ends of the linear structures, a thickness of the part allowing the corresponding linear structures to be plastically deformable.
US09659831B2
A method for manufacturing a semiconductor device is disclosed. The method includes generating a thermo-mechanical stress within a plurality of layers of a wafer, and after generating the thermo-mechanical stress, testing an interfacial strength level associated with one or more of the plurality of layers.
US09659823B2
A structure includes a substrate and a tunnel field effect transistor (TFET). The TFET includes a source region disposed in the substrate having an overlying source contact, the source region containing first semiconductor material having a first doping type; a drain region disposed in the substrate having an overlying drain contact, the drain region containing second semiconductor material having a second, opposite doping type; and a gate structure that overlies a channel region between the source and the drain. The source region and the drain region are asymmetric with respect to one another such that one contains a larger volume of semiconductor material than the other one. A method is disclosed to fabricate a plurality of the TFETs using a plurality of spaced apart mandrels having spacers. A pair of the mandrels and the associated spacers is processed to form four adjacent TFETs without requiring intervening lithographic processes.
US09659822B2
A method for providing position control information for controlling an impingement position of a laser beam for treatment of a chip die in a chip manufacturing process, comprises the steps of a) receiving a specification of positions (x,y) of a electrically conductive elements in the chip die, the positions having a first coordinate along a first direction (x) and a second coordinate (y) along a second direction in a plane defined by the chip die, said first and second direction being mutually transverse to each other, b) selecting a cluster of positions that is within a predetermined two-dimensional spatial range, wherein each pair of positions in the cluster at least has a first minimum difference in their first coordinates or a second minimum difference in their second coordinates and removing the next position from the ordered set, c) update the positions of the set of positions in accordance with an expected time needed to carry out the treatment for said cluster and a speed of a wafer comprising the chip die, d) repeating steps b-d until each of the positions in said set is assigned to a cluster.
US09659821B1
A method includes forming a dielectric layer over a conductive feature. A first mask having a first opening is formed over the dielectric layer. A second mask is formed over the first mask. A third mask having a second opening is formed over the second mask. A fourth mask having a third opening is formed over the third mask, a portion of the third opening overlapping with the second opening. The portion of the third opening is transferred to the second mask to form a fourth opening, a portion of the fourth opening overlapping with the first opening. The portion of the fourth opening is transferred to the dielectric layer to form a fifth opening. The fifth opening is extended into the dielectric layer to form an extended fifth opening, the extended fifth opening exposing the conductive feature. The extended fifth opening is filled with a conductive material.
US09659818B1
A method for forming conductive lines on a substrate includes depositing a layer of mandrel material on a substrate and removing portions of the layer of mandrel material to form a first mandrel having a first length, a portion of the first mandrel has sloped sidewalls, a second mandrel having a second length, the second mandrel having an outwardly facing sloped sidewall, and a third mandrel having the second length, the third mandrel having an outwardly facing sloped sidewall, the first length is greater than the second length, the first mandrel is arranged between the second mandrel and the third mandrel. A spacer is formed along non-sloped sidewalls of the first mandrel, the second mandrel, and the third mandrel. The first mandrel, the second mandrel, and the third, mandrel, and exposed portions of the substrate are removed to form cavities. The cavities are filled with a conductive material.
US09659813B1
An interconnection includes first and second conductive layers, first and second dielectric layers, a stop layer, and first and second adhesion layers is provided. The first conductive layer is disposed over a semiconductor substrate. The first dielectric layer is over the first conductive layer, and the first dielectric layer includes a via hole. The second dielectric layer is disposed over the first dielectric layer. The stop layer is located between the first dielectric layer and the second dielectric layer, and the second dielectric layer and the stop layer include a trench. The second conductive layer is located in the via hole and the trench to electrically connect with the first conductive layer. The first adhesion layer is located on sidewalls of the trench. The second adhesion layer is located between the second conductive layer and the first adhesion layer and between the second conductive layer and the first dielectric layer.
US09659805B2
A method includes forming an adhesive layer over a carrier, forming a sacrificial layer over the adhesive layer, forming through-vias over the sacrificial layer, and placing a device die over the sacrificial layer. The Method further includes molding and planarizing the device die and the through-vias, de-bonding the carrier by removing the adhesive layer, and removing the sacrificial layer.
US09659804B2
An orientating and installing jig for orientating a heat-dissipating unit (or a workpiece) to fix on a heat-generating device (or a target device) above a circuit board (or a supporting baseplate), which includes a carrying board formed with at least one assembling opening, a plurality of fixing posts and a pair of arrest-orientating modules oppositely arranged at two sides of the assembling opening. The assembling opening is shaped correspondingly to the shape of the heat-dissipating unit. The fixing posts are disposed at a bottom surface of the carrying board for fixing the carrying board above the circuit board. Each arrest-orientating module includes an arresting barrier. The arresting barrier is rotatably disposed at a suspending position of suspending the workpiece on the carrying board, and a releasing position of allowing the workpiece to pass through the assembling opening, so that the workpiece is put on the target device.
US09659801B2
A high-efficiency buffer stocker is disclosed. The buffer stocker includes an overhead transport track for supporting overhead transport vehicles carrying wafer containers and at least one conveyor system or conveyor belt provided beneath the overhead transport track for receiving the wafer containers from the overhead transport vehicles on the overhead transport track. The buffer stocker is capable of absorbing the excessive flow of wafer containers between a processing tool and a stocker, for example, to facilitate the orderly and efficient flow of wafers between sequential process tools in a semiconductor fabrication facility, for example.
US09659799B2
Embodiments of the present disclosure can help increase throughput and reduce resource conflicts and delays in semiconductor processing tools. An exemplary method according to various aspects of the present disclosure includes analyzing, by a computer program operating on a computer system, a plurality of expected times to complete each of a respective plurality of actions to be performed by a semiconductor processing tool, the semiconductor processing tool including a first process module and a second process module.
US09659798B2
A system produces devices that include a semiconductor part and a non-semiconductor part. A front end is configured to receive a semiconductor part and to process the semiconductor part. A back end is configured to receive the processed semiconductor part and to assemble the processed semiconductor part and a non-semiconductor part into a device. A transfer device is configured to automatically handle the semiconductor part in the front end and to automatically transfer the processed semiconductor part to the back end.
US09659795B2
A device includes a jig having a plate with through-holes formed therein and also having a frame formed on the plate so as to be able to accommodate a plurality of semiconductor chips in spaced relationship, a foreign matter capture member having a first charge section with a first flat surface and a second charge section with a second flat surface, the second charge section being insulated from the first charge section, charging means for positively charging the first flat surface and negatively charging the second flat surface, and sliding means for causing either the jig or the foreign matter capture member to slide relative to the other in such a manner that the through-holes of the jig are spaced a predetermined distance from the first and second flat surfaces. The through-holes are formed in different regions defined and surrounded by the frame.
US09659788B2
A method for etching silicon-containing films is disclosed. The method includes the steps of introducing a vapor of a nitrogen containing etching compound into a reaction chamber containing a silicon-containing film on a substrate, wherein the nitrogen containing etching compound is an organofluorine compound containing at least one C≡N or C═N functional group; introducing an inert gas into the reaction chamber; and activating a plasma to produce an activated nitrogen containing etching compound capable of etching the silicon-containing film from the substrate.
US09659787B2
The present invention is a high-purity 2-fluorobutane having a purity of 99.9 vol % or more and a butene content of 1,000 ppm by volume or less, and a method for using the high-purity 2-fluorobutane as a dry etching gas. According to the present invention, a high-purity 2-fluorobutane that is suitable as a plasma reaction gas for semiconductors is provided.
US09659781B2
A method includes forming a shallow trench isolation (STI) region in a substrate, the STI region comprising an etch stop layer; etching the STI region by a first etch to the etch stop layer to form a recess in the STI region; and forming a floating gate, the floating gate comprising a portion that extends into the recess in the STI region, wherein the etch stop layer separates the portion of the floating gate that extends into the recess in the STI region from the substrate.
US09659777B2
The invention relates to a process for stabilizing a bonding interface, located within a structure for applications in the fields of electronics, optics and/or optoelectronics and that comprises an oxide layer buried between an active layer and a receiver substrate, the bonding interface having been obtained by molecular adhesion. In accordance with the invention, the process further comprises irradiating this structure with a light energy flux provided by a laser, so that the flux, directed toward the structure, is absorbed by the energy conversion layer and converted to heat in this layer, and in that this heat diffuses into the structure toward the bonding interface, so as to thus stabilize the bonding interface.
US09659776B2
First and second fins are formed extending from a substrate. A first layer is formed over the first fin. The first layer comprises a first dopant. A portion of the first layer is removed from a tip portion of the first fin. A second layer is formed over the second fin. The second layer comprises a second dopant. One of the first and second dopants is a p-type dopant, and the other of the first and second dopants is an n-type dopant. A portion of the second layer is removed from a tip portion of the second fin. A solid phase diffusion process is performed to diffuse the first dopant into a non-tip portion of the first fin, and to diffuse the second dopant into a non-tip portion of the second fin.
US09659771B2
Embodiments of the disclosure relate to deposition of a conformal organic material over a feature formed in a photoresist or a hardmask, to decrease the critical dimensions and line edge roughness. In various embodiments, an ultra-conformal carbon-based material is deposited over features formed in a high-resolution photoresist. The conformal organic layer formed over the photoresist thus reduces both the critical dimensions and the line edge roughness of the features.
US09659765B2
Embodiments described herein generally relate to methods for processing a dielectric film on a substrate with UV energy. In one embodiment, a precursor film is deposited on the substrate, and the precursor film includes a plurality of porogen molecules. The precursor film is first exposed to UV energy at a first temperature to initiate a cross-linking process. After a first predetermined time, the temperature of the precursor film is increased to a second temperature for a second predetermined time to remove porogen molecules and to continue the cross-linking process. The resulting film is a porous low-k dielectric film having improved elastic modulus and hardness.
US09659764B2
To address the needs in the art, a method of cleaving substrate material that includes forming an initial crack in a bulk substrate material, where the crack is aligned along a cleaving plane of the bulk substrate material, aligning the cleaving plane between two parallel electrodes in a controlled environment, wherein the parallel electrodes include a top electrode and a bottom electrode, where the cleaving plane is parallel with the two parallel electrodes, where a bottom portion of the bulk substrate material is physically and electrically connected to the bottom electrode, and applying a voltage across the two parallel electrodes, where the voltage is at least 50 kV and establishes a uniform electromagnetic force on the top surface of the bulk substrate material, where the electromagnetic force is capable of inducing crack propagation along the cleaving plane and separating a cleaved substrate material from the bulk substrate material.
US09659746B2
According to one embodiment, a method of adjusting a charged particle beam drawing apparatus includes obtaining an offset amount in beam size to be set in the charged particle beam drawing apparatus. The method includes forming a linear evaluation pattern on a substrate by changing number of divisions of a beam with a predetermined size and performing drawing by using divided beams, obtaining a change amount in a line width of the evaluation pattern from a design dimension for each number of divisions, and calculating the offset amount by fitting a model function to the change amount for each number of divisions, the model function being obtained by modeling a pattern line width based on a distribution of energy given by charged particle beams.
US09659739B2
An apparatus (210) and method for total or partial blanking of an electron beam (e) during a jump between the 2 or more positions of a dynamic focal spot (FP) movement in circumferential direction of the electron beam impinging on the focal track (FPTR) of a rotating target disk (230) of a X-ray tube (110). Alternatively the focal spot size can be increased during this short time interval. Overheating of the anode at the focal spot can be prevented.
US09659737B2
Microstructured, irregular surfaces pose special challenges but coatings of the invention can uniformly coat irregular and microstructured surfaces with one or more thin layers of phosphor. Preferred embodiment coatings are used in microcavity plasma devices and the substrate is, for example, a device electrode with a patterned and microstructured dielectric surface. A method for forming a thin encapsulated phosphor coating of the invention applies a uniform paste of metal or polymer layer to the substrate. In another embodiment, a low temperature melting point metal is deposited on the substrate. Polymer particles are deposited on a metal layer, or a mixture of a phosphor particles and a solvent are deposited onto the uniform glass, metal or polymer layer. Sequential soft and hard baking with temperatures controlled to drive off the solvent will then soften or melt the lowest melting point constituents of the glass, metal or polymer layer, partially or fully embed the phosphor particles into glass, polymer, or metal layers, which partially or fully encapsulate the phosphor particles and/or serve to anchor the particles to a surface.
US09659731B2
A portable actuator and safety switch assembly wherein the portable actuator includes a housing and an actuator for selectively engaging with a control mechanism of said safety switch. The actuator is at least one of partially located within the housing, forms a part of the housing, or is attached to the housing. The assembly includes a controller that controls a configuration of the actuator assembly, such that the actuator assembly can selectively and controllably attain a first configuration wherein the actuator is able to interact with the control mechanism of the safety switch and a second configuration wherein the actuator is unable to manipulate the control mechanism of said safety switch.
US09659726B2
A switching device having an arc quenching chamber, a fixed contact element and a movable contact element movable in a sliding contact between untripped and tripped positions within the chamber. A plurality of centering structures are arranged on the walls of the arc quenching chamber for centered guiding movement of the movable contact element as it moves from its untripped position to its tripped position. The centering structures may be fabricated unitarily with the chamber walls, as of plastic, and are arranged in parallel and spaced apart relation to one another.
US09659723B2
An accessory may be provided with a button controller having a microphone and switches. Plastic structures for the accessory may be formed by injection molding. Plastic structures may be molded around switch terminals. Switches may be formed using dome switch members and the switch terminals. A printed circuit with components may be mounted in the plastic structures. Recesses in the structures may be configured to receive the dome switch members, components on the printed circuit board, and wires in a cable. A backplate may be used to cover the printed circuit. A layer of plastic may be molded over the backplate to seal an interface created by the backplate. Cable strain relief structures may be molded into the layer of plastic. A lip on the strain relief structures may prevent particles from entering the controller.
US09659719B2
A display switch includes a holding portion that formed by a light guide member and adapted to hold a held portion, and a display portion that is integrally formed with the holding portion by the light guide member, is embedded in a light shielding portion, and emits light by guiding a light irradiated to the holding portion.
US09659714B2
A solid electrolytic capacitor comprises insulating substrate having an upper surface and a lower surface, a capacitor element disposed on the upper surface, a positive electrode lead-out structure, a negative electrode lead-out structure, and an exterior body configured to cover the capacitor element on the upper surface. The capacitor element has a positive electrode member, a negative electrode member, and a dielectric member. The positive electrode lead-out structure has a positive electrode terminal formed on the lower surface of the insulating substrate and is electrically connected to the positive electrode member. The negative electrode lead-out structure has a negative electrode terminal formed on the lower surface of the insulating substrate and is electrically connected to the negative electrode member. The insulating substrate has a step portion made up of a recessed surface formed by recessing the upper surface and a projected surface formed by projecting the lower surface.
US09659709B2
A common mode filter and a manufacturing method thereof are disclosed. A common mode filter in accordance with an aspect of the present invention includes: a substrate: a filter layer disposed on the substrate and configured to remove a signal noise; an electrode column formed to be bent along a perimetric portion of the filter layer and electrically connected with the filter layer; an electrode pad formed to have a larger longitudinal cross-sectional area than the electrode column and integrally coupled on the electrode column; and a magnetic layer formed on a layer on which the electrode column and the electrode pad are formed.
US09659705B2
A method of producing a surface-mount inductor including an external electrode having high fixing strength with respect to an element body even in a high-humidity environment. The method includes the steps of: winding an electrically-conductive wire to form a coil; forming a core using a sealant primarily containing a metal magnetic powder and a resin in such a manner as to encapsulate the coil in the sealant while allowing each of opposite ends of the coil to be at least partially exposed on a surface of the core; reducing smoothness of a surface of at least a part of a portion of the core on which an external electrode is formed as compared to a surface therearound; and forming the external electrode on the core in such a manner as to be electrically conducted with the coil.
US09659687B2
A noise reduction cable includes an insulated wire including an insulator and a wire conductor, an outer circumference of which is coated with the insulator, a magnetic-material layer including a magnetic-material-containing member wound around an outer circumference of the insulated wire, a shield layer with which an outer circumference of the magnetic-material layer is coated, a magnetic-material-fixing-and-insulating tape layer that is disposed between the magnetic-material layer and the shield layer. The magnetic-material-fixing-and-insulating tape layer fixes the magnetic-material layer and insulates the magnetic-material layer and the shield layer from each other.
US09659679B2
A composite filar has a conductive core, an outer fatigue-resistant metallic layer and a diffusion barrier between the core and the fatigue-resistant layer to prevent intermetallic diffusion between the core and the fatigue-resistant layer.
US09659675B2
Disclosed is a fuel rod auto-loading apparatus for a nuclear fuel assembly, which disposes fuel rods in a fuel rod case in a bundle to assemble the fuel rods into the nuclear fuel assembly. The fuel rod auto-loading apparatus includes a fuel rod storage unit having a plurality of stacked racks for fuel rods, a fuel rod loading unit raised/lowered to the racks and transferring the fuel rods, a feeding unit placing the fuel rods in rows and loading the fuel rods into the fuel rod case, a fuel rod unloading unit selectively unloading some of the fuel rods stored in the fuel rod storage unit and transferring the fuel rods to the feeding unit, a fuel rod assembly lifter which is disposed parallel to the feeding unit, and a controller controlling driving of the fuel rod loading unit, the feeding unit, and the fuel rod unloading unit.
US09659674B2
A nuclear reactor having a penetration seal ring interposed between the reactor vessel flange and a mating flange on the reactor vessel head. Radial ports through the flange provide passage into the interior of the reactor vessel for utility conduits that can be used to convey signal cables, power cables or hydraulic lines to the components within the interior of the pressure vessel. A double o-ring seal is provided on both sides of the penetration flange and partial J-welds on the inside diameter of the flange between the flange and the utility conduits secure the pressure boundary.
US09659669B2
Provided are a method and an apparatus for repairing a memory cell in a memory test system. A test device detects a fail address by testing a memory device according to a test command, and temporarily stores the fail address in a fail address memory (FAM). The fail address is transmitted to the memory device according to a fail address transmission mode, is temporarily stored in a temporary fail address storage of the memory device, and is then stored in an anti-fuse array, which is a non-volatile storage device. To secure the reliability of data, stored data can be read to verify the data and a verification result can be transmitted in series or in parallel to the test device.
US09659667B2
A circuit for reading a one time programmable (OTP) memory includes a controller that receives a read input signal and generates a read delay signal, a read voltage signal, and a read latch signal; a read voltage generator that generates a read voltage based on the read voltage signal and outputs the read voltage to a detecting node; an OTP memory unit cell including a first electrode connected to the detecting node; a first detecting unit that determines a voltage at the detecting node; a determining unit that delays an output signal from the first detecting unit based on the read delay signal; and a latch unit that latches an output signal from the determining unit during a first delay time at a falling edge of the read input signal based on the read latch signal.
US09659665B1
The present invention relates to a sensing control signal generation circuit and a semiconductor memory device including the same. In an embodiment, a semiconductor memory device may include a memory block suitable for including a plurality of memory cells coupled in series and a plurality of cell strings respectively coupled to a plurality of bit lines, page buffers suitable for being coupled to the respective bit lines in response to a sensing control signal and each suitable for sensing a voltage of each of the bit lines transferred to a sensing node and storing data corresponding to the results of the sensing or temporarily storing data to be programmed into a selected memory cell, and a sensing control signal generation unit suitable for generating the sensing control signal having a form of a ramping signal rising at a constant slope during the program operation.
US09659664B1
A NAND flash memory device detects the occurrence of Cell Voltage Distribution Disruption Events (CVDDEs), such as a Partial Block Program (PBP) and Program-Read-Immediate (PM), and provides a way to dynamically adjust read voltage to account for CVDDEs. A read command includes extended addressing bits that are used when a CVDDE has occurred to access registers that indicate an adjustment to read voltage that is needed to accommodate the CVDDE. The read voltage is then dynamically adjusted to accommodate the CVDDE. When the CVDDE is no longer an issue, the read voltage is adjusted to its previous value before the CVDDE.
US09659658B2
A storage device includes a nonvolatile memory device and a memory controller is provided. The nonvolatile memory device includes a plurality of blocks. The memory controller is configured to detect, upon receiving a power-on signal, a partial block among the plurality of blocks. The partial block includes a first page incompletely programmed due to sudden power-off occurred to the storage device. The memory controller determines whether or not to perform a dummy program operation on the partial block, and programs a second page of the partial bock with dummy data. The first page is different from the second page.
US09659655B1
Semiconductor devices and methods of writing information to a memory cell include an n-type transistor connected to a first terminal. The n-type transistor is formed with a low injection-barrier material gate dielectric. A p-type transistor is connected in serial between the n-type transistor and a second terminal. The p-type transistor is formed with a low injection-barrier material gate dielectric. The first and second transistor share a common floating gate and a common output node.
US09659654B2
A method to prevent loss of data of transistor-based memory unit including bulk, source and drain formed on bulk and first tunnel oxide, floating gate, second tunnel oxide and control gate stacked up on channel between source and drain is disclosed to include steps of: erasing the floating gate, using weak electric field inject small amount of electrons into floating gate, enabling small amount of electrons to remain in floating gate to keep channel between source and drain electrically conducted, enabling small amount of electrons in floating gate to repel against electrons in first tunnel oxide and second tunnel oxide so as avoid electron accumulation in first tunnel oxide and second tunnel oxide and allow normal data access floating gate, and using electric field of normal write to inject electrons in floating gate so as to prevent channel conduction between source and drain and allow writing data into floating gate.
US09659650B2
A multistate register, comprising: a flip-flop that comprises a first latch, a second latch and an intermediate gate coupled between the first and second latches; multiple memristive devices; and an interface coupled between the multiple memristive devices and the flip-flop; wherein the multistate register is arranged to operate in a memristive device write mode, in a memristive device read mode and in a flip-flop mode; wherein when operating in the memristive device read mode, the interface is arranged to write to a first selected memristive device of the multiple memristive devices a first logic value stored in the first latch; wherein when operating in the memristive device write mode, the interface is arranged to write to the second latch a second logic value stored in a second selected memristive device of the multiple memristive devices; and wherein when operating on a flip-flop mode logic the interface is prevented from transferring values between the flip flop and the memristive devices.
US09659639B2
Apparatuses and methods for threshold voltage analysis are described. One or more methods for threshold voltage analysis include storing expected state indicators corresponding to a group of memory cells, applying a first sensing voltage to a selected access line to which the group of memory cells is coupled, sensing whether at least one of the memory cells of the group conducts responsive to the first sensing voltage, determining whether a discharge indicator for the at least one of the memory cells has changed responsive to application of the first sensing voltage, and determining that the first sensing voltage is the threshold voltage for a particular program state of the at least one of the memory cells.
US09659637B2
A storage device may include a processor and a memory device including a multilevel memory cell. The processor may correlate a first physical page address and a second physical page address, each address being associated with the multilevel memory cell. The processor also may apply a first read operation to the memory cell to determine a value of a first bit associated with the first physical page address. The processor additionally may apply at least a second read operation to the multilevel memory cell to determine a value of a second bit associated with the second physical page address. The processor may determine, based at least in part on the value of the first bit and the value of the second bit, a soft decision value associated with the second bit. The processor may verify the value of the second bit based at least in part on the soft decision value.
US09659631B2
A current sense amplifier may include one or more clamping circuits coupled between differential output nodes of the amplifier. The clamping circuits may be enabled during at least a portion of the time that the sense amplifier is sensing the state of a memory cell coupled to a differential input of the sense amplifier. The clamping circuits may be disabled during the time that the sense amplifier is sensing the state of a memory cell at different times in a staggered manner. The clamping circuits may be effecting in making the current sense amplifier less sensitive to noise signals.
US09659628B2
Disclosed are various embodiments related to stacked memory devices, such as DRAMs, SRAMs, EEPROMs, ReRAMs, and CAMs. For example, stack position identifiers (SPIDs) are assigned or otherwise determined, and are used by each memory device to make a number of adjustments. In one embodiment, a self-refresh rate of a DRAM is adjusted based on the SPID of that device. In another embodiment, a latency of a DRAM or SRAM is adjusted based on the SPID. In another embodiment, internal regulation signals are shared with other devices via TSVs. In another embodiment, adjustments to internally regulated signals are made based on the SPID of a particular device. In another embodiment, serially connected signals can be controlled based on a chip SPID (e.g., an even or odd stack position), and whether the signal is an upstream or a downstream type of signal.
US09659617B2
A clock control device is disclosed, which relates to a technology for changing a rising or falling edge trigger. The clock control device includes: a flip-flop configured to latch data in response to a delay clock signal; and a clock controller configured to output the delay clock signal by delaying a clock signal, and control the data to be triggered at a falling edge of the clock signal when the clock signal is input at a time earlier than the data.
US09659616B2
In an embodiment, an apparatus may include a plurality of circuit blocks, a plurality of fuses and circuitry. The circuitry may be configured to determine a state for each of the plurality of fuses in response to transitioning from an off mode to a first operating mode. A first number of circuit blocks may be enabled in the first operating mode. The circuitry may also be configured to initialize the first number of circuit blocks dependent upon the states of one or more of the plurality of fuses and to transition from the first operating mode to a second operating mode. A second number of circuit blocks, less than the first number, may be enabled in the second operating mode. The circuitry may also be configured to store data representing the states of a subset of the plurality of fuses into a first memory enabled in the second operating mode.
US09659615B1
A semiconductor device may include an input/output control signal generation circuit configured to generate at least one input control signal and at least one output control signal from a first control clock in response to a shifting control signal, a bank address latch circuit configured to generate a latch bank address signal by latching at least one bank address in response to the at least one input control signal and the at least one output control signal, a pipe latch circuit configured to generate an auto-precharge latch signal by latching an auto-precharge flag signal in response to the at least one input control signal and the at least one output control signal, and an auto-precharge signal generation circuit configured to generate at least one auto-precharge signal from the auto-precharge latch signal.
US09659612B1
A semiconductor memory apparatus may include a data storage region, a pipe register group, and an output driver. The data storage region may store data and output stored data as pipe input data. The pipe register group may include a plurality of pipe registers. In response to a plurality of coupling enable signals, a plurality of pipe input signals and a plurality of pipe output signals, the pipe register group may determine a number of pipe registers receiving the pipe input data and outputting pipe output data. The output driver may drive the pipe output data and transmit output data.
US09659604B1
A multi-time programmable memory (MTPM) memory cell and method of operating. Each MTPM bit cell including a first FET transistor and a second FET transistor having a first common connection, and said second FET transistor and a third FET transistor having a second common connection, said first and second connected FET transistors programmable to store a first bit value, and said second FET and said third connected FET transistors programmable to store a second bit value, wherein said first FET transistor exhibits a low threshold voltage value (LVT), said second FET transistor exhibits an elevated threshold voltage value HVT and said third FET transistor exhibits a threshold value LVT lower than HVT. The MTPM cell enables two bits of information to be stored as default bit values like an electrical fuse. To store opposite bit values, the LVT transistors are programmed such that their threshold voltage is higher than that of HVT.
US09659603B2
A power management circuit for an electronic device sequentially activates and/or deactivates electronic circuits of the electronic device. The power management circuit provides a first group of one or more circuit power management signals to activate and/or deactivate a first electronic circuit from among the electronic circuits. Thereafter, the power management circuit provides a corresponding power management signal from among a second group of the one or more circuit power management signals that corresponds to a portion of the first electronic circuit that has been activated and/or deactivated by the first group of the one or more circuit power management signals to activate and/or deactivate a portion of a second electronic circuit from among the electronic circuits. The power management circuit continues to sequentially provide each of the one or more circuit power management signals in a similar manner until the electronic circuits of the electronic device have been activated and/or deactivated.
US09659601B2
An apparatus is provided that includes a plurality of array dies and at least two die interconnects. The first die interconnect is in electrical communication with a data port of a first array die and a data port of a second array die and not in electrical communication with data ports of a third array die. The second die interconnect is in electrical communication with a data port of the third array die and not in electrical communication with data ports of the first array die and the second array die. The apparatus includes a control die that includes a first data conduit configured to transmit a data signal to the first die interconnect and not to the second die interconnect, and at least a second data conduit configured to transmit the data signal to the second die interconnect and not to the first die interconnect.
US09659600B2
A classifier may be used to receive, via a website, user input associated with a product search of a user, and may be further used to identify a plurality of filters associated with the product search and predict a user-specific subset of the plurality of filters. Then, a filter manager may be used to provide a webpage of the website to the user, based on the user-specific filter subset.
US09659596B2
Systems and methods for encoding and playing back video at adjustable playback speeds by interpolating frames to achieve smooth playback in accordance with embodiments of the invention are described. One embodiment includes a source encoder that includes a processor, memory including an encoder application, where the encoder application directs the processor to: select a subset of frames from a first video sequence; generate motion vectors describing frames from the first video sequence that are not part of the selected subset of frames, where each motion vector describes movement between a frame in the subset of frames and a frame not included in the subset of frames; store the motion vectors; decimate frames not included in the subset of frames from the first video sequence to generate a second video sequence having a nominal frame rate less than the frame rate of the first video sequence; and encode the second video sequence at the nominal frame rate.
US09659594B2
In one example, a head is provided that may include a slider body, a transducer body, a transducer connected to the transducer body, and an interleaver assembly interconnecting the slider body and the transducer body. The interleaver assembly may include an interleaver body to which the transducer body is attached, the interleaver body having a plurality of geometric features that enable temporary deformation of the interleaver body in response to exertion of a force on the interleaver body, and the interleaver body may further include piezoelectric elements positioned in the interleaver body, the piezoelectric elements operable such that, when selectively actuated, the piezoelectric elements exert a force on the interleaver body so as to effect selective movement of the transducer with respect to a surface of a medium.
US09659593B2
According to one embodiment, a method for processing data includes directing first data through a first FIR gain module in response to a determination that the first data is being read from a magnetic tape medium in an asynchronous mode to control FIR gain of the first data. The method also includes directing second data through a second FIR gain module in response to a determination that the second data is being read from the magnetic tape medium in a synchronous mode to control FIR gain of the second data. Other systems and methods for processing data using dynamic gain control with adaptive equalizers are presented according to more embodiments.
US09659582B2
A method of manufacturing an electronic device includes a positioning step of positioning a first member supporting a laser diode with respect to a second member having a waveguide, a bonding step of bonding the first member and the second member together, and a checking step of checking the accuracy of positioning of the first member with respect to the second member. In the positioning step, the laser diode is energized to allow laser light to be emitted, and the laser light is allowed to be incident on the incidence end of the waveguide. In the bonding step, a bonding material is melted by irradiating the first member with heating light while the laser diode is not energized. In the checking step, the laser diode is energized again.
US09659579B2
The present invention relates to a method of evaluating intelligibility of a degraded speech signal received from an audio transmission system conveying a reference signal. The method comprises sampling said reference and degraded signal into frames, and forming frame pairs. For each pair one or more difference functions representing a difference between the degraded and reference signal are provided. A difference function is selected and compensated for different disturbance types, such as to provide a disturbance density function adapted to human auditory perception. An overall quality parameter is determined indicative of the intelligibility of the degraded signal. The method comprises determining a switching parameter indicative of audio power level of said degraded signal, for performing said selecting.
US09659575B2
The signal processor suppresses noise components contained in input sound signals by iterative spectral subtraction. The processor derives coherence from first and second directional signals having directivity characteristics on the basis of a pair of input sound signals, and controls the times of iteration of spectral subtraction on the basis of the coherence, thereby suppressing the noise components contained in the input sound signals.
US09659573B2
The present invention relates to a signal processing apparatus and a signal processing method, an encoder and an encoding method, a decoder and a decoding method, and a program capable of reproducing music signal having a better sound quality by expansion of frequency band.A high band decoding circuit decodes high band encoded data outputs a coefficient table having coefficients for the respective high band sub-bands, which are specified by a coefficient index obtained as a result of decoding. A decoding high band sub-band power calculation circuit calculates decoded high band sub-band powers for the respective high band sub-bands based on low band signals and the coefficient table, and a decoded high band signal production unit produces decoded high band signals from these decoded high band sub-band powers. At this time, an extension and reduction unit newly produces or deletes coefficients of the coefficient table for the respective sub-bands to correspond to the number of sub-bands of the calculated decoded high band sub-band powers, thereby to extend or reduce the coefficient table. The present invention can be applied to a decoder.
US09659562B2
A system estimates environment-specific alterations of a user sound received at the system. The system modifies the received user sound to formulate a modified user sound by at least compensating for the audio modifications and/or formulates an expected audio model of a user by modifying a stored user-dependent audio model of the user with the audio modification. The system is also capable of estimating whether the received user sounds is from a particular user by use of a corresponding user-dependent audio model.
US09659556B1
A method of repairing an acoustic core cell of an acoustic sandwich panel is provided. The method comprises inserting a core repair splice adjacent to a number of damaged walls of the acoustic core cell of the acoustic sandwich panel, nesting the core repair splice onto the number of damaged walls, and bonding the core repair splice to the number of damaged walls and thereby to repair the acoustic core cell of the acoustic sandwich panel.
US09659554B1
An upper plate and a similarly configured lower plate each have a serpentine forward edge, a linear rearward edge, a left edge, a right edge, an upper surface, and a lower surface. The upper and lower plates each have a whistle section and a laterally spaced bottle-opener section. A C-shaped bend couples the upper and lower plates. An upper hole extends through the upper plate in the whistle section. An axially aligned lower hole extends through the lower plate in the whistle section. A J-shaped notch extends through the upper plate and the lower plate and the C-shaped bend at the rearward edge in the bottle-opener section.
US09659546B2
A display apparatus includes a detector configured to detect an infrared ray emitted from a human body; a state signal generator configured to generate a state signal including at least one of a first state signal component indicating that the human body is approaching the detector and a second state signal component indicating that the human body is leaving from the detector in response to an intensity variance of the infrared ray detected with the detector; and a controller configured to start controlling an external device upon detecting the first state signal component from the state signal generated by the state signal generator but to stop controlling the external device upon detecting the second state signal component from the state signal.
US09659545B2
A display apparatus includes a display panel and a light source part. The display panel includes a first subpixel having a first color, a second subpixel having a second color and a transparent subpixel. The light source part provides a light to the display panel. The light source part includes a first light source generating a first light having a mixed color of the first primary color and the second primary color and a second light source generating a second light having a third primary color. At least one of the first and second light sources are repeatedly turned on and off.
US09659544B2
Described herein are systems and methods that reduce power consumption for an electronics device including a display. The systems and methods alter video information in a display area and reduce power for a display device when a graphics item is enlarged and the enlargement threatens to increase perceived luminance for the graphics item or increase aggregate luminance for the display area. Altering the video information reduces the luminance of video information in at least the graphics item when enlarged. This may offset perceived luminance gained by human visual processing when an item increases in size. If the graphics item is smaller than the display area after enlargement, then other video information in the display area may also be altered to conserve power.
US09659542B2
A gate driver includes multiple stages. Each stage has a circuit portion and a wiring portion. The wiring portion delivers first and second clock signals to the circuit portion. Further, the wiring portion includes first and second clock wirings receiving the first and second clock signal, respectively, first connecting wirings electrically connecting the first clock wiring with a first every other stage, and second connecting wirings electrically connecting the second clock wiring with the odd-numbered stages. Further, the wiring portion includes third connecting wirings electrically connecting the first connecting wiring with a second every other stage and fourth connecting wirings electrically connecting the second connecting wiring with the even-numbered stages. This configuration may prevent the gate driver from operating erroneously and reduce power consumed by the gate driver.
US09659534B2
Subject matter disclosed herein relates to addressing schemes that reduce visual artifacts and power consumption in electrowetting display devices. The electrowetting display comprises a first substrate and a second substrate opposite to the first substrate, wherein a plurality of pixel regions are defined between the first substrate and the second substrate. The electrowetting display further comprises a first fluid within the pixel regions and a second fluid on the first fluid, wherein the second fluid is immiscible with the first fluid. The electrowetting display also comprises a timing controller that includes a memory. The timing controller is configured to drive the plurality of pixel regions with one or more addressing schemes that control rates of driving the plurality of pixel regions.
US09659531B2
In a display device, pixels each including first to fourth subpixels that respectively display first to third primary colors and fourth color are arranged on an image display panel. A lighting unit emits light to the panel from the rear thereof. A control unit calculates a required luminance value for each block of the display surface of the panel based on an input image signal, determines a light source lighting amount of the lighting unit based on luminance distribution information on the lighting unit so as to satisfy the required luminance value, generates luminance information on each pixel based on the luminance distribution information and light source lighting amount, generates an output image signal that drives the subpixels based on the luminance information and input image signal, controls the lighting unit by the light source lighting amount, and controls the panel by the output image signal.
US09659530B2
A display is disclosed. The display comprises a panel, a data driver and a scan driver. The panel comprises pixels, data lines and scan lines. The data lines transmit data signals to the pixels, and the scan lines transmit scan signals to the pixels. The data driver provides the data signals, and the scan driver provides the scan signals. The scan driver comprises a shift register circuit. The shift register circuit comprises an i+1th stage carry shift register, an ith stage carry shift register and a jth stage buffer shift register. The ith stage carry shift register generates an i+1th start signal to start the i+1th stage carry shift register, so that the i+1th stage carry shift register generates an i+2th start signal. The i+1th start signal starts the jth stage buffer shift register to generate a jth output signal.
US09659528B2
A method of compensating driving TFTs in an organic light emitting display device is discussed. According to an embodiment, the method includes applying a varied drain voltage to a drain of a specific driving TFT in one of a plurality of pixels; and compensating the specific driving TFT by the varied drain voltage, so as to maintain a constant drain-source voltage at the specific driving TFT.
US09659527B2
The OLED voltage of a selected pixel is extracted from the pixel produced when the pixel is programmed so that the pixel current is a function of the OLED voltage. One method for extracting the OLED voltage is to first program the pixel in a way that the current is not a function of OLED voltage, and then in a way that the current is a function of OLED voltage. During the latter stage, the programming voltage is changed so that the pixel current is the same as the pixel current when the pixel was programmed in a way that the current was not a function of OLED voltage. The difference in the two programming voltages is then used to extract the OLED voltage.
US09659514B2
Disclosed herein is a display device for determining whether or not ghost exists in a unit of a block to perform ghost cancellation, and a control method of the display device. According to an embodiment, the display device includes: a screen configured to display an image; a calculator configured to partition the screen into a plurality of blocks and determine whether or not ghost exists in at least one block of the blocks; and a controller configured to cancel ghost existing in the at least one block in response to the calculator determining that the ghost exists in the at least one block of the blocks.
US09659498B2
A mirror reflective element sub-assembly for a vehicular exterior rearview mirror assembly includes a mirror reflective element, a mirror back plate, and a blind zone indication module. The module includes a first portion disposed at an aperture through the back plate and an internal structure that has reflective surfaces and at least one aperture. A circuit board is disposed at a second portion of the housing such that at least one light emitting diode is disposed at a respective aperture of the internal structure. The reflective surfaces are configured so that light emitted by the light emitting diode is generally directed towards the side of the vehicle. The circuit board is disposed at the second portion such that electrically conductive terminals of the circuit board are disposed in a connector portion that is configured to connect to a connector of a wire harness of the exterior rearview mirror assembly.
US09659497B2
A lane departure warning system includes an image photographing unit attached to a front of a vehicle to photograph an object in a forward direction of the vehicle; a driving unit receiving image data from the image photographing unit, filtering the image data to search for a lane pair, converting an image coordinate of the image data into a real coordinate to calculate a lateral distance between the lane pair and the vehicle and to calculate a lateral speed of the vehicle, and generating a warning generating signal as a time of lane change elapses by obtaining the time of lane change; and a warning unit receiving the warning generating signal to generate a lane departure warning signal.
US09659492B2
In an embodiment, a system detects when vehicle bunching is about to occur or is already occurring within a given transit system. The system resolves the bunching using an event and tone based system which regulates the arrival and departure times of vehicles at vehicle stops. Also, an embodiment includes a method for receiving location information for a plurality of vehicles along a route, determining a relative distance between a first vehicle of the plurality of vehicles and at least a second vehicle of the plurality of vehicles as a function of the received location information, and generating an action signal for at least one of the plurality of vehicles located on the route, wherein the action signal is in response to the determined relative distance.
US09659483B2
A system includes a security monitoring device in a monitored physical location, a security processing system, and one or more mobile devices. The one or more mobile devices are configured to communicate with the security monitoring device over a network and the security monitoring device is configured to communicate with the security processing system via the network. The security monitoring device and the security processing system device are configured to arm and disarm based on geolocation data associated with at least one of the mobile user devices.
US09659477B1
Wearable electronic devices configured to connect to cellular network(s) via radio transceiver(s) and methods of using such devices are described herein. These wearable electronic devices receive data from a sensor and transmit the data or a notification regarding the data via the radio transceiver. The wearable electronic devices can also provide feedback to the user regarding the data collected, or regarding indications received via the radio transceiver from a third party provider, including a cloud service. Further, the wearable devices may be customizable such that additional functionality may be added by downloading additional software applications and/or by the addition of physical modules, such as those containing additional sensors.
US09659470B2
A window or door position detector includes an RFID tag attachable to a window or a door and a transceiver. The transceiver emits an activating signal to the tag. The tag, in turn, responds with an identifying RF signal indicative of a predetermined position of the window or the door. The detector includes a transceiver that can communicate with both the tag and a displaced monitoring system control panel.
US09659468B2
A method for providing haptic feedback is provided for a device that produces haptic noise, such as a power tool with an electric motor that produces noises and vibrations while in operation. An environmental condition of the device can be sensed while the device is being operated and generating haptic noise. A haptic noise characteristic of the device can be determined. A haptic drive signal based on the environmental condition and haptic noise characteristic can be generated. The haptic drive signal can be applied to a haptic output device associated with the device.
US09659466B1
A display device includes a chassis, an electronic module, and a waterproof breathable member. The chassis has a front frame and a rear cover installed on the front frame. The rear cover has a plurality of heat-dissipating holes and an intake port, and the chassis is configured to allow a heat-dissipating airflow to pass through the accommodating space via the heat-dissipating holes and the intake port. The electronic module arranged in the chassis has a circuit board, and the heat-dissipating holes are arranged above the circuit board. The waterproof breathable member is disposed on an inner surface of the rear cover and entirely shields the heat-dissipating holes, so the heat-dissipating airflow only passes through the waterproof breathable member when the heat-dissipating airflow flows out of the chassis via the heat-dissipating holes. The waterproof breathable member is configured to avoid any liquid flowing into the chassis via the heat-dissipating holes.
US09659464B2
A monitoring system for a user terminal, wherein the user terminal comprises at least one application for controlling a user transaction or interaction process of the user terminal, the user transaction or interaction process comprising providing content data to a hardware device of the user terminal and outputting the content data to the user by the hardware device, and the monitoring system comprises monitoring means for monitoring the content data and determining a state of the user transaction or interaction process from the content data.
US09659459B2
In a first aspect, the invention provides a game server configured to communicate during use with at least one player terminal, each of which is configured to facilitate play of a centrally drawn game, the game server configured to: determine that a win rule of the centrally drawn game has been satisfied; determine a prize corresponding to satisfaction of the win rule; and find a probabilistic game instance having a prize outcome corresponding to the prize, at least in part, by executing one or more probabilistic game instances to attempt to find a probabilistic game instance having a prize outcome corresponding to the prize.
US09659448B1
The present invention provides methods and systems for monetizing virtual poker winnings that include selecting a first plurality of contestants for participation in a virtual poker tournament; conducting the virtual poker tournament, wherein each one of the first plurality of contestants play in the virtual poker tournament using a device operatively coupled to the computer system via an internet connection, and wherein no prizes are awarded in relation to the conducting of the virtual poker tournament; selecting a subset of the first plurality of contestants to form a second plurality of contestants, wherein the second plurality of contestants qualifies for entry to a live poker tournament, and wherein the selecting of the subset of the first plurality of contestants is based at least in part on performance in the virtual poker tournament; conducting the live poker tournament; and awarding prizes to a subset of the second plurality of contestants.
US09659446B2
Software on a server and/or client device causes a view in a graphical user interface (GUI) for a game to be displayed to a user. The game is an online gambling game for real money. The software receives input from the user. The input includes a wager and play according to game mechanics for the game. The software calculates a payout from the play. The payout includes a promotional payout that depends at least in part on a measure of social activity associated with the user or a measure of social influence associated with the user. And the software broadcasts the payout to at least one other person who is a social relation of the user.
US09659444B2
Gaming systems and methods for providing a customer with additional non-cashable credits upon completion of the game are provided herein. The gaming machine includes a game controller that is configured to receive a player input to play a wagering game on the gaming machine. The game controller is also configured to generate results for the wagering game, wherein the results include credits won or lost. The game controller is configured to add or subtract the credits won or lost to the player's total credit balance and provide the player with an amount of additional non-cashable credits upon ending the game, wherein the player must forgo a portion of their remaining credits in order to receive the amount of additional non-cashable credits, and wherein the non-cashable credits cannot be used with the same or another gaming machine without an additional input of currency into the gaming machine by the player.
US09659443B2
Systems and methods are disclosed for electronically transferring currency from a source user account to a target user account in relation to a game application. A payment service provider may receive a request to transfer an amount of currency from the source user account to the target user account to be used for the game application.
US09659434B2
Modular wagering game machine signage is described herein. In some embodiments, a modular wagering game machine sign can include a center module including a plurality of support members, at least one outer panel covering the frame, and a lighted faceplate including lighting units. The lighting units can include light emitting diodes (LEDs) and globes. The sign can also includes at least one side module connected to the center module via hand-spinning latches configured to press against one or more of the center module s support members.
US09659432B2
A gaming system includes at least one light pipe which splits, reflects, and propagates light provided from one or more internal light sources to a plurality of external regions of the gaming system. The light sources may include sets of LEDs which deliver light via multiple light pipes or differing sections of the same light pipe, in varying configurations. Each light pipe may utilize a light splitter-reflector to receive, split, direct, propagate, and emit light from one or more sections of internally positioned light sources, simultaneously projecting decorative lighting to multiple exterior surfaces and regions of the gaming system. Light pipe assemblies may be constructed from modular pieces which include a separate light splitter-reflector, or from a single piece of uniform material which splits, directs, and emits light. Variations of direct light, indirect (reflected) light, and combinations of both enable various lighting patterns on the exterior of gaming machines.
US09659428B2
A gaming system comprising a display, an object selector arranged to select at least one object to be placed in each container of a set of a plurality of containers displayed on the display and an outcome generator arranged to determine a game outcome based on at least one characteristic of the object or objects placed in at least part of each container of the set of containers.
US09659427B2
A vending machine comprises a robotic arm and a pick mechanism that is coupled to the robotic arm. The pick mechanism is configured to retrieve a vendible product in the vending machine, and the robotic arm is configured to locate the pick mechanism at a location with a x-y coordinate that corresponds to the vendible product. The pick mechanism comprises a first roller, a second roller, and a belt that mechanically links the first and second rollers by forming a loop around the first and second rollers. The belt has a first portion and a second portion on opposing sides of the loop, and the second portion of the belt is coupled to the robotic arm. The pick mechanism further comprises a motor that is configured to rotate the first roller in order to translate the first and second portions of the belt in opposite directions to each other. The pick mechanism further comprises a picker arm extending in the z direction. The picker arm has a proximal portion closest to the first roller and a distal portion furthest from the first roller. The proximal portion is coupled to the first portion of the belt in order to be moved in the z-direction as the first roller is rotated, and the distal portion comprises a product picker for releasably attaching to the vendible product.
US09659425B2
An electronic key supports a plurality of authentication methods and effectively prevents bidding-down attacks. For this purpose, security information is additionally provided by the electronic key, based on which a card reading device recognizes which authentication methods are supported by the electronic key. When the reading device recognizes based on said information that the electronic key supports a stronger second authentication method, but the authentication method was not recognized by the card reading device, the electronic key is, for example, rejected.
US09659416B2
There is provided a heat flux sensor with first and second interlayer connection members composed of different metals from each other of which metal atoms maintain a predetermined crystal structure embedded in first and second via holes of a thermoplastic resin made insulating substrate, the first and the second interlayer connection members are connected in series alternately, and a control unit that performs abnormality determination of a heating element disposed in a vehicle. The heat flux sensor is provided to the heating element and outputs a sensor signal corresponding to heat flux between the heating element and an outside air, and the control unit determines based on the sensor signal that there is abnormality in the heating element when the heat flux between the heating element and the outside air is out of a predetermined range.
US09659410B2
An augmented reality system is provided and a method for controlling an augmented reality system are provided. The augmented reality system, for example, may include, but is not limited to a display, a memory, and at least one processor communicatively coupled to the display and memory, the at least one processor configured to generate image data having a first resolution at a first rate, store the generated image data in the memory, and transfer a portion of the generated image data having a second resolution to the display from the memory at a second rate, wherein the second rate is faster than the first rate and the second resolution is smaller than the first resolution. This dual rate system then enables a head-tracked augmented reality system to be updated at the high rate, reducing latency based artifacts.
US09659408B2
A system, apparatus, method, computer program product, and computer readable storage medium provide the ability to reconstruct a surface mesh. Photo image data is obtained from a set of overlapping photographic images. Scan data is obtained from a scanner. A point cloud is generated from a combination of the photo image data and the scan data. An initial rough mesh is estimated from the point cloud data. The initial rough mesh is iteratively refined into a refined mesh.
US09659407B2
A graphics processing unit (GPU) is provided to preemptively flush one or more bins. The GPU generates bin data of a display area according to an association of primitive data with the bins that correspond to the display area. Upon detecting an adaptive condition, a signal is generated to indicate that one or more bins of a first frame are to be flushed in a first order before the first frame is fully binned. The signal interrupts bin flush of a second frame in a second order in order to flush the one or more bins of the first frame in the first order. After the one or more bins of the first frame are flushed, the bin flush of the second frame is resumed in the second order.
US09659404B2
The disclosure provides an approach for rendering images which include subsurface scattering effects. In one aspect, a shader computes subsurface scattering effects via a ray-tracing or point-based technique using a normalized diffusion profile. The shader may use the inverse of a cumulative density function associated with the normalized diffusion profile to determine, for each ray intersecting the surface, points on the surface at which to evaluate the normalized diffusion profile. To determine the lit surface of a pixel due to subsurface scattering, the shader may multiply the result of the integral of the normalized diffusion profile for each of the R, G, and B color components by corresponding components of a diffuse color constant. Further, the shader may scale the integral of the normalized diffusion profile based on a scaling function which accounts for a forward-scattering nature of a medium and compensates for out-of-plane scattering.
US09659393B2
According to one embodiment, a given tile, made up of pixels or samples, may be of any shape, including a square shape. These pixels may contain colors, depths, stencil values, and other values. Each tile may be further augmented with a single bit, referred to herein as a render bit. In one embodiment, if the render bit is one, then everything is rendered as usual within the tile. However, if the render bit is zero, then nothing is rasterized to this tile and, correspondingly, depth tests, pixel shading, frame buffer accesses, and multi-sampled anti-aliasing (MSAA) resolves are not done for this tile. In other embodiments, some operations may be done nevertheless, but at least one operation is avoided based on the render bit. Of course, the render bits may be switched such that the bit zero indicates that everything should be rendered and the bit one indicates more limited rendering.
US09659380B1
A method includes tracking positions of object(s) in video frames, including: processing an initial frame of a set of frames of the video frames using feature extraction to identify locations of features of the object(s), obtaining a next frame of the set and applying a motion estimation algorithm as between the next frame and a prior frame to identify updated locations of the features in the next frame, where locations of the features as identified based on the prior frame are used as input to the motion estimation algorithm to identify the updated locations of the features in the next frame based one searching less than an entirety of the next frame. The tracking further includes recognizing occurrence of an event, halting the iteratively performing, and repeating, for at least one subsequent set of frames, the processing an initial frame and the using motion estimation.
US09659376B2
When a positional relationship between reference blocks differs from a positional relationship between comparison blocks, a filtering device replaces the corresponding comparison blocks to update positional relationship information (order of correlations and the positional relationship thereof) into a state where the information should be and, thus, appropriately derives a difference value of an object so that the positional relationship between the reference blocks become identical to the positional relationship between the comparison blocks.
US09659371B2
A system and method for online projector-camera calibration from one or more images is provided. The system comprises: a projector, a camera, and a calibration device configured to: determine a map between pixels of each of a projector image and a camera image in fewer than one hundred percent of pixels of the projector image using feature extraction; determine an initial estimate of a fundamental matrix from the map; determine an initial guess of intrinsic properties of the projector and camera using one or more closed-form solutions; iteratively determine an error-function based on the map using the fundamental matrix while adding constraints on the intrinsic properties using the one or more closed-form solutions, and the initial estimate and guess as initial input; and, when the error-function reaches an acceptance value, determine intrinsic and extrinsic properties of the projector and the camera from current values of iterative estimates.
US09659370B2
The present invention relates to a method for segmenting MR Dixon image data. A processor and a computer program product are also disclosed for use in connection with the method. The invention finds application in the MR imaging field in general and more specifically may be used in the generation of an attenuation map to correct for attenuation by cortical bone during the reconstruction of PET images. In the method, a surface mesh is adapted to a region of interest by: for each mesh element in the surface mesh: selecting a water target position based on a water image feature response in the MR Dixon water image; selecting a fat target position based on a fat image feature response in the MR Dixon fat image; and displacing each mesh element from its current position to a new position based on both its water target position and its corresponding fat target position.
US09659367B2
A system and method tracks touches in a healthcare environment in order to analyze paths of transmission and contamination for the purpose of eliminating and containing transmission of colonizing, drug-resistant pathogens. Touches are identified and tracked with the use of recording devices. Each touch is logged and a touch graph is generated to identify transmission paths.
US09659362B2
Disclosed herein are methods and systems for generating a fingerprint for verification of a reference object, such as a layer or ply during a composite laminate layup procedure. An exemplary method includes the steps of generating at least one reference image of a reference object; removing lighting effects from the at least one reference image to create at least one processed image; generating a reference fingerprint for the reference object based on the at least one processed image; generating at least one candidate image of a candidate object; generating a candidate fingerprint for the candidate object based on the at least one candidate image; and comparing the candidate fingerprint and the reference fingerprint to determine a correlation. An alert is generated based on the comparison. The alert is indicative that the correlation between the candidate fingerprint and the reference fingerprint exists.
US09659360B2
For identifying an original object comprising a surface essentially made of a first substance in a forgery-proof way, atoms of a second substance not soluble in the first substance are deposited on the surface. The surface is subjected to a beam of energized atoms providing movability to the atoms of the second substance in the surface to allow for a nucleation of a phase separation of a phase, in which the atoms of the second substance are concentrated. Then, an image of a surface pattern originating from the nucleation of the phase separation is taken and stored as a identifier for the original object. When a comparison image of a surface pattern of some object supposed to be the original object is compared to the identifier, the object is confirmed as being the original object, if the surface patterns in the identifier and the comparison image are identical.
US09659357B2
A mounting control device including an error detection device which detects an error based on image processing data and a component image taken of the component; and a data creation device which creates image processing data based on a component image, is provided. Processing of creating image processing data is performed automatically at a component mounting machine. Accordingly, because an operator does not need to perform work of creating image processing data, the work load on the operator may be reduced, and it is possible to improve work efficiency and productivity.
US09659356B2
An image blur correction apparatus, comprises a blur correction amount calculation unit configured to calculate a blur correction amount based on a shake amount of the apparatus; an estimation calculation unit configured to calculate an estimated value of the blur correction amount using a blur correction amount calculated up until a previous time; a correction unit configured to correct an image blur by cutting out an image using the blur correction amount or the estimated value; and a determination unit configured to determine whether or not to calculate the estimated value in accordance with a frame rate of a moving image.
US09659355B1
A method, a system, and computer program product for correcting image artifacts in image data captured by a camera sensor in conjunction with a flash. The method includes extracting, from a buffer, an image data captured by at least one camera sensor. The method then includes determining, from a metadata of the image data, a face in the image data and a position of a first eye and a second eye. The method then includes selecting at least one region of interest around at least one of the first and the second eye based on a size of the face and a distance between the eyes. In response to selecting the at least one region of interest, at least one correction is applied to the at least one region of interest to reduce or eliminate the appearance of at least one image artifact in the image data.
US09659349B2
A system identifies a scaling position in a captured image, and identifies red subpixels adjacent to the scaling position. The system computes a scaled red subpixel for the scaling position based on the identified red subpixels according to constraints. The system further computes a scaled blue subpixel based on identified adjacent blue subpixels, according to constraints, and computes a scaled green subpixel position based on Gr and Gb subpixels adjacent to the scaling position according to certain constraints. The system then generates a scaled image representative of the captured image, the scaled image including at least the scaled red subpixel value, the scaled blue subpixel value, and the scaled green subpixel value.
US09659346B2
An image processing apparatus includes: a target position selecting unit to select a pixel position on an input image, as a target position; a candidate line setting unit to set two or more sets of candidate lines including a pixel with a value, in the vicinity of the target position; a weighted-value calculating unit to calculate a weighted value that corresponds to a degree of expectation that the target position and the pixel position on the candidate line are on the same pattern; a direction classifying unit to selectively determine a set of candidate lines that are close to a direction of a pattern of the target position in accordance with the weighted value of each pixel on the candidate lines; and a first interpolated-value calculating unit to calculate a pixel value of the target position in accordance with the weighted value of each pixel on the candidate lines.
US09659341B2
A texture pipe of a graphics processing unit (GPU) may receive a texture data. The texture pipe may perform a block-based operation on the texture data, wherein the texture data comprises one or more blocks of texels. Shader processors of the GPU may process graphics data concurrently with the texture pipe performing the block-based operation. The texture pipe may output a result of performing the block-based operation on the one or more texture data.
US09659332B2
A grid controller is communicably connected to controllers of a plurality of power storage units. The grid controller: obtains transmission power transmitted from the smart grid system to an external power system, the transmission power being a sum of electric power generated by power generating units, electric power consumed by loads in the smart grid system, and electric power charged into and discharged from the power storage units; calculates differential power between the transmission power and a smoothing operation output, the smoothing operation output being obtained by performing smoothing operation on the transmission power by using a smoothing filter; and performs control of smoothing the transmission power by performing allocation of the differential power of the transmission power in accordance with a charge-discharge state of each of power storage parts of the plurality of power storage units.
US09659331B1
A claim-based capitation model is proposed for handling vehicle repair insurance claims. Rather than determining a detailed estimate of the expected actual cost of repair, the estimate may be determined using a simpler model. For example, the insurance company and a repair facility may agree to following a predictive payment model in which the insurance company pays a fixed predicted capitated amount of money for each repair claim, regardless of the amount of repair work that will be needed. Alternatively, the insurance company may pre-pay a fixed capitated amount for a predicted number of future insurance claims.
US09659328B2
A method for executing a trade is provided that includes communicating financial information to a handheld device via a network, the financial information being associated with a trade that can be initiated by the handheld device. The handheld device is connected to the network via a Push to Trade™ protocol. The method also includes executing the trade on behalf of the end user.
US09659325B2
An announcement distributor distributes, or auctions an opportunity to distribute, an announcement to an announcement recipient such as a consumer, issuer, merchant, or acquirer within a payment processing system. The announcement when there has been a satisfaction of an announcement condition, such as the consumer being determined to be located within a predetermined spatial zone. The content of the announcement may, in turn, facilitate a subsequent cashless transaction for resources of merchants. Implementations describe various permutations of the content of the announcement, the announcement condition, and the announcement recipient.
US09659322B2
A pressure sensor measures the surface pressure distribution of a body supported by a surface, for example a person lying on a mattress. In one approach, a pressure mapping system acquires a customer's pressure map using a reference mattress and presents this pressure data in the form of a pressure map. The pressure map measurement data is then analyzed to determine body characterizing parameters such as body mass index, contact area and average peak pressure. The pressure map measurements are then located on a mattress category grid that has been referenced and aligned to a large population sample of measurements taken with a reference mattress. Alternatively, the pressure map measurements are matched to a physical profile category within a database. Each category provides ranked mattress recommendations based on selection and ranking criteria derived from pressure map data obtained from a large sample of test subjects. In this way, a customer's pressure map can be translated to a recommendation of specific mattresses or mattress categories that are offered by a mattress retailer or manufacturer.
US09659320B2
A method is disclosed for providing services to a patron of an establishment by providing to the patron a handheld device upon entering the establishment. The patron is identified such that the patron is associated with the handheld device provided thereto and the operation thereof. The patron is presented with available services of the establishment and, in association with the available services, parameterized information from a database is presented to the patron relating to prior actual experiences with at least one of the services as rated by the patron, which rating defines how the patron viewed the services at the time of such providing. The patron selects from the provided information one or more of the available services. As part of the parameterized information, prior selected and not yet rated services are also presented. The patron rates the prior selected and not yet rated services and the database is updated.
US09659318B2
Aspects of this invention disclose a system for providing a purchaser specified product search engine, including providing storage circuitry comprising a database of products, storing product data in the database, receiving from a prospective product purchaser, product data of a desired product to purchase, accessing the database of products and comparing the product data to product data in the database, and determining a probability that the product data matches product data stored in the database. Other aspects may include a data processing apparatus providing a purchaser specified product search engine, including storage circuitry comprising a database of product data, processing circuitry configured to receive purchaser specified product search inquiry data, accessing the database of product data, and comparing the purchaser specified product search inquiry data to the product data; and determining a probability that the prospective purchaser product data matches the product data stored in the database.
US09659316B2
Methods and systems for providing navigation functionality in a retail location using local positioning technology are presented. In some embodiments, a customer assistance computing platform may receive one or more attributes associated with a beacon signal received by a customer computing device and an identifier associated with the customer computing device. Subsequently, the computing platform may determine an identity of a customer using the customer computing device. The computing platform then may determine a location of the customer using the customer computing device based on the one or more attributes associated with the beacon signal. Thereafter, the computing platform may generate one or more navigation instructions to guide the customer to another location. Then, the computing platform may send the one or more navigation instructions to the customer computing device.
US09659314B2
Embodiments within describe a system and method of tagging network traffic with relevant user information for facilitating the delivery of directed media. In an embodiment, a user identifier is generated from user information. Network traffic from the user and bound for a destination site is tagged within a network routing device. The tagged traffic is tagged with a request identifier that has the user identifier encrypted in an alphanumeric string. The tagged network traffic is transmitted to the destination site. A request is received from the destination site to decode the tagged network traffic, retrieve stored user information, and transmit the stored user information to the destination site.
US09659312B1
A computer system includes a processor configured to receive one or more offers from one or more merchants, determine an offer from the one or more offers to present on a mobile device based on a characteristic of a user of the mobile device, receive a request for a code to provide to a merchant associated with the offer, the code being generated for the mobile device that belongs to the user, receive, from the mobile device, an indication from the user to use the offer that provides the user a discount from a price of a product or service, send to the mobile device, by an offer computer system, an offer code to be displayed on the mobile device and to be received by the merchant, aggregate a total amount of funds that the user has saved using a plurality of offers in the past, generate the code, including embedding in the code a transaction identification number, a geographic location of the mobile device, a date and a time, send the code to the mobile device for the merchant to scan and send to a financial institution to request funds from an account held by the user, receive a request for funds from the merchant that includes an address for the merchant and an amount of the transaction, and send the requested funds to the merchant upon verifying the offer was accepted by the user of the mobile device.
US09659307B2
Cookie derivatives and methods for generating cookie derivatives are provided. A cookie derivative comprises a transformation of at least one portion of data associated with a cookie (e.g., a name and/or data value). The cookie derivative may comprise a persistent or non-persistent cookie derivative that may be stored on a user's computing device (e.g., within a browser). The cookie derivative may alternatively comprise a virtual cookie derivative that is stored on a server (e.g., in a log file, a cache, or other data storage of the server).
US09659306B1
Marketing program data associated with a social group-based marketing program offered by a merchant is obtained. Access to social group identification data identifying two or more socially connected consumers and their respective financial data is obtained and analyzed to identify two or more spending and socially connected consumers. Two or more marketing program eligible spending and socially connected consumers who meet defined marketing program eligibility criteria are then identified and registered with the marketing program. Spending data associated with the registered spending and socially connected consumers is then monitored and when the spending data associated with the registered spending and socially connected consumers indicates the marketing program requirements of the social group-based marketing program have been met, the registered spending and socially connected consumers are provided the benefits of the social group-based marketing program.
US09659305B2
In one embodiment, a method includes receiving a packet flow associated with a click-through from an end user node destined for an advertiser server; extracting information from the packet flow; analyzing the extracted information to determine one or more characteristics of the packet flow; and classifying the packet flow based on the determined one or more characteristics; modifying the packet flow to include classification information to provide classification information indicating a quality level of the click-through. The packet flow may include a hypertext transfer protocol GET request. Modifying the packet flow may include adding a tag with classification information that indicates a likelihood of fraudulent click behavior associated with the packet flow.
US09659301B1
A mobile computerized apparatus configured to provide membership status in a roadside assistance program after occurrence of a roadside event is disclosed. The apparatus executes instructions that cause/allow the apparatus to receive input related to an electronic membership card, retrieve from a data store membership information associated with the vehicle, and dynamically update the electronic membership card for display on the apparatus.
US09659299B2
A customer feedback acquisition and processing system includes a data acquisition processor for receiving first and second customer feedback responses. The first customer feedback response is received by the data acquisition processor after notice of a claim is received and before the claim is resolved. The second customer feedback response is received by the data acquisition processor after it receives the first customer feedback response. The data acquisition processor may operate to classify the first customer feedback response in one of two categories. The two categories may be an attention-needed category and an attention-not-needed category. The system may also include a workflow router in communication with the data acquisition processor. The system may further include a supervisor terminal in communication with the workflow router.
US09659296B2
After sending a request to a payment module, via a first communication capability (e.g., BLE), to initiate a transaction with a payment accepting unit associated with the payment module, a mobile device with one or more processors, memory, one or output devices, and two or more communication capabilities obtains a notification from the payment module via the first communication capability. The notification indicates an event at the payment accepting unit associated with the payment module. In response to obtaining the notification, mobile device provides a representation of the notification to a user of the mobile device via the one or more output devices of the mobile device. For example, a message is displayed on a display of the mobile device, a vibration alert is produced by a vibration mechanism of the mobile device, an aural alert is produced by a speaker of the mobile device, and/or the like.
US09659294B2
Embodiments provide systems, methods, processes, computer program code and means for using mobile devices to conduct transactions with ATM devices.
US09659288B1
The present invention is generally a system and method for providing a measurement device with a point of sale (POS) receipt. In exemplary embodiments, a store such as a building supply store or hardware store, may implement POS devices configured to generate printed media that may be used by customers as a measuring tool. The measuring tool may comprise a printed sheet with measurement markings printed along a longitudinal border of the printed sheet adjacent to transactional information of a registered purchase, and or promotional information that may be relevant to the customer.
US09659280B2
Information sharing between meeting attendees during a co-located group meeting in a meeting space is democratized using a computer that is operating cooperatively with one or more object sensing devices in the meeting space to identify postures formed by the meeting attendees.
US09659279B2
A method and system is provided for the input of user interface commands. Particularly, command initiation events including at least one of: (i) a mouse press event on mouse pointer hardware, and (ii) at least one of a pen touch event, a stylus touch event, and a finger touch event on touch pointer hardware, are accepted. Then gesture stroke input events including at least one of: (i) a mouse drag event on the mouse pointer hardware, and (ii) at least one of a pen drag event, a stylus drag event and a finger drag event on the touch pointer hardware, are accepted. Additionally, command termination events including at least one of (i) a mouse release event on the mouse pointer hardware, and (ii) at least one of a pen lift event, a stylus lift event and a finger lift event on the touch pointer hardware, are accepted. The events are then interpreted as at least one of object selection or digital ink input operations without prior selection of a user input mode.
US09659277B2
According to some embodiments, a system may receive, from a remote insurance submitter, insurance data submitted via an electronic quoting and submission system in connection with behavioral data associated with the submitter. A processor may then automatically analyze the submitted insurance data based at least in part on information stored in a historic underwriting analytics database and the behavioral data associated with the submitter. Potentially inaccurate insurance data submitted by the insurance submitter may then be identified based on the analysis. According to some embodiments, a plurality of potentially inaccurate insurance data values may be used to flag the submitted insurance data, the insurance submitter, one or more input portions of the electronic quoting and submission system, and/or an insurance class of business.
US09659275B2
In some embodiments, methods and systems of managing products at a retail sales facility include scanning a product in a stocking cart at the retail sales facility using a hand-held electronic device including a processor. At least two of the following three functions may be performed based on the scanning of the product. First, the stocking cart may be audited by comparing scanned data to data contained in an inventory management database. Second, a determination of whether the item is on a pick list may be made, which may include determining a demand for the scanned product to arrive at a decision whether to store the product in the stock room or place it on a shelf on the sales floor. Third, if the item is to be stored in the stock room, a determination of whether identical items are stored in bins in the stock room may be made.
US09659272B2
A method and apparatus for attending to a supply of product at a position on a store shelf involves receiving an electronic image of the position on a store shelf and comparing the electronic image to a previous electronic image of the position on the store shelf. Depending of the difference, if any, between the two images, generating an indication to attend to the supply of product at the position on the store shelf.
US09659264B2
A licensing application implemented in a computational device receives a request to enable a feature for a logical volume of a plurality of logical volumes controlled by the computational device, wherein each feature of a plurality of features is configurable to be enabled or disabled for one or more logical volumes of the plurality of logical volumes. The licensing application determines, whether enabling the feature for the logical volume causes a licensed capacity limit for the feature to be exceeded. Enabling the feature for the logical volume is avoided, in response to determining that enabling the feature for the logical volume causes the licensed capacity limit for the feature to be exceeded.
US09659260B2
A software solution for managing, sorting and ranking lists of tasks and integrating task and time management, such that tasks can be automatically or manually assigned to specified time blocks. Users can monitor the relationship between volume of tasks and available time in which to complete them. The solution and method can be applied to individual task lists as well as to the management of time across multiple projects and can be employed either by individuals or by collaborative groups. The solution and method employ multiple filters, sorts and handling rules to embody users' personal planning preferences. It can be used to manage task lists both with and without employing a scheduling component. The solution can interoperate with existing computer- and web-based calendar software and can use third-party calendar clients to display its output and to accept input from users.
US09659259B2
Functionality is described herein for analyzing an input linguistic item, such as a query, in a series of stages. The linguistic item includes one or more candidate items. In a first stage, a brand classifier component determines whether the linguistic item specifies at least one brand, to provide a classifier output result. In a second stage, a tagging component generates a set of tags for at least some of the candidate items in the linguistic item, based, in part, on the classifier output result, to generate a tagging output result. An action-taking component then generates at least one result item based on the tagging output result. Functionality is also described herein for producing the brand classifier component and the tagging component using machine-learning training techniques. The training techniques may include provisions to address the later appearance of new brands that do not appear in a brand dictionary.
US09659256B2
The present disclosure discloses a network service recommendation method and apparatus, which belong to a network data analysis technology. The method includes: retrieving, according to a historical browsing record of a user during use of a network service, a label corresponding to each network service used by the user; determining, according to a preset label-topic correspondence, and by using the label corresponding to each network service used by the user, first n topics corresponding to the user; acquiring, according to a preset topic-network service correspondence, respective corresponding recommended network service lists of the first n topics, the recommended network service list of each topic including at least one network service; and recommending a network service to the user according to the respective corresponding recommended network service lists of the first n topics.
US09659255B2
Techniques described herein may be used to solve a stochastic problem by dividing the stochastic problem into multiple fragments. In some cases, each fragment may be related to a random variable that forms a part of the problem, such that each fragment may produce samples from a probability distribution for that variable. Each fragment of the stochastic problem may then be assigned to a configurable circuit to solve the stochastic fragment. Configurable circuits may be implemented using any suitable combination of hardware and/or software, including using stochastic circuitry. In some embodiments, stochastic circuitry may include a stochastic tile and/or a stochastic memory.
US09659253B1
A method, apparatus and computer program product for solving an optimization model by automatically creating alternative formulations, and solving those with parallel solution approaches communicating with each other. The method: automatically generates alternative formulations for a given optimization model; executes parallel communicating solution approaches in a parallel computing infrastructure in order to solve a given set of alternative model formulations; utilizes a mechanism to automatically detect the model structure and a mechanism to automatically detect the appropriate solution approach(es) for a given model structure, and to launch multiple parallel solution approaches at existing optimization solvers. The system and methods enable communication between parallel solution approaches in order to improve performance. The system communicates information between the parallel solution approaches during a solve process, in order to improve performance. The communicated information includes information on upper and lower bounds of running algorithms and information on decision variables values for feasible intermediate solutions.
US09659252B2
A computer-implemented method for determining elastic properties for a heterogeneous anisotropic geological formation is described herein. The method includes grouping sonic velocity data from a borehole section (or borehole sections) into a number of clusters (e.g., one or more clusters). The sonic velocity data is grouped into clusters using petrophysical log data from the borehole section. The method also includes inverting the sonic velocity data for the clusters to determine elastic properties for each cluster. In some cases, the elastic properties for the clusters are combined to determine a relationship between the elastic properties and formation heterogeneity.
US09659236B2
A system and method for training multiple pattern recognition and registration models commences with a first pattern model. The model is trained from multiple images. Composite models can be used to improve robustness or model small differences in appearance of a target region. Composite models combine data from noisy training images showing instances of underlying patterns to build a single model. A pattern recognition and registration model is generated that spans the entire range of appearances of the target pattern in the set of training images. The set of pattern models can be implemented as either separate instances of pattern finding models or as a pattern multi-model. The underlying models can be standard pattern finding models or pattern finding composite models, or a combination of both.
US09659233B2
The present invention provides a method and an apparatus for detecting a salient region of an image. Classification processing is obtained by means of pre-training, so as to obtain a classification label, where the classification label is used to indicate a salience detection algorithm for detecting a salient region of the test image. Salience detection is performed on the test image by using the salience detection algorithm indicated by the classification label, so as to obtain the salient region of the test image. Because a salience detection algorithm with the best detection effect is acquired by using the image feature vector of the test image, to detect the salient region of the test image, accuracy of salience detection is improved.
US09659230B2
The disclosed embodiments illustrate methods and systems for estimating a skew angle of an image. The method includes identifying a set of measurable blocks from one or more blocks in said image. The method further includes dilating each measurable block, in said set of measurable blocks, with a predetermined regular structure to create a set of modified measurable blocks. The method further includes selecting a second set of measurable blocks from said set of modified measurable blocks based on a size of each modified measurable block in said set of modified measurable blocks. Thereafter, the method includes determining a slope of each measurable block in said second set of measurable blocks. Further, the slope is utilizable to estimate said skew angle of said image. The method is performed by one or more microprocessors.
US09659226B2
An image processing apparatus is configured to extract contour information of a medium area from readout image data, and correct distortion of the medium area based on the contour information. The medium area is an area for image data corresponding to a medium serving as a reading target. The image processing apparatus includes an acquiring unit that acquires the readout image data, an extracting unit that extracts the contour information of the medium area from the readout image data, a displaying unit that displays the contour information so as to superpose the contour information on the readout image data, a detecting unit that detects an instruction of changing a position of the contour information. The extracting unit extracts again the contour information by reflecting the instruction of changing, and the displaying unit redisplays the contour information extracted again by the extracting unit.
US09659225B2
A “Food Logger” provides various approaches for learning or training one or more image-based models (referred to herein as “meal models”) of nutritional content of meals. This training is based on one or more datasets of images of meals in combination with “meal features” that describe various parameters of the meal. Examples of meal features include, but are not limited to, food type, meal contents, portion size, nutritional content (e.g., calories, vitamins, minerals, carbohydrates, protein, salt, etc.), food source (e.g., specific restaurants or restaurant chains, grocery stores, particular pre-packaged foods, school meals, meals prepared at home, etc.). Given the trained models, the Food Logger automatically provides estimates of nutritional information based on automated recognition of new images of meals provided by (or for) the user. This nutritional information is then used to enable a wide range of user-centric interactions relating to food consumed by individual users.
US09659215B2
A raster image processing method and a raster image processor validate content objects in a document based on similarity, especially on continuity, to convert the similar objects with one or more same parameters of an image manipulation method to achieve a correct reproduction of the document.
US09659205B2
Systems and methods are disclosed for obtaining at least a pair of biometric traits of a person and without contact with the person. In one embodiment a system is disclosed which makes use of a plurality of illumination modules and an imaging module, where a single image is acquired with a color encoded imaging sensor. Parallel and orthogonally polarized images are obtained by at least one sensor of the imaging module from illuminations produced by the illumination modules. A processing subsystem uses mathematical applied operations between the acquired images to selectively produce at least one image of at least one specific biometric trait, such as a finger print, a palm print, a finger-vein, a palm vein, or hand geometry. The biometric trait can be subsequently used for biometric verification and identification.
US09659196B2
A method for data verification may include: receiving by a radio frequency identification (RFID) tag a write command including data to be written; writing by said RFID tag said data to be written into a local storage; reading by said RFID tag data from said local storage; and carrying out by said RFID tag a data verification according to said data read out. Further, a data verification apparatus may include a receiving module for receiving a write command including data to be written; a writing module for writing said data to be written into a first storage module configured for storing said data to be written; a reading module for reading data from said first storage module; and a verifying module for carrying out verification according to the data read out by said reading module. Such method and apparatus may reduce the time of data verification by an RFID tag.
US09659192B1
A Secure Deterministic Fabric (SDF) switch architecture and design may provide a cost effective reconfigurable Multiple Single Levels (MSL) of Security implementation that is low risk to certify and may not require recertification after an initial certification evaluation. The SDF switch enables assignment of processing resources and attached payloads to a specific security level fabric for use by an operational system. The assignment of defined security levels is commanded by a SDF control and status module without changing certification, aircraft wiring, or revising hardware. The processing resources are statically assigned during power up on a per mission basis or dynamically reassigned between security levels during a mission as processing requirements may change as a result of mission stage. The SDF switch supports mission defined security configurations for individual security level operational payload processing.
US09659182B1
A method for protecting data files may include (1) identifying a data file to be protected against data loss, (2) identifying a set of software programs permitted to open the data file by (a) identifying a format of the data file and (b) identifying at least one software program capable of opening files of the format of the data file, (3) detecting an attempt to open the data file by a software program not included in the set of software programs, and (4) performing a security action in response to detecting the attempt to open the data file. Various other methods, systems, and computer-readable media are also disclosed.
US09659181B2
A system and method of dynamically altering the encoding, structure or other attribute of a cryptographic key, typically a license activation key, to render useless keys that have been created by illegal key generation “cracks”. An encoding/decoding engine provides a plurality of key obfuscation algorithms that may alter the structure, encoding or any other attribute of a given key. A changeable combination code is supplied to the encoding/decoding engine that specifies a subset of the algorithms to apply during the encoding or decoding phase. The encoding engine is used during key generation and the decoding engine used during key usage. The same combination code must be used during decoding as was used during encoding to recover the original key or a valid key will not be recovered. Thus, a system can be rapidly re-keyed by selecting a new combination of encoding/decoding algorithms. The selection of algorithms comprises a combination code. The new combination code will result in keys that are incompatible with any existing illegal key generators.
US09659176B1
The disclosed computer-implemented method for generating repair scripts that facilitate remediation of malware side-effects may include (1) identifying a potentially malicious file located on a computing system, (2) determining at least one potential side-effect of the potentially malicious file, (3) generating, based at least in part on the potential side-effect of the potentially malicious file, a repair script that facilitates remediation of the potential side-effect, and then (4) remedying the potential side-effect by directing the computing system to execute the repair script. Various other methods, systems, and computer-readable media are also disclosed.
US09659173B2
System and method for determining, by a security application, whether an examined software code is a malware, according to which the system detects whenever the examined process code performs system calls and further detects a call site. Pieces of code in the surrounding area of the site and/or in branches related to the site are analyzed and the properties of the analyzed pieces of code are compared with a predefined software code patterns, for determining whether the examined process code corresponds to one of the predefined software code patterns. Then the examined process code is classified according to the comparison results.
US09659148B2
An information technology system for a healthcare facility is provided. The system includes a first computer device to keep track of rounding intervals for caregivers and to determine whether the caregivers successfully complete their rounds in a timely manner for their assigned patients. The system also has a real time locating system (RTLS) that tracks locations of the plurality of caregivers and that is in communication with the first computer device. The system further has a number of graphical displays in communication with the first computer device. Each graphical display is operable to display a list of patients for whom rounds are due and to display reminder messages to the plurality of caregivers relating to rounding.
US09659146B2
This invention is a novel method for analysis of data that is produced by test equipment. The preferred embodiment is data produced by liquid chromatography tandem mass spectrometry (LC-MS/MS) equipment, using industry standard methods to generate the initial data from the test equipment. The invention is a method for processing of the data to promptly produce accurate, reliable, and meaningful data that can be used for critical decisions. The unique benefit of the method is to correct the multiple measurement and calculation errors that are inherent in the operation of laboratory equipment. Prior methods result in errors based on circumstances that are difficult to control, accuracy-related errors in machine measurements, and fundamental mathematical errors in the data processing software that is used with the laboratory equipment. As an added benefit, this novel method allows comprehensive simultaneous measurement and calculation of correlation of any and all peptide pairs in a single measurement, with the capability to support repeated measurements with changed conditions over time. This novel method allows robust, detailed, and comprehensive measurements of peptide activity and function, which results in substantial improvements over prior methods in accuracy, reliability, and efficiency.
US09659142B1
Disclosed are techniques for implementing trace warping for electronic designs. These techniques identify a portion of an electronic design including a set of signals of interest corresponding to a plurality of simulation combinations over a range of clock cycles in a trace display. A pair of matching simulation combinations is identified from one or more pairs of matching simulation combinations for the set of signals of interest; and a first clock cycle and a second clock cycle corresponding to the pair of matching simulation combinations are identified in the range of clock cycles. A plurality of clock cycles between the first clock cycle and the second clock cycle can be compressed in the trace display.
US09659133B2
A method is performed at least in part by at least one processor. In the method, a plurality of circuit elements are placed in a layout for a semiconductor device, the plurality of circuit elements having a plurality of pins. A layer assignment is generated to assign a plurality of interconnections to corresponding conductive layers of the semiconductor device, the plurality of interconnections connecting corresponding pairs of pins among the plurality of pins. The plurality of interconnections is routed in the layout in accordance with the layer assignment.
US09659130B2
According to example embodiments, a layout design system includes a processor, a storage module configured to store a standard cell design, and a generation module. The standard cell design includes an active area and a normal gate area on the active area. The generation module is configured to receive the standard cell design, to adjust a width of an active cut design crossing the active area of the standard cell design, and to output a chip design including a design element using the processor. The design element includes the active cut design having the width adjusted.
US09659123B2
Circuit design equipment may design logic for a circuit. The design equipment may discover optimized design constraints and an optimized clock signal frequency for the circuit. The design equipment may output the discovered optimized clock signal frequency and design constraints to circuit fabrication equipment for fabricating the corresponding circuit. The design equipment may discover the optimized clock signal frequency and design constraints by populating a cost function with different clock signal frequencies and different design constraint values. The cost function may be, for example, a multi-dimensional surface. The design equipment may identify a global minimum of the cost function and may identify the clock signal frequency and design constraint values that correspond to the global minimum as the optimized clock frequency and optimized design constraints to provide to circuit fabrication equipment. The fabrication equipment may fabricate the circuit to implement the optimized design constraint values and clock frequency.
US09659118B2
Embodiments relate to the emulation of circuits, and representation of unknown states of signals. A disclosed system (and method and computer program product) includes an emulation environment to convert a digital signal of a DUT in a form capable of representing an unknown state. In addition, the disclosed system converts digital logic circuits such as Boolean logic, flip flops, latches, and memory circuits to be operable with signals having unknown states. Thus, an unknown state of a signal is indicated and propagated through digital logic circuits represented in a disclosed semantic to enable prompt detection of improper operation of the DUT, for example, due to power shut down or inadequate initialization.
US09659106B2
A system and method are presented for customizing a software application for a target market. A request to access an application is received, by one or more computer servers, from a user. At least one of a preferred language of the user and a location of the user are determined by the one or more computer servers, and a target market is determined using the at least one of the preferred language of the user and the location of the user. The target market defines a language and a region. The application is rendered by the one or more computer servers by modifying at least one of a user interface of the application and a content of the application using the target market.
US09659102B1
The present invention includes systems and methods for providing event information. A one-time use app is downloaded to a user device when a user elects to purchase the app. The app receives event-related information from an event database. The event database receives information from a plurality of sources. The sources are each associated with an application programming interface. The app provides event-related information to the user through purchased options. The app can filter information based on a user profile before providing the information to the user.
US09659091B2
A characteristic thumbprint is extracted from a data signal, the thumbprint based on statistics relating to the data signal. The data signal can be compared indirectly by matching this thumbprint against one or more reference thumbprints. The data signal may be any type of signal, including streaming digitized audio or obtained from static files. A database may contain a number of these characteristic thumbprints, and the database can be searched for a particular thumbprint.
US09659084B1
A system, methods, and user interface for extracting information from unstructured data sources and presenting such information in a structured or semi-structured format for better information search and utilization, and can be applied to replace the conventional methods of displaying search results. The methods identify terms representing topics and related comments in various types of text contents including documents and Web pages, and extract such terms and present them in a form of a topic-comment or object-properties hierarchy, including a heading+list format and heading+cloud or group format. Methods and interface object are provided to make a file object a non-terminal node in a computer file system, with information extracted from the file content displayed as deeper levels of the file system hierarchy. Methods for displaying information extracted from unstructured document contents in terms of class-members and topic-attributes are also disclosed.
US09659083B2
Arrangements described herein relate to automating generation of maps containing message formats and semantic validation rules. First unstructured data defining message formats for messages that conform to a particular standard and second unstructured data defining semantic validation rules to be applied to validate the messages can be scanned. First structured data corresponding to the first unstructured data defining the message formats and second structured data corresponding to the second unstructured data defining the semantic validation rules can be stored into a database. The first structured data and second structured data are configured to be processed to automatically generate a map comprising message formats and sematic validation rules for use in generating messages that conform to the particular standard and validating the messages.
US09659080B1
A location assignment daemon (LAD) manages placement of object replicas in a distributed storage system. The distributed storage system may include a plurality of instances, which may be at distinct geographic locations. The LAD determines placement categories for objects stored in the distributed storage system. A placement category for an object corresponds to the object's placement policy and current replica locations. There are substantially fewer placement categories than objects. The LAD determines an action plan for each placement category whose associated objects require either creation or removal of object replicas. Each action plan includes either creating or removing an object replica. The LAD prioritizes the action plans and implements at least a subset of the action plans in priority order in accordance with available resources in the distributed storage system. Each action plan is applied to objects in the placement category corresponding to the action plan.
US09659074B1
A computer implemented method, system, and computer program product for determining how to replicate one or more volumes, the method comprising sending IOs from an IO stack through a virtual analysis filter and based on the IO sent through the virtual analysis filter, determining a number of virtual splitters and virtual data protection appliances, required WAN capacity and configuration of a replication system.
US09659061B2
A data-processing technique for increasing data-size capacity and improving query speed on large datasets where fields within records are replaced by integers representing distinct values of those fields, the integers drawn from a densely-populated range, wherein a computer data storage structure is initialized and maintained to represent a large number of binary values (“bits”) within a smaller number of actual machine-memory bits of the computer. Representative structures and operations thereon, as well as applications of the data structure to support more-sophisticated data structures and operations, are described and claimed.
US09659054B2
A computer-implemented system and method for creating a user-defined database interface. An Orbit Form module processes a call comprising an identifier for the database, a target data object (database table), approach filters (table fields), and results lines (table fields). Approach filters may support comparable data types, and results lines may support both comparable and non-comparable data types. The call may optionally include parameters that the Orbit Form module uses to govern retrieval of data from the target database, presentation of filter values, and/or formatting of results pages. After testing the call constructs, the Orbit Form module generates Approach boxes (corresponding to the approach filters) that a user employs to enter target input values to compare to records in the database. Record matches result in retrieval and user-specified display of data corresponding to the results lines (DaPs). A selectable view image field in a DaP extracts and displays image file data.
US09659052B1
A system and method to recognize and resolve when a source data object is the same or similar to an existing data object in a database using structured information and facts about each object. The system and method compare relations of the source data object and relations of the existing data object in the database and determine how similar the source data object is to the data object in the database based on scores of the comparisons. The system and method may provide outputs, such as whether the data objects match, the data objects are distinct, the source data object is a strong match to multiple data objects in the database, and the data objects conflict one another. The system and method may then resolve the database entries based on the potential matching outputs.
US09659039B2
Computer systems, machine-implemented methods, and stored instructions are provided herein for maintaining information that describes aggregate characteristics of data within zones. Stored data may be separated into defined zone(s). Data structure(s), such as zone map(s), may store, for each of the zone(s), aggregate characteristic(s) of data in the zone, and a stored indication of whether or not the zone is stale. When a change is made to data in a particular zone that was not stale, a zone manager causes the particular zone to become stale if the change can result in the particular zone having data that is not included in the particular zone's stored aggregate characteristic(s). On the other hand, if the change cannot result in the particular zone having data that is not included in the particular zone's stored aggregate characteristic(s), then the zone manager does not cause the particular zone to become stale.
US09659032B1
Systems and methods are described to generate a color palette with color combinations based on human color preferences. One or more input colors can be used to determine affiliated colors based on the presence of colors in color palettes that have been voted on and/or ranked by a community of users. Each affiliated color can be weighted, normalized, and ordered based at least in part on the level of preference for the color palette to which it belongs and the relative popularity of the input colors. A color from the ordered affiliated colors can be selected and added to the custom palette of colors. With the addition of a color, the ordered affiliated colors can be updated to further present colors for inclusion in the custom color palette.
US09659027B2
A synchronization window for synchronizing data for a calendar in a client calendar data store on a calendar data client computer system with data for the calendar in a server calendar data store on a calendar data server computer system can be calculated using a current time. A request for synchronization data for calendar items for the calendar with calendar times that are within the synchronization window can be sent to the calendar data server. One or more responses to the request can be received from the calendar data server. The response(s) can include received records for calendar items that are at least partially within the synchronization window. The received records can include a master record of a recurring calendar item and an instance record of an occurrence of the recurring calendar item. The received records for the calendar items can be incorporated in the client calendar data store.
US09659016B2
At least one subsystem among the plurality of subsystems includes a managing section operable to manage individual event information for events occurring in a management target region of the at least one subsystem among the plurality of regions and adjacent event information for events occurring in a partial range from a boundary of the management target region among routes in an adjacent region that is adjacent to the management target region, and an event selecting section operable to select events about which the moving object is to be informed, from the individual event information and the adjacent event information managed by the at least one subsystem. Also provided is a method and computer program product.
US09659006B2
A method, a disambiguation decoder and a system is provided for disambiguation in concept identification. A set of candidate concepts of a surface form in a sequence of surface forms in a plaintext is obtained. First probabilities for the candidate concepts are then determined, wherein a first probability indicates likelihood that the surface form represents the respective candidate concept. One of the candidate concepts is selected for the surface form based on the first probabilities and adjacency of the surface forms in the sequence.
US09658997B2
Similarity between a first web document and a second web document based on a similarity threshold is determined. The second web document has a portable page template associated therewith that includes one or more predetermined transformations that were previously applied to the second web document. In addition, one or more objects in the second web document are addressed upon the similarity threshold being met such that a tolerance threshold for one or more modifications to the second web document is met. A user is provided with the portable page template after the addressing of the one or more objects in the web document so that the portable page template automatically applies the one or more transformations, which were previously applied to the second web document, to the first web document.
US09658996B2
An authorization prompt issued from a server is detected, and previously-entered account information, is accessed on a user device. A selectable display element corresponding to each set of entered account information is displayed. User selection or actuation of a given display element is received, and the corresponding account information is retrieved and used to log onto the server that issued the authentication prompt.
US09658994B2
Supplemental information to a media content such as a video can be shown to the user. The supplemental information can be selected based upon a profile of the user and one or both of the identity of the media content and the identity of an entity of interest in the media content. The supplemental information can be customized to the user based on the content being viewed and an entity of interest to the user in the viewed content.
US09658992B2
The present invention relates to the field of high performance computation. Particularly, the invention relates to converting a huge XML document into SDML format which can be processed with high degree of parallelism to achieve high performance. In addition also SDML can be used as a standalone protocol for data representation. SDML deals with one time write and many times read. Further, SDML files can be splitted on number of lines which makes it easier to distribute among multi cores and even distributing across servers.
US09658990B2
An approach is provided in which a number of sections from a sequence of characters included in a Portable Document Format (PDF) file are identified. Each of the identified sections includes a unique set of coordinate positions. The approach builds links between the sections based on a relative position of each of the sections in relation to the other sections along an axis. The approach repeatedly merges sections based on the links that were built to form increasingly larger sections until a final larger section is generated with the characters appearing in a manner consistent with human reading of the rendered PDF document rather than the placement of the characters found within the original PDF file.
US09658983B1
Methods and apparatus for lifecycle support for storage objects are disclosed. A storage medium stores program instructions that when executed on a processor implement a storage lifecycle manager of a multi-tenant storage service. The lifecycle manager determines a lifecycle policy to be implemented for a storage object. The policy indicates lifecycle transitions of the object, including a transition from a first service level to a second service level. The first service level and the second service level may each specify a maximum number of versions of the storage object. The lifecycle manager initiates modification operations corresponding to the storage object's data in accordance with the lifecycle policy, and verifies that the modification operations succeeded. The lifecycle manager provides, in response to a query, an indication of a current service level of the storage object.
US09658981B2
A Network Interface Card (NIC) for a cluster node for parallel calculation on multi-core GPU is described. The NIC has a cluster network including a host and a host memory, a graphics processing unit (GPU) with a GPU memory, a bus and the NIC. The NIC has a transmission network connection block and a reception network connection block. The NIC further includes the following blocks: a transmission block, a reception block, and a GPU memory management block for a direct exchange between the GPU memory and the network through the NIC. An inter-nodal communication method of a nodes cluster, which uses the NIC is also described.
US09658979B2
Various embodiments include methods and apparatuses for managing multiple memories on a multi-slot communication device as a single contiguous combined memory. The memories may include various types of universal serial bus (USB) and/or universal integrated circuit card (UICC) memories. Ranges of physical addresses of portions of each memory may be associated with a range of virtual addresses of the single contiguous combined memory. Associations of physical and virtual addresses may be stored on the multi-slot communication device. A single memory access request to the single contiguous combined memory may be made using the virtual addresses, translated into multiple memory access requests for the individual memories using the physical addresses. Memory accesses requests to the single contiguous combined memory may be made using a variety of communications protocols and translated such that at least one of the multiple memory access requests for the individual memories is made using USB communications protocols.
US09658974B2
In accordance with an embodiment of the present invention, a method of operating a system includes operating in a first operating mode to not permit access to an address range, receiving a priority interrupt (PI) signal. The method further includes operating in a second operating mode to permit access to the address range in response to receiving the PI signal.
US09658973B2
An I/O device operating according to a native computer architecture is accessed by a primary computer system operating according to a primary computer architecture. An application program of the primary computer system requests an I/O operation to access the I/O device. To facilitate this access, an application program interface formed of primary instructions for execution by the primary processor processes the I/O operation to provide an I/O request and to receive an interrupt in response to completion of the access. A thread is formed of primary instructions for execution by the primary processor for receiving the interrupt from the application program interface. A subsystem operates in response to the I/O request to access the I/O device and to provide the interrupt.
US09658972B1
A hybrid mass interconnect system and universal pull-through receiver are shown and described. In one embodiment, a universal receiver for a mass interconnect system includes a frame, a connection assembly and a universal interconnect module. Typically, the receiver supports a variety of testing platforms, including PXI-based platforms, LXI-based platforms, AXIe-based platforms, and a combination thereof. In other examples, a variety of other platform relationships may be used. In particular examples, the universal interconnect module has an upper tier with a pair of spatially separated horizontal rails and a lower tier that is adjacent to the upper tier with at least one pair of spatially separated vertical rails. The result is an interconnect system and receiver for enhancing the organizational and interchangeable electrical engagement between a test adapter and automated testing equipment.
US09658961B2
Throttling instruction execution in a transaction operating in a processor configured to execute memory instructions out-of-order in a pipelined processor, wherein memory instructions are instructions for accessing operands in memory is provided. Included is executing, by the processor, instructions of a transaction comprising determining whether the transaction is in throttling mode and based on the transaction being in throttling mode, executing memory instructions in-program-order. Also included is based on the transaction not-being in throttling mode, executing memory instructions out-of-program order.
US09658952B2
A technique for controlling memory accesses of a data stream is provided. The data is streamed between selected ports of a plurality of ports coupled to a memory (110). As to a method aspect of the technique, a pool of ports is selected. The selected ports include a first port (112) and a second port (118) through which data is to be streamed. A portion of the memory (110) is allocated to the pool of ports. The first port (112) is configured for write access to the allocated memory. The second port (118) is configured for read access to the allocated memory. In dependence on a first state indicative of the occurrence of a write access using the first port (112) and a second state indicative of the occurrence of a read access using the second port (118), a further write access using the first port (112) and/or a further read access using the second part (118) is controlled.
US09658949B2
A test system method for testing software of each of a plurality of system on chips (SoCs) are provided. The test system includes: a plurality of test units configured to test the plurality of SoCs according to a plurality of test cases, respectively; a power supplier configured to supply, to each of the plurality of test units, power of a level corresponding to a corresponding test case, among the plurality of test cases; a temperature controller configured to provide, to each of the plurality of test units, a temperature control signal according to the corresponding test case, and to monitor a measurement temperature, provided from each of the plurality of test units, of each of the plurality of SoCs; and an analyzer configured to analyze at least one of a driving voltage, a driving current, and a driving frequency of each of the plurality of SoCs.
US09658947B2
Ranking of fault-test pairs is performed using first and second multitudes of waveform statistics. The first multitude of waveform statistics includes first value-change information regarding variations in logics HIGH and LOW for each bit of each reference output resulting from a test run of the design code. The second multitude of waveform statistics includes second value-change information regarding variations in logics HIGH and LOW for each bit of each faulty output resulting from a test run of the design code injected with a fault. Relative differences between the first and second multitudes of waveform statistics for each bit of each faulty output with respect to the corresponding reference output are determined. A waveform difference based on the relative differences for each signal of each faulty output is determined. A ranking result of fault-test pairs is determined according to the waveform differences of the faulty outputs.
US09658933B2
A system and method for configuring a test for a program is provided. The method, for example, may include receiving, by a processor, an identification of an electronic device, retrieving, by the processor, a configuration of the electronic device from a memory, modifying, by the processor, at least one step of the test based upon the configuration of the electronic device.
US09658931B2
A high level interface between a remote computer and local computer operator permits the remote computer to be controlled via a sequence of interactions. The remote computer may be monitored for display information which is expected, and also controlled in the event the expected information either is or is not obtained. Command language extensions are provided which extend and complement a basic scripting language. Scripts with embedded command language extensions may be executed through a remote interface, permitting remote testing, operation and evaluation. The development of the scripts, including embedded command language extensions, may be prepared through execution of commands at the local computer on a depiction of the GUI received from the remote computer, and subsequently saved as a script.
US09658916B2
A system analysis device 100 includes a whole model generation unit 1021 which generates a whole model which is obtained by modeling elements or whole of a system and which includes a plurality of partial models, a core model generation unit 1023 which extracts, from a plurality of whole models generated on the basis of the same event, the partial models whose prediction precision satisfies a predetermined criteria, and generates a core model by integrating the extracted partial models, and a threshold setting unit 1024 which calculates a distance between the core model and the plurality of whole models using a predetermined definition, and outputs the distance as a threshold value for error determination using the core model.
US09658904B2
Methods and system for a storage environment are provided. The method generates a first discovery request for a first plug-in associated with a first application executed by a computing system having access to a networked storage system for a storage service operation; acquires metadata by the first plug-in for the storage service operation and storing the metadata at a first location and at a second location, where the second location is at a storage device managed by a storage interface module that co-ordinates completion of the storage service operation; generates a second discovery request for a second plug-in for a second application for the storage service operation; and acquires metadata by the second plug-in using the metadata acquired by the first plug-in for the storage service operation and updating metadata stored at the first location and the second location.
US09658887B2
A single workload scheduler schedules sessions and tasks having a tree structure to resources, wherein the single workload scheduler has scheduling control of the resources and the tasks of the parent-child workload sessions and tasks. The single workload scheduler receives a request to schedule a child session created by a scheduled parent task that when executed results in a child task; the scheduled parent task is dependent on a result of the child task. The single workload scheduler receives a message from the scheduled parent task yielding a resource based on the resource not being used by the scheduled parent task, schedules tasks to backfill the resource, and returns the resource yielded by the scheduled parent task to the scheduled parent task based on receiving a resume request from the scheduled parent task or determining dependencies of the scheduled parent task have been met.
US09658878B2
A virtual-machine-based system provides a mechanism to implement application file I/O operations of protected data by implementing the I/O operations semantics in a shim layer with memory-mapped regions. The semantics of these I/O operations are emulated in a shim layer with memory-mapped regions by using a mapping between a process' address space and a file or shared memory object. Data that is protected from viewing by a guest OS running in a virtual machine may nonetheless be accessed by the process.
US09658875B2
A method and associated systems for anti-collocating multiple virtual entities in a cloud-computing environment. A computerized cloud-configuration system receives a list of virtual machines to be placed in a cloud and a set of anti-collocation rules that identify combinations of machines that may not be placed in a same location. Each virtual machine is assigned a priority and the machines are organized into groups as a function these priorities. The groups are processed sequentially in priority order, and a color is assigned to each virtual machine in each group. Any machine not constrained by an anti-collocation rule is assigned a default “most popular” color. Constrained machines are each assigned a color that is not already used by any other machine with which it is anti-collocated. The virtual machines in each group are then placed in the cloud in order of color, with the populous colors being assigned first.
US09658869B2
System, method, and computer program product to perform an operation comprising collecting performance metrics of a first virtual machine, and defining, based on the collected performance metrics, at least one rule to restrict collocation of the first virtual machine with other virtual machines on one or more host machines in a cloud computing environment.
US09658868B2
Embodiments of the present invention provide a cloud gateway system, a cloud hypervisor system, and methods for implementing same. The cloud gateway system extends the security, manageability, and quality of service membrane of a corporate enterprise network into cloud infrastructure provider networks, enabling cloud infrastructure to be interfaced as if it were on the enterprise network. The cloud hypervisor system provides an interface to cloud infrastructure provider management systems and infrastructure instances that enables existing enterprise systems management tools to manage cloud infrastructure substantially the same as they manage local virtual machines via common server hypervisor APIs.
US09658865B2
A display device having a screen and a touch panel, and methods of enabling a user to edit content displayed on the screen using the touch panel, are described. In one aspect, a method of editing content in a display device having a touch panel installed in a screen includes displaying target content on the screen, displaying a guide on top of the target content in response to a trigger gesture by a touch input means on the target content, zooming the guide in response to a zooming gesture by the touch input means on the guide, and terminating the display of the zoomed guide and displaying the target content at the same magnification with the zoomed guide, in response to a release of contact of the touch input means on the guide.
US09658862B2
Various embodiments of the present invention that include executing, by a processor, a software stack. A writeable boot device such as a storage device with a removable medium is detected, and a second software stack is saved by replacing, on the writeable boot device, a first boot image with a second boot image comprising a second software stack.
US09658851B2
An exemplary embodiment relates generally to methods and apparatus of operating a computing device to perform approximate memoizations. Computer code analysis methods, special hardware units, and run-time apparatus that allow limited errors to occur are disclosed. A computer code generation process, part of compiler or interpreter of a computing system, targeting to insert special instructions in the software code of a computer program is also disclosed, wherein the special instructions may embed information to manage the approximation of value memoizations. The presented technology may reduce the electric power consumption of a computing system by reusing the results or part of the results of previous arithmetic or memory operations. Run-time hardware apparatus to manage the elimination of the operations and control the error introduced by approximate value memoizations are also disclosed.
US09658849B2
In a method of simulating a processor system by running code that simulates the system on a host processor, code is translated at run time to a form required by the host processor. All instructions are mapped to a native instruction set of the host using two or more different code dictionaries: the translated instructions are mapped to multiple and different dictionaries dependent on the execution privilege level or mode of the simulated processor. If an instruction is encountered during runtime that changes the mode of the processor the code dictionary is switched to use the dictionary associated with the new mode. The different modes require different instruction mappings to the native instruction set of the host using different models that more accurately represent the behavior of the system code and hardware in the system being simulated.
US09658845B2
Methods and systems are described that involve creating a where-used objects list that contains a set of provider's objects to be adjusted or tested in a customized program after an upgrade of a program, import of projects, patches, and so on. A set of contracts is created that corresponds to the set of provider's objects used in the customer system. Each contract contains information about the provider's object it is created for and assigned to. This information is used by a lifecycle tool to detect if a provider's object has been changed by comparing the contract information of the provider's object with a new imported version of the same provider's object. The provider's object is modified according to the detected change and the assigned contract is recreated to represent the latest data.
US09658843B2
Provided is a distribution system that accepts registration of a firmware package including information about firmware which is common to a plurality of types of network devices, information about firmware which is unique to each of the plurality of types of network devices, and information about special firmware which is unique to each of the plurality of types of network devices and a specific purpose; accepts a setting file describing control information for controlling approval/denial of an automatic update of firmware included in the package; and accepts setting information relating to an automatic update from a network device. The distribution system automatically distributes information about firmware which is updatable to a network device in accordance with control information and setting information.
US09658837B1
A system includes a first computing device, a second computing device, and a third computing device. The first computing device is configured to identify a first event and store a first event code, a plurality of first entry codes, and first information associated with each of the plurality of entry codes. The second computing device is configured to derive a plurality of first translated event codes based on the first event code and a plurality of first translated entry codes for each of the plurality of first entry codes. The second computing device is further configured to determine whether the plurality of first entry codes were successfully derived. The third computing device is configured to read the first journal entry of the second database and determine, based on the indication that the plurality of first translated entry codes were successfully derived, to perform a first task.
US09658832B2
Systems and methods for multi-factor entropy sourcing for random number generators. An example method may comprise: identifying, by a processing device, a plurality of entropy sources; receiving random bits from each of the plurality of entropy sources; identifying a minimum number of bits among numbers of bits received from each of two or more entropy sources of the plurality of entropy sources; mixing, into an entropy pool, at least the identified minimum number of bits received from each entropy source of two or more entropy sources; and increasing a size of the entropy pool by the identified minimum number of bits.
US09658830B1
A programmable logic device (PLD) includes a plurality of logic array blocks (LAB's) connected by a PLD routing architecture. At least one LAB includes a logic element (LE) configurable to arithmetically combine a plurality of binary input signals in a plurality of stages. The LE comprises look-up table (LUT) logic having K inputs (a “K-LUT”). The K-LUT is configured to input the binary input signals at respective inputs of the K-LUT logic cell and to provide, at a plurality of outputs of the K-LUT logic cell, respective binary result signals indicative of at least two of the plurality of stages of the arithmetic combination of binary input signals. An input line network includes a network of input lines, the input lines configurable to receive input signals from the PLD routing architecture that represent the binary input signals and to provide the input signals to the K-LUT. An output line network includes a network of output lines, the output lines configured to receive, from the K-LUT, output signals that represent the binary result signals and to provide the output signals to the PLD routing architecture. The described LUT's can perform arithmetic efficiently, as well as non-arithmetic functions.
US09658825B2
Certain aspects of the present disclosure relate to a method for quantizing signals and reconstructing signals, and/or encoding or decoding data for storage or transmission. Points of a signal may be determined as local extrema or points where an absolute rise of the signal is greater than a threshold. The tread and value of the points may be quantized, and certain of the quantizations may be discarded before the quantizations are transmitted. After being received, the signal may be reconstructed from the quantizations using an iterative process.
US09658821B2
Embodiments are directed to a processor for adjusting an index, wherein the index identifies a location of an element within an array. The processor includes a shift circuit configured to perform a single operation that adjusts a first parameter of the index to match a parameter of an array address. The single operation further adjusts a second parameter of the index to match a parameter of an array element.
US09658818B2
Sound-producing devices such as headphone sets or loudspeakers are disclosed that can removably mate with an external interface. The external interface may plug into a port on an exterior of the sound-producing device. The external interface includes conversion circuitry that is powered by a power source in the sound-producing device. The external interface receives a first audio-encoded signal from a source device such as a mobile phone, tablet computer, or the like, and converts such signal to a conditioned signal which is compatible with the sound-producing device. Connection between the source device and the external interface may be a first type of wired or wireless connection. The sound-producing device may operate with other source devices that produce different audio-encoded signals by replacing the external interface with a different external interface whose conversion circuitry converts the different audio-encoded signal to the same conditioned signal. Alternative sound-producing devices are also disclosed.
US09658811B2
A printing apparatus includes a memory that stores, upon request from a first print-instruction originator, first print-instruction information that instructs the printing apparatus to print, in association with the first print-instruction originator, and stores, upon request from a second print-instruction originator, second print-instruction information that instructs the printing apparatus to print, in association with the second print-instruction originator, and a printing unit that executes, in an order determined by a predetermined rule, a print job based on the first print-instruction information stored in association with the first print-instruction originator, and a print job based on the second print-instruction information stored in association with the second print-instruction originator, when a first terminal apparatus used by the first print-instruction originator and a second terminal apparatus used by the second print-instruction originator exist within a predetermined first distance with reference to the printing apparatus.
US09658810B2
An image forming apparatus includes a generating unit that generates a list of sequence of one or more users who wait for an execution of a job by the image forming apparatus or an operation of the image forming apparatus, and an output unit that outputs information of the list to a terminal apparatus of a user.
US09658796B2
A storage control device includes a first storage device and a processor. The first storage device stores management information used for managing a variable area of storage regions of a second storage device in a storage apparatus. Each storage region is allocated to a main area or a spare area. The variable area includes storage regions allocated to the spare area and allocatable to the main area. The processor acquires, from the storage apparatus, information on numbers of times of Read processing on the second storage device and numbers of times of Write processing on the second storage device, and notifies the storage apparatus, when a number of times of Read processing on the second storage device within a predetermined time period is larger than a predetermined threshold, of a request for allocating a first portion of the variable area to the main area on basis of the management information.
US09658782B2
To improve upon some of the characteristics of current storage systems in general and block data storage systems in particular, exemplary embodiments combine state-of-the art networking techniques with state-of-the-art data storage elements in a novel way. To accomplish this combination in a highly effective way, it is proposed to combine networking remote direct memory access (RDMA) technique and storage-oriented memory mapped input output (MMIO) technique in a system to provide direct access from a remote storage client to a remote storage system with little to no central processing unit (CPU) intervention of the remote storage server. In some embodiments, this technique may reduce the required CPU intervention on the client side. These reductions of CPU intervention potentially reduce latency while providing performance improvements, and/or providing more data transfer bandwidth and/or throughput and/or more operations per second compared to other systems with equivalent hardware.
US09658776B2
Aspects of the present disclosure describe systems and methods for compressing a set of RAM data that may have some portions duplicated in a set of ROM data. The ROM data may be divided into a plurality of data chunks and hashed to obtained unique key values. Then a second hash may be performed on the RAM to see if there are any RAM data chunks that match the ROM data chunks. RAM data chunks with matching key values are replaced with pointers to the location of the data in the ROM. It is emphasized that this abstract is provided to comply with the rules requiring an abstract that will allow a searcher or other reader to quickly ascertain the subject matter of the technical disclosure. It is submitted with the understanding that it will not be used to interpret or limit the scope or meaning of the claims.
US09658775B2
Memory performance in a computer system that implements large page mappings is improved by dynamically tuning the page scan rate at which a memory sharing module (e.g., in a hypervisor) performs small page scanning operations that identify and exploit potential small page sharing opportunities within large pages. In operation, when free memory is relatively low, the hypervisor adjusts the page scan rate based on a statistical estimate of the percentage of virtual small pages that are mapped to physical large pages that are shareable. In this fashion the hypervisor dynamically tunes the sharing rate to reflect memory usage of applications. Further, unlike conventional approach to page sharing, the hypervisor proactively breaks large pages before resorting to more expensive memory reclamation techniques, such as ballooning and host swapping.
US09658773B2
A storage controller maintains an allocation space for extent space efficient storage volumes, in response to a request from a host application for storage space, wherein an extent pool is configured to allocate available extents to the host application. In response to a request from the host application to delete data stored in selected extents that are already allocated to the host application, the storage controller deletes the data but continues to maintain the selected extents as being allocated to the host application. In response to a request to write new data, the storage controller writes the new data to the selected extents that are already allocated.
US09658772B2
When a touch start is designated within display coordinates of a selected character string, and a touch end is designated within display coordinates of an arbitrary character input key, a mobile terminal temporarily stores the selected character string in a memory area indicated by a memory address corresponding to the arbitrary character input key. Then, when a touch start is designated within the display coordinates of the character input key utilized for temporarily storing the character string, and a touch end is designated within display coordinates of a text of a reply mail, the character string temporarily stored is inserted on the basis of the coordinates indicated by the touch end.
US09658769B2
Methods, apparatuses, and articles of manufacture for a virtual touch screen keyboard. The method includes waiting for a movement of a mobile device. Upon movement of the device, the keyboard receives a measurement representing a position of the device from a sensor of the device. The keyboard determines whether an absolute value of the received measurement is greater than a pre-defined value. If the absolute value of the received measurement is greater than the pre-defined value, and the received measurement is negative, the keyboard displays a first portion of the virtual touch screen keyboard. If the absolute value of the received measurement is greater than the pre-defined value, and the received measurement is positive, the keyboard displays a second portion of the virtual touch screen keyboard. The first portion and the second portion of the virtual touch screen keyboard provide keys that are at least double in size to the keys provided on a conventional touch screen keyboard.
US09658767B2
A mobile communication terminal that includes a display panel; a first touch panel provided on a surface of the display panel; a second touch panel provided on at least one surface of the mobile communication terminal other than the surface of the display panel; and a controller that controls the display panel based on at least one of a size and number of contacts corresponding to a touch input detected at the second touch panel.
US09658756B2
Embodiments of the present invention include systems and methods for display and navigation of a clinical decision support process with portions thereof on separate display screens, as well as systems and methods for dynamically changing visual characteristics of softkeys on a patient monitor/defibrillator user interface screen based on clinical decision support or differential diagnosis processes, as well as a code review interface configured to permit a user to see what was displayed on a patient monitor/defibrillator user interface screen at any time during a medical event, as well as to see snapshots of other recorded parameters over the course of the medical event for purposes of code review, patient transfer, and improved patient care.
US09658753B2
A touch sensitive display device and a method for driving the same capable of increasing the touch recognition rate of the touch sensitive display device in the sleep mode are disclosed. The touch sensitive display device supports a normal mode and a sleep mode. The display device includes touch driving lines and a touch driver to supply one or more touch driving signals to the touch driving lines. The touch driver supplies the one or more touch driving signals at a first frequency during the normal mode of the touch sensitive display device, supplies the one or more touch driving signals at a second frequency during a first portion of the sleep mode of the touch sensitive display device, and supplies the one or more touch driving signals at a third frequency during a second portion of the sleep mode of the touch sensitive display device.
US09658752B2
An apparatus and method for creating channels dedicated to a particular type of content. The method includes acquiring seed content and using the seed content in the creation or updating of a content list. Additional content for the channel is acquired based on the common features of the content list.
US09658751B2
A mouse button function setting method and a system thereof are applied to a mouse having multiple buttons. The method comprises following steps. A short cut function planning interface, which displays a function list and a short cut list, is provided. One of short cuts is selected form the short cut list. At least one of functions is selected from the function list and set to the selected short cut. A button setting interface, which displays the short cut list and multiple button icons, is provided. Multiple button icons correspond to multiple buttons respectively. One of short cuts is set to one of multiple button icons.
US09658746B2
Techniques are disclosed for providing accessible reading modes in electronic computing devices. The user can transition between a manual reading mode and an automatic reading mode using a transition gesture. The manual reading mode may allow the user to navigate through content, share content with others, aurally sample and select content, adjust the reading rate, font, volume, or configure other reading and/or device settings. The automatic reading mode facilitates an electronic device reading automatically and continuously from a predetermined point with a selected voice font, volume, and rate, and only responds to a limited number of command gestures that may include scrolling to the next or previous sentence, paragraph, page, chapter, section or other content boundary. For each reading mode, earcons may guide the selection and/or navigation techniques, indicate content boundaries, confirm user actions or selections, or to otherwise provide an intuitive and accessible user experience.
US09658743B2
An improved user interface is provided for displaying selectable software functionality controls that are relevant to a selected object and that remain visibly available for use while the selected object is being edited. Upon selection of a particular object for editing, functionality available for editing the object is presented in a ribbon-shaped user interface above the software application workspace to allow the user ready and efficient access to functionality needed for editing the selected object. The display of relevant functionality controls is persisted until the user dismisses the display, selects another top-level functionality control or selects another object for editing.
US09658739B1
A method includes identifying a plurality of interactive graphical elements that are associated with a user account. Each interactive graphical element identifies a type of an application and provides access to the respective application. A history usage database is accessed for the user account. The history usage database includes access patterns for the plurality of interactive graphical elements at particular calendar times. A weighting value is assigned to one or more of the access patterns of the interactive graphical elements. A request to display the interactive graphical elements for the user account is received and in response, an ordering of the interactive graphical elements is produced. The ordering of the select ones of the interactive graphical elements is influenced, at least in part, based on the weighting value of the one or more access patterns and a current calendar time when the request is received.
US09658735B2
The invention provides in one aspect a method that includes identifying one or more rules for execution by a rules engine in order to generate a user interface. The method further includes executing, on a digital data processing system that comprises one or more digital data processors, a step of determining whether one or more aspects of the user interface generated as a result of execution of at least one of those rules is in conformity with one or more requirements. The system responds to a negative such determination, according to the method, by identifying modifications to generate a conforming user interface from those one or more rules, modifying one or more of those rules to generate a conforming user interface from (e.g., based directly or indirectly on) those one or more rules, and/or generating a conforming user interface from those one or more rules. The method further calls for storing to and/or generating as an output from the digital data processing system a result those step(s).
US09658733B2
Example embodiments relate to a user interface. In particular, example embodiments are drawn to a user interface associated with a touch sensitive screen. Example embodiments are also drawn to a computer readable medium configured to generate a selection pattern upon which a pointer may be moved to at least one representation, track a movement of the pointer on the selection pattern, and generate a new selection pattern in response to the pointer being moved to the at least one representation.
US09658729B2
A touch panel is configured so that a lower glass substrate with a very low thermal expansion coefficient, as its lower substrate, projects outwardly from outer edges of an upper film substrate. Since a front design sheet is secured to the lower glass substrate, a housing, which is a molded article, need not be provided with any area for the fixation of the front design sheet. Thus, the distance from the contour of a display unit to a display area can be reduced, so that the display unit can be reduced in size.
US09658726B2
A capacitive sensor array comprises large sensor electrodes and small sensor electrodes formed from a single layer of conductive material. Each sensor electrode of a first set of small sensor electrodes is electrically connected to a first pad. A first axis crosses two or more of the sensor electrodes of the first set of small sensor electrodes, and each small sensor electrode of the first set of small sensor electrodes is located on an opposite lateral side of one of the large sensor electrodes from another small sensor electrode of the first set. Each sensor electrode of a second set of small sensor electrodes is electrically connected to a second pad. A second axis crosses two or more of the sensor electrodes of the second set of small sensor electrodes, and each small sensor electrode of the second set is located on an opposite lateral side of one of the large sensor electrodes from another small sensor electrode of the second set.
US09658720B2
A system comprising a sensing device and a capacitive sense array configured to detect a presence of a passive touch object and a stylus where the capacitive sense array receives a transmit signal from the stylus via capacitive coupling. The system further comprising a processing device configured to determine the stylus location on the capacitive sense array based on the transmit signal and to synchronize the stylus to the capacitive sense array. A system further comprises a demodulation block to extract additional data that is modulated into the transmit signal by the stylus. The demodulation block is configured to extract the additional data by amplitude shift keying. The additional data comprises at least one of an applied force value of the stylus tip, a button status data, a battery status data, or a stylus acceleration data.
US09658710B2
The present disclosure provides a pixel circuit, its driving method, an organic light-emitting diode (OLED) display panel, and a display device. According to the present disclosure, a display driving module and a touch detection module are configured to multiplex a first scanning line and a second scanning line, so it is able to eliminate an effect of a threshold voltage of a driving transistor on a light-emitting driving signal, thereby to improve the brightness evenness of the OLED display panel and improve a display effect of the display device. In addition, the pixel circuit in the embodiments of the present disclosure may achieve the touch detection and the display driving simultaneously by multiplexing a control signal, so it is able to achieve the integration of the display driving and the touch detection in an effective manner.
US09658703B2
There is provided a method of operating a mobile terminal, the method including: executing an application using both a pen input and a touch input; sensing a pen input through a first input unit, and performing a function corresponding to the sensed pen input; and sensing a touch input through a second input unit, and performing a function corresponding to the sensed touch input.
US09658688B2
A view adjustment system using information captured by one or more sensors on a client device determines a projection direction for content to be displayed on a display of the client device. Upon determining the projection direction, the view adjustment system transforms the content into a perspective view based on the determined projection direction and prompts the client device to present the content in the perspective view to a user. The view adjustment system may monitor changes in relative position and/or direction of the user with respect to the display, adjust the projection direction, and transform the content to reflect these changes.
US09658687B2
Various technologies described herein pertain to controlling functionality of a display based on visual focus of a user in a multiple display or multiple computational device environment. A particular display from a set of displays on which a user is visually focused is identified. The set of displays includes at least a first display and a second display. Moreover, a type of input receivable from the user via the first display and/or content rendered on the first display is controlled based on the visual focus of the user.
US09658682B2
A microcontroller system includes a higher power reference voltage circuit and a lower power reference voltage circuit configured to draw less power than the higher power reference voltage circuit when enabled. The system includes a power state logic controller configured to enable the lower power reference voltage circuit to provide a first regulated voltage during a power saving mode, and, on exiting the power saving mode, enable the higher power reference voltage circuit to provide a second regulated voltage.
US09658677B2
A touch input device includes a touch sensor and a wake-up control unit. The touch sensor includes a piezoelectric sensor and a detection signal generating unit. The touch sensor outputs sensing signals corresponding to displacement amount of a push and relaxation of the push of an operation surface, and a displacement direction. The detection signal generating unit outputs a displacement detection signal from the sensing signal. The wake-up control unit detects a push from a change in a voltage of the displacement detection signal. The wake-up control unit starts clocking upon detection of the push, and generates and outputs a wake-up signal when detecting relaxation of the push based on the change in the voltage of the displacement detection signal within a detection time.
US09658675B1
Subject matter disclosed herein relates to arrangements and techniques that provide for sending messages among processing nodes over a network-on-chip (NoC). More particularly, the present disclosure provides an Application Specific Integrated Circuit (ASIC) that includes processing cores and co-processors. The processing cores and co-processors are coupled together with a NoC. Each processing core and co-processor includes two corresponding buffers. A first buffer is for sending messages and a second buffer is for receiving messages. If a processing core or co-processor needs to send a message and the corresponding first buffer is full, if the message includes a flag that indicates a WAIT function, then the processing core and/or co-processor enters a low power state until the first buffer is available; otherwise the message is ignored and not sent. Additionally, if a second buffer is empty, then the corresponding processing core and/or co-processor enters the low power state.
US09658671B2
A method and an apparatus for providing a power grid are provided. The apparatus includes a plurality of memory units comprising at least one SoC memory and at least one cache memory. The apparatus includes a first subsystem coupled to the at least one SoC memory associated with a first power domain. The apparatus further includes a second subsystem coupled to the at least one cache memory associated with a second power domain. The second subsystem may be a CPU subsystem. Because the first power domain sources power from a shared power source, the first power domain may operate at a voltage level that is higher than the operation of memory circuits requires. By moving the at least one cache memory from the first power domain to the second power domain, LDO efficiency loss for components in the first power domain may be reduced.
US09658668B2
An information handling system may include a power management system comprising a power supply unit having an input for receiving an alternating current input waveform from a bulk capacitor for storing charge. The power management system may be configured to calculate an energy budget associated with an amount of energy stored in the bulk capacitor that may be used to power at least one information handling resource in response to a loss of the alternating current input waveform. The power management system may further be configured to determine a portion of the energy budget required to satisfy a requirement, the requirement comprising one of a hold-up time requirement and a ride-through requirement of the information handling system. The power management system may further be configured to allocate the energy budget between hold-up and ride-through of the information handling system in a manner that satisfies the requirement.
US09658665B2
Systems and methods are provided for reliable redundant power distribution. Some embodiments include micro Automatic Transfer Switches (micro-ATSs), including various components and techniques for facilitating reliable auto-switching functionality in a small footprint (e.g., less than ten cubic inches, with at least one dimension being less than a standard NEMA rack height). Other embodiments include systems and techniques for integrating a number of micro-ATSs into a parallel auto-switching module for redundant power delivery to a number of devices. Implementations of the parallel auto-switching module are configured to be mounted in, on top of, or on the side of standard equipment racks. Still other embodiments provide power distribution topologies that exploit functionality of the micro-ATSs and/or the parallel micro-ATS modules.
US09658664B2
An electronic device having a pin for setting its mode of operation, wherein the pin is connected or connectable to a first connection of a resistor, wherein the electronic device is arranged to detect a location of the resistor, wherein the electronic device is arranged to detect a size of the resistor, wherein the electronic device is arranged to determine a first setting based on the location of the resistor, and wherein the electronic device is arranged to determine a second setting based on the size of the resistor.
US09658654B1
A hinge cable routing system includes a hinge chassis that includes a first hinge wall and a second hinge wall that is spaced apart from the first hinge wall to define a hinge housing between the first hinge wall and the second hinge wall. A first shaft extends through the hinge housing and out of the hinge chassis. A second shaft extends through the hinge housing and out of the hinge chassis. A cable extends through the hinge housing adjacent the first hinge wall and between the first hinge wall and each of the first shaft and the second shaft such that no portion of the cable that extends through the hinge housing is located between the second hinge wall and either of the first shaft and the second shaft.
US09658651B2
A rim for protecting a handheld computing device, such as a smartphone, has left, right, top, and bottom edges sized to engage the corresponding edges of the handheld device. An electronic processor is disposed within at least one of the rim edges, and is able to communicatively connect to the handheld computing device when the handheld computing device is engaged by the rim. The rim resiliently stretches over the handheld device to engage the device, the resilient material further operative to protect the device from damage due to dropping. Sensors are communicatively coupled to the electronic processor, the sensors operable to detect a health parameter of the body of the user when the user grasps the rim engaged with the handheld computing device, and uses the handheld computing device in a normal manner. Electronic backplates having differing features can be attached to the rim and communicate with the rim.
US09658642B2
A device with an I/O interface includes a replica clock distribution path matched to a clock distribution path of an unmatched receiver circuit. The device can monitor changes in delay in the replica path, and adjust delay in the real clock distribution path in response to the delay changes detected in the replica path. The receiver circuit includes a data path and a clock distribution network in an unmatched configuration. A ring oscillator circuit includes a replica clock distribution network matched to the real clock distribution network. Thus, delay changes detected for the replica clock distribution network indicates a change in delay in the real clock distribution network, which can be compensated accordingly.
US09658637B2
A proportional to absolute temperature (PTAT) circuit is provided. By judiciously combining circuit elements into two or more cell it is possible to effectively dump bias current into impedance resistive element of a first cell from other cells of the circuit. As a result the circuit as a whole can operate with smaller resistive elements and therefore occupy less area when implemented in silicon. It is also possible to reduce the supply current that is required for providing specific output currents or voltages.
US09658636B2
Apparatus and methods for variable capacitor arrays are provided herein. In certain configurations, an apparatus includes a variable capacitor array and a bias voltage generation circuit. The variable capacitor array includes a plurality of metal oxide semiconductor (MOS) variable capacitor cells, which include one or more pairs of MOS capacitors implemented in anti-parallel and/or anti-series configurations. In certain implementations, the MOS variable capacitor cells are electrically connected in parallel with one another between a radio frequency (RF) input and an RF output of the variable capacitor array. The bias voltage generation circuit generates bias voltages for biasing the MOS capacitors of the MOS variable capacitor cells.
