US10522851B2
A relation of X×ΔT×CTEt
US10522845B2
A method of regulating thermal dissipation from a vehicle battery pack is provided in which a by-pass valve is used to control the amount of battery pack coolant either passing through, or by-passing, a heat exchanger, where the coolant passing through the heat exchanger is cooled by a refrigeration system. The vehicle's HVAC system is controlled to insure that HVAC operation does not compromise maintaining the battery pack within an acceptable range of temperatures.
US10522840B2
An anode component for a lithium-ion cell is formed using an atmospheric plasma deposition. The anode component has an anode material layer comprising high lithium-intercalating capacity silicon particles as active anode material in pores of a bonded layer of metal particles. The atmospheric plasma deposition process deposits metal particles and smaller silicon-containing particles concurrently or sequentially on an anode current collector substrate or polymeric separator substrate for the lithium-ion cell. The anode material layer may optionally be lithiated in the atmospheric plasma deposition process. The plasma deposition process is used to form a porous electrode layer on the substrate consisting essentially of a porous metal matrix containing smaller particles of the electrode material particles supported and carried in the pores of the matrix. When the anode component is assembled into a cell, remaining pore capacity is filled with a lithium-ion containing liquid electrolyte solution.
US10522835B2
A binder composition for positive electrode with superior oxidation resistance is provided. A slurry for positive electrode, a positive electrode, and a lithium ion secondary battery manufactured by using the binder composition is provided. A binder composition for positive electrode including a graft copolymer in which a monomer containing acrylonitrile as a main component is graft copolymerized with polyvinyl alcohol having an average degree of polymerization of 300 to 3000 and a saponification degree of 70 to 100 mol %, is provided. Further, a slurry for positive electrode includes the binder composition for positive electrode, a positive electrode active material, and a conductive assistant. In addition, a lithium ion secondary battery is manufactured using a positive electrode made with the slurry for positive electrode and a positive electrode.
US10522834B2
A multiple-element composite material for negative electrodes, a preparation method therefor, and a lithium-ion battery using the negative electrode material. The lithium-ion battery uses multiple-element composite material for negative electrodes has a core-shell structure containing multiple shell layers. The inner core consists of graphite and nano-active matter coating the surface of the graphite. The outer layers of the inner core are in order: the first shell layer is of an electrically conductive carbon material, the second shell layer is of a nano-active matter, and the third shell layer is an electrically conductive carbon material coating layer. The multiple-element composite material for negative electrodes of the present invention combines coating processing technology with surface composite modification and coating modification technology to successfully prepare a multiple-element composite material for negative electrodes having a core-shell structure containing multiple shell layers, and allows for high load and high dispersion for the nano-active matter, thereby substantially enhancing the material specific capacity, cycle performance, and initial efficiency. Additionally, the multiple-element composite material for negative electrodes of the present invention has high compacted density and good processing performance. The negative electrode material has simple preparation technique and low raw material cost, is environmentally friendly, and causes no pollution.
US10522827B2
Hydrogen storage negative electrodes based on group IV elements, for example hydrogen storage negative electrodes based on silicon and/or carbon, are highly effective towards reversibly charging/discharging hydrogen in an hydride electrochemical cell.
US10522821B2
A graphite powder, preferably including scale-like particles, which satisfies the following formulae (1) and (2), wherein e(0.5) represents the initial charge-discharge efficiency of a coin cell fabricated from an electrode (work electrode) produced by compressing an electrode material employing graphite powder as an active material under a pressure of 0.5 t/cm2, a lithium metal counter electrode, a separator and an electrolytic solution; and e(3) represents the initial charge-discharge efficiency of a coin cell fabricated from an electrode (work electrode) produced by compressing an electrode material employing graphite powder as an active material under a pressure of 3 t/cm2, a lithium metal counter electrode, a separator and an electrolytic solution: e(3)(%)−e(0.5)(%)≥1, formula (1): e(3)(%)>85. formula (2): Also disclosed is a method of producing the graphite powder; a graphite material for a battery electrode; an electrode for a lithium ion; and a lithium-ion secondary battery.
US10522820B2
A secondary battery includes a cathode; an anode (1) including a plurality of carbon particles and a plurality of non-carbon particles, (2) the carbon particles containing graphite, (3) the non-carbon particles containing a material including, as a constituent element, one or more of silicon (Si), tin (Sn), and germanium (Ge), and (4) a distribution of a first-order differential value of an integrated value Q of a relative particle amount with respect to a particle diameter D of the plurality of carbon particles having one or more discontinuities, where a horizontal axis and a vertical axis of the distribution indicate the particle diameter D (μm) and a first-order differential value dQ/dD, respectively; and an electrolyte.
US10522816B2
A lithium secondary battery of the present invention has a positive electrode is provided with a positive electrode mix layer that includes a positive electrode active material and a conductive material. The positive electrode mix layer has two peaks, large and small, of differential pore volume over a pore size ranging from 0.01 μm to 10 μm in a pore distribution curve measured by a mercury porosimeter. A pore size of the smaller peak B of the differential pore volume is smaller than a pore size of the larger peak A of the differential pore volume.
US10522812B2
According to one embodiment, a battery is provided. The battery includes an electrode body, a lead, a container member, and a terminal. The container member includes a main part and a terminal-connecting part adjacent to the main part. The electrode body is housed in the main part of the container member. The lead is electrically connected to the electrode body. The lead is housed in the terminal-connecting part of the container member. The terminal is electrically connected to the lead. The terminal is provided on the terminal-connecting part. A thickness of the main part of the container member is larger than a thickness of the terminal-connecting part of the container member.
US10522805B2
A battery pack includes: a core pack comprising a battery cell including a plurality of unit battery cells electrically connected to each other, a first electrode tab, and a second electrode tab; a case comprising a lower case accommodating the core pack therein and having an opening at a side thereof to insert the core pack therethrough, and an upper case closing the opening and including a first terminal and a second terminal electrically connected to the first electrode tab and the second electrode tab, respectively; and an elastic body between the core pack and the case to elastically support an exterior of the core pack.
US10522797B2
A circuit board, which includes at least one contact surface for electrical contacting with a contact partner, so that an electric current can be transferred between the circuit board and the contact partner, the circuit board including structures in the at least one contact area, which are designed to pierce through contaminant layers and/or oxide layers present on the at least one contact partner, the at least one contact area including the at least one contact surface.
US10522792B1
Disclosures of the present invention describe a luminance and color temperature tunable (LCTT) tandem OLED, which mainly consists of a transparent conductive substrate, a HTL, a first lighting unit, a first carrier generation unit, a second lighting unit, a second carrier generation unit, a third lighting unit, an ETL, and a cathode electrode. The first lighting unit is designed to emit a cold-white light, a pure-white light or an orange-white light, the second lighting unit is designed to emit a warm-white light, and third lighting unit is designed to emit an orange-white light, a pure-white light or a cold-white light corresponding to the first lighting unit. By such arrangement, it is easy for a user to make the LCTT tandem OLED provide an illumination with user-desirable color temperature and illuminance by using a control interface to electrically drive the three lighting units, either individually or simultaneously.
US10522791B2
This presently disclosed technology relates Organic Light Emitting Diodes (OLEDs), more particularly it relates to OLED display light extraction and nanocomposite formulations that can be used for the light extraction structure.
US10522790B2
A film member having a concave-convex structure is composed of a base member; a gas barrier layer formed on the base member; and a concave-convex structure layer formed on a surface of the gas barrier layer, wherein the surface of the gas barrier layer is formed of an inorganic material which is same as a material of the concave-convex structure layer, and the concave-convex structure layer is obtained from a precursor solution applied on the gas barrier layer. The film member having the concave-convex structure has an excellent adhesion property between the concave-convex structure layer and the gas barrier layer, and a high barrier property.
US10522789B2
Disclosed is a light emitting display device which facilitates to improve light-extraction efficiency of pixels, and to maximize light-extraction efficiency of each pixel, wherein the light emitting display device includes a substrate having a first area and a second area, a planarization coating layer prepared on the substrate and configured to have a first curve pattern prepared on the first area, and a second curve pattern prepared on the second area, and an emission device prepared on the first curve pattern and the second curve pattern, wherein a thickness of the planarization coating layer overlapping the first curve pattern is different from a thickness of the planarization coating layer overlapping the second curve pattern, and each of the first curve pattern and the second curve pattern includes a plurality of protruding portions having an aspect ratio of 0.4˜0.6.
US10522788B2
The present specification discloses an organic electroluminescent device including: an anode; a cathode; a light emitting layer provided between the anode and the cathode; and a light scattering layer provided between the light emitting layer and the cathode.
US10522787B1
A light-emitting device maximizes optical efficiency when the emissive layer is high refractive index material. Said device includes an emissive layer; a first electrode and a second electrode from which charges are generated; a first charge transport layer that injects charges from the first electrode into the emissive layer; and a second charge transport layer that injects charges from the second electrode into the emissive layer. A Fresnel reflection value at boundaries between the emissive layer and at least one of the first and second charge transport layers is from 5% through 30%, and at least one of the charge transport layers satisfies a half wavelength condition of having a thickness that is equal to within twenty percent of ½ of one wavelength of an integer multiple of ½ of one wavelength in the charge transport layer material within a bandwidth of emission of the emissive layer.
US10522782B2
A flexible window includes: a first film layer through which light is incident to the flexible window from a display panel of a flexible display device, the first film layer including: a plurality of stacked first sub-film layers, an adhesive layer disposed between adjacent first sub-film layers, and an index matching layer disposed between a first sub-film layer and the adhesive layer adjacent thereto; and a second film layer on the first film layer to be disposed further from the display panel than the first film layer, the second film layer having a Young's modulus lower than that of each of the first sub-film layers. Within the flexible window, a refractive index of the index matching layer has a value between a refractive index of each of the first sub-film layers and a refractive index of the adhesive layer.
US10522779B2
An organic light-emitting display apparatus including: a first electrode of a first group; a first organic functional layer covering the first electrode of the first group and including a first emission layer; a second electrode of the first group covering the first organic functional layer; a first electrode of a second group separate from the first electrode of the first group; a second organic functional layer separate from the first organic functional layer, covering the first electrode of the second group, having a larger area than the first organic functional layer, and including a second emission layer; a second electrode of the second group covering the second organic functional layer; and a common electrode integrally and commonly disposed on the second electrode of the first group and the second electrode of the second group.
US10522777B2
Provided is a display device having a first pixel and a second pixel adjacent to the first pixel. The first pixel includes a first pixel electrode, a first EL layer over the first pixel electrode, and a second electrode over the first EL layer. The second pixel includes a second pixel electrode, a second EL layer over the second pixel electrode, and the second electrode over the second EL layer. The display device further possesses a first cap layer over the second electrode, a second cap layer over the first cap layer and overlapping with the first EL layer, and a third cap layer covering the second cap layer, overlapping with the first EL layer and the second EL layer, and in contact with the first cap layer in a region overlapping with the second EL layer.
US10522771B2
A composition includes a product of a condensation reaction between a thermal cross-linking agent and a product of hydrolysis and condensation polymerization of a compound represented by Chemical Formula 1.
US10522769B2
This invention discloses iridium complexes with benzothienoquinoline, benzofuroquinoline, benzoselenophenoquinoline, and benzosiloloquinoline ligands. These complexes can be used as phosphorescent emitters in OLEDs.
US10522765B2
The present invention relates to an organic electronic device, comprising a first electrode (11), a second electrode (14), and, between the first and the second electrode, a substantially organic layer (13) comprising a heterocyclic compound bearing at least one lithoxy group and containing at least one heterocyclic ring comprising a phosphine oxide group directly bound to three carbon atoms; a compound for use in such an organic electronic device and to a semiconducting material comprising the respective compound.
US10522762B2
The present specification relates to an organic light emitting diode.
US10522759B2
A method for manufacturing a display unit is provided, and the method includes forming a first insulating film, forming a plurality of first electrodes on the first insulating film, forming a second insulating film on the first electrodes, forming a plurality of openings corresponding to the first electrodes, forming a plurality of organic layers formed in a shape of a stripe having notch parts, forming a second electrode on the organic layer having the notch parts is formed, and forming a protective film on the second electrode.
US10522757B2
In various examples, dual resistive-material regions for a phase change material region are fabricated by initially forming a resistive material. Prior to forming the phase change material region over the resistive material, at least an upper portion of the resistive material is exposed to an implantation or plasma that increases the resistance of an upper portion of the resistive material relative to the remainder, or bulk, of the resistive material. As a result, in certain embodiments, the portion of the resistive material proximate to the phase change material region may be used as a heater because of a relatively, high resistance value of the resistive material, but the bulk of the resistive material has a relatively lower resistance value and, thus, does not increase the voltage drop and current usage of the device. Other methods and devices are disclosed.
US10522749B2
A process flow for forming magnetic tunnel junction (MTJ) nanopillars with minimal sidewall residue and minimal sidewall damage is disclosed wherein a pattern is first formed in a hard mask that is an uppermost MTJ layer. Thereafter, the hard mask sidewall is etch transferred through the remaining MTJ layers including a reference layer, free layer, and tunnel barrier between the free layer and reference layer. The etch transfer may be completed in a single RIE step that features a physical component involving inert gas ions or plasma, and a chemical component comprised of ions or plasma generated from one or more of methanol, ethanol, ammonia, and CO. In other embodiments, a chemical treatment with one of the aforementioned chemicals, and a volatilization at 50° C. to 450° C. may follow an etch transfer through the MTJ stack with an ion beam etch or plasma etch involving inert gas ions.
US10522744B2
A magnetic tunnel junction (MTJ) is disclosed wherein a free layer (FL) interfaces with a metal oxide (Mox) layer and a tunnel barrier layer to produce interfacial perpendicular magnetic anisotropy (PMA). The Mox layer has a non-stoichiometric oxidation state to minimize parasitic resistance, and comprises a dopant to fill vacant lattice sites thereby blocking oxygen diffusion through the Mox layer to preserve interfacial PMA and high thermal stability at process temperatures up to 400° C. Various methods of forming the doped Mox layer include deposition of the M layer in a reactive environment of O2 and dopant species in gas form, exposing a metal oxide layer to dopant species in gas form, and ion implanting the dopant. In another embodiment, where the dopant is N, a metal nitride layer is formed on a metal oxide layer, and then an anneal step drives nitrogen into vacant sites in the metal oxide lattice.
US10522743B2
The present invention provides a Hall element module for achieving miniaturization. A Hall element module includes a Hall element having an element surface and an element back surface, a terminal portion electrically connected to the Hall element and separated from the Hall element as viewed in a z direction, and a resin package covering at least one portion of each of the Hall element and the terminal. The resin package has a rectangular shape with four sides along the x direction and the y direction as viewed in the z direction. The terminal portion includes a terminal back surface facing the z direction and exposed from the resin package. An end edge of the terminal back surface includes a terminal back surface inclined portion opposed to the Hall element and inclined with respect to the x direction and the y direction as viewed in the z direction.
US10522739B2
An embodiment includes an apparatus comprising: a substrate; and a perpendicular magnetic tunnel junction (pMTJ) comprising a fixed layer and first and second free layers; wherein (a) the first free layer includes Cobalt (Co), Iron (Fe), and Boron (B), and (b) the second free layer is epitaxial and includes Manganese (Mn) and Gallium (Ga). Other embodiments are described herein.
US10522737B2
A diaphragm for a piezoelectric micromachined ultrasonic transducer (PMUT) is presented having resonance frequency and bandwidth characteristics which are decoupled from one another into independent variables. Portions of at least the piezoelectric material layer and backside electrode layer are removed in a selected pattern to form structures, such as ribs, in the diaphragm which retains stiffness while reducing overall mass. The patterned structure can be formed by additive, or subtractive, fabrication processes.
US10522736B2
Thermally stable piezoelectric polymer foams (ferroelectrets) with high piezoelectric activity for sensing and actuation. The invention further includes a method of fabricating such foams in an environmentally friendly manner.
US10522735B2
The invention provides a surveying instrument, in which an output shaft of an ultrasonic motor is attachably and detachably connected by a bolt to a lower end of a horizontal shaft of a frame unit supported rotatably in a horizontal direction, a rotating plate is fixed to the output shaft, a vibration generating component is formed on an outer circumferential portion of the rotating plate, a stator in close contact with the vibration generating component via a predetermined friction torque T1 is rotatably provided on the output shaft, the stator is restricted on a rotation by a whirl-stop unit, ultrasonic vibration is generated in the vibration generating component and the output shaft is rotated.
US10522733B2
A microelectromechanical apparatus for generating a physical effect, including an array of moving elements, each coupled to a mechanical support by at least one flexure which is associated with at least one piezoelectric member which is operable to be strained by an electrical field applied to the piezoelectric member, thereby flexing the flexure to which the piezoelectric member is coupled; an electrical wiring, including a group of electrodes, wherein each electrode out of the group of electrodes is coupled to at least one of the piezoelectric members; wherein the electrical wiring is operable to concurrently transfer different sequences of electric fields to different piezoelectric members, thereby controllably inducing movement of moving elements of the array for creating the physical effect; and a motion restriction mechanism for maintaining a maximal motion distance for each of the moving elements when actuated via the corresponding flexure and piezoelectric member.
US10522731B2
A method of manufacturing a light emitting device includes providing molded packages each of which has a recess. A light emitting component is mounted on a bottom surface of the recess. At least one sealing member covering the light emitting component is formed within the recess. A lead frame including a first lead and a second lead is provided, the first lead having a first groove on an upper surface of the first lead the second lead having a second groove on an upper surface of the second lead. Spaces are formed, each of the spaces being surrounded with an upper metal mold, a lower metal mold, and the lead frame by cooperatively holding the lead frame with the upper metal mold and the lower metal mold. The spaces and the first groove and the second groove are filled with a resin.
US10522716B2
Described herein is a semiconductor light emitting device. The semiconductor light emitting device comprises: an n-type semiconductor layer; a V-pit formed through at least part of the n-type semiconductor layer; an active layer disposed on the n-type semiconductor layer and filling the V-pit; and a p-type semiconductor layer disposed on the active layer, wherein the active layer includes a plurality of layers and part of the plural layers has a flat shape on the V-pit.
US10522712B2
A micro light-emitting diode chip includes an epitaxial structure, a first electrode, and a second electrode. The epitaxial structure includes a first type doped semiconductor layer, a light emitting layer, and a second type doped semiconductor layer, and the epitaxial structure further includes a first surface, side surface and a second surface opposite to the first surface. The first electrode is disposed on the first surface, and is electrically connected to the first type doped semiconductor layer and contacted the first type doped semiconductor layer on a portion of the first surface. The second electrode is disposed on the first surface and the side surface, and is electrically connected to the second type doped semiconductor layer and contacted the second type doped semiconductor layer on a portion of the side surface. A length of a diagonal of the micro light-emitting diode chip is greater than 1 micrometer and is less than or equal to 140 micrometers.
US10522707B2
In an example, the present invention provides a method of separating a photovoltaic strip from a solar cell. The method includes providing a solar cell, placing the front side of the solar cell on a platen such that the backside is facing a laser source, initiating a laser source to output a laser beam having a wavelength from 200 to 600 nanometers and a spot size of 18 to 30 microns, subjecting a portion of the backside to the laser beam at a power level ranging from about 20 Watts to about 35 Watts to cause an ablation to form a scribe region having a depth, width, and a length, the depth being from 40% to 60% of a thickness of the solar cell, the width being between 16 and 35 microns to create a plurality of scribe regions spatially disposed on the backside of the solar cell.
US10522700B2
A frame-less epoxy-resin encapsulated solar power panel, in which an optically-transparent epoxy-resin coating is applied over an array of photo-voltaic (PV) solar cell modules mounted on a support sheet of phenolic resin, and supported in a layer of adhesive coating applied as a liquid with a viscosity and a thickness such that the thickness of the layer of adhesive coating is substantially equal to the thickness of the PV solar cell modules, and cured to a sufficient hardness. The optically-transparent epoxy-resin coating, and the cured layer of adhesive coating, reinforce the strength of the sheet of phenolic resin, particularly around the perimeter of the frame-less epoxy-resin encapsulated solar power panel.
US10522699B2
An optoelectronic semiconductor chip is disclosed. In an embodiment a chip includes an active zone with a multi-quantum-well structure, wherein the multi-quantum-well structure includes multiple quantum-well layers and multiple barrier layers, which are arranged sequentially in an alternating manner along a growth direction and which each extend continuously over the entire multi-quantum-well structure, wherein seen in a cross-section parallel to the growth direction, the multi-quantum-well structure has at least one emission region and multiple transport regions, wherein the quantum-well layers and the barrier layers are thinner in the transport regions than in the emission region, wherein, along the growth direction, the transport regions have a constant width, and wherein the quantum-well layers and the barrier layers are oriented parallel to one another in the emission region and in the transport regions.
US10522698B2
The present invention relates to a method for manufacturing a solar cell comprising a selective emitter, the method comprising the steps of: forming an electrode pattern and an alignment mark by performing a first impurity doping locally on one surface of a substrate; and performing a second impurity doping on the entire surface of the first doped substrate, wherein, as a result of the first and second doping, the alignment mark is formed on a first emitter or a second emitter, and the electrode pattern is formed on the second emitter. When manufacturing the selective emitter, the alignment mark is formed by doping processes. The use of the alignment mark may increase the matching of the electrode pattern formed in the selective emitter and the resulting electrode line. Further, a solar cell having the selective emitter has excellent conversion efficiency and a high fill factor value.
US10522696B2
A semiconductor body of a first type of conductivity is formed including a base layer, a first further layer on the base layer and a second further layer on the first further layer. The base layer and the second further layer have an intrinsic doping or a doping concentration that is lower than the doping concentration of the first further layer. A doped region of an opposite second type of conductivity is arranged in the semiconductor body, penetrates the first further layer and extends into the base layer and into the second further layer. Anode and cathode terminals are electrically connected to the first further layer and the doped region, respectively. The doped region can be produced by filling a trench with doped polysilicon.
US10522695B2
A multilayer stack is described. The multilayer stack includes: (i) one or more inorganic barrier layers for reducing transport of gas or vapor molecules therethrough; (ii) an inorganic reactive layer disposed adjacent to one or more of the inorganic barrier layers, and the reactive layer capable of reacting with the gas or the vapor molecules; and (iii) wherein, in an operational state of the multilayer stack, the vapor or the gas molecules that diffuse through one or more of the inorganic barrier layers react with the inorganic reactive layer, and thereby allow said multilayer stack to be substantially impervious to the gas or the vapor molecules.
US10522691B2
To provide a miniaturized transistor having highly stable electrical characteristics. Furthermore, also in a semiconductor device including the transistor, high performance and high reliability are achieved. The transistor includes, over a substrate, a conductor, an oxide semiconductor, and an insulator. The oxide semiconductor includes a first region and a second region. The resistance of the second region is lower than that of the first region. The entire surface of the first region in the oxide semiconductor is surrounded in all directions by the conductor with the insulator interposed therebetween.
US10522684B2
This disclosure relates to a semiconductor structure for, e.g., a high-k metal gate fin field-effect transistor, and a manufacturing method therefor. The method may include providing a substrate structure including a first portion for forming a first PMOS device and a second portion for forming a second PMOS device; forming a first P-type work function adjustment layer on the substrate structure; forming a protective layer on the first P-type work function adjustment layer; patterning the protective layer to expose the first P-type work function adjustment layer on the first portion; oxidizing the exposed first P-type work function adjustment layer on the first portion; removing the protective layer; and forming a second P-type work function adjustment layer on the first P-type work function adjustment layer. Because the first P-type work function adjustment layer on the first portion is oxidized, gate voltage thresholds of the first portion and the second portion are different even when the thicknesses of metal layers on the first portion and the second portion are the same.
US10522676B2
A MOS gate having a trench gate structure is formed on the front surface side of a silicon carbide substrate. A gate trench of the trench gate structure goes through an n+ source region and a p-type base region and reaches an n− drift region. Between adjacent gate trenches, a first p+ region that goes through the p-type base region in the depth direction and reaches the n− drift region is formed at a position separated from the gate trenches. The first p+ region is formed directly beneath a p++ contact region. The width of the first p+ region is less than the width w1 of the gate trench. A second p+ region is formed at the bottom of the gate trench. The first and second p+ regions are silicon carbide epitaxial layers.
US10522671B2
The present disclosure provides a semiconductor device and a method for manufacturing the same. The semiconductor device comprises a substrate, a first III-V compound layer over the substrate, a second III-V compound layer on the first III-V compound layer, a third III-V compound layer on the second III-V compound layer, a source region on the third III-V compound layer, and a drain region on the third III-V compound layer. A percentage of aluminum of the third III-V compound layer is greater than that of the second III-V compound layer.
US10522660B2
A method for fabricating semiconductor device includes the steps of: forming a fin-shaped structure on a substrate; forming a first gate structure and a second gate structure on the fin-shaped structure; forming an interlayer dielectric (ILD) layer around the first gate structure and the second gate structure; removing the second gate structure and part of the fin-shaped structure to forma first trench; forming a dielectric layer into the first trench; and planarizing part of the dielectric layer to form a single diffusion break (SDB) structure. Preferably, the top surfaces of the SDB structure and the first gate structure are coplanar.
US10522650B2
A semiconductor device and method of manufacturing are provided. In an embodiment a first nucleation layer is formed within an opening for a gate-last process. The first nucleation layer is treated in order to remove undesired oxygen by exposing the first nucleation layer to a precursor that reacts with the oxygen to form a gas. A second nucleation layer is then formed, and a remainder of the opening is filled with a bulk conductive material.
US10522648B2
The invention relates to a process for manufacturing a heterojunction electronic component provided with an embedded barrier layer, the process comprising: depositing by epitaxy, in a vapour phase epitaxial growth chamber with an atmosphere exhibiting a first nonzero ammonia concentration, of a GaN precursor layer of the embedded barrier layer, comprising a first layer doped with a Mg or Fe dopant; placing, while maintaining the substrate in the chamber, the atmosphere at a second ammonia concentration at most equal to a third of the first concentration, in order to remove an upper part of the precursor layer; and then after the removal of the said upper part, while maintaining the substrate in the chamber, depositing by epitaxy of a layer of semiconductor material of the heterojunction electronic component to be manufactured, the said precursor layer then forming the embedded barrier layer under the said layer of semiconductor material.
US10522647B2
Some embodiments of the present disclosure relate to a high electron mobility transistor (HEMT) which includes a heterojunction structure arranged over a semiconductor substrate. The heterojunction structure includes a first III/V semiconductor layer, and a second III/V semiconductor layer arranged over the first III/V semiconductor layer. Source and drain regions are arranged over the second III/V semiconductor layer and are spaced apart laterally from one another. A gate structure is arranged over the heterojunction structure and is arranged between the source and drain regions. The gate structure is made of a third III-nitride material. A first passivation layer is disposed about sidewalls of the gate structure and is made of a fourth III-nitride material.
US10522641B2
Methods and structures for forming devices, such as transistors, are discussed. A method embodiment includes forming a gate spacer along a sidewall of a gate stack on a substrate; passivating at least a portion of an exterior surface of the gate spacer; and epitaxially growing a material in the substrate proximate the gate spacer while the at least the portion of the exterior surface of the gate spacer remains passivated. The passivating can include using at least one of a thermal treatment, a plasma treatment, or a thermal treatment.
US10522635B2
A semiconductor device and method of manufacture are provided. A source/drain region is formed next to a spacer, which is adjacent to a gate electrode. An implantation is performed through an implantation mask into the source/drain region as well as the first spacer, forming an implantation region within the spacer.
US10522632B2
A semiconductor structure and a method for fabricating the semiconductor structure are provided. The method includes forming a gate structure and a dielectric layer on a substrate; and forming a sidewall spacer on a sidewall surface of the gate structure. The method also includes forming a source and drain doped region in the substrate on both sides of the gate structure. The dielectric layer covers a surface of the sidewall spacer. In addition, the method includes forming a source-drain plug in the dielectric layer. The source-drain plug is connected to the source and drain doped region. Moreover, the method includes forming an isolation opening in the dielectric layer by at least partially removing the sidewall spacer. Further, the method includes forming an isolation structure in the isolation opening, wherein the isolation structure has a dielectric constant less than the sidewall spacer.
US10522628B2
A multilayer graphene composite comprising a plurality of stacked graphene layers separated from one another by an ion gel, wherein the ion gel is intercalated between adjacent graphene layers such that ions within the ion gel are able to arrange themselves at the surfaces of the graphene layers to cause a detectable change in one or more of an electrical and optical property of the graphene layers when a gate voltage is applied to a gate electrode in proximity to the ion gel.
US10522623B1
Provided herein are semiconductor structures that include germanium and have a germanium nitride layer on the surface, as well as methods of forming the same. The described structures include nanowires and fins. Methods of the disclosure include metal-organic chemical vapor deposition with a germanium precursor. The described methods also include using a N2H4 vapor.
US10522613B2
A resistance device includes a substrate, a fin on the substrate, a trench isolation structure formed around the fin. The resistance device further includes at least one first dummy gate structure on the fins, an inter-layer dielectric layer on the trench isolation structure, where the inter-layer dielectric layer covers the fin and the at least one first dummy gate structure. The resistance device further includes a resistance material layer on the inter-layer dielectric layer.
US10522605B2
A thin-film transistor (TFT) array substrate includes: a driving TFT provided on a substrate; and a switching TFT provided on the substrate and including: a switching semiconductor layer including a switching channel region, a switching source region, and a switching drain region; and a switching source electrode and a switching drain electrode contacting the switching semiconductor layer. The switching source electrode includes a source contact portion contacting the switching source region, and the switching drain electrode includes a drain contact portion contacting the switching drain region. The source contact portion is doped with ions that are different from ions of the switching source region and the drain contact portion is doped with ions that are different from ions of the switching drain region.
US10522596B2
In one embodiment, a semiconductor storage device includes a first interconnect extending in a first direction, a plurality of second interconnects extending in a second direction different from the first direction, and a plurality of first insulators provided alternately with the second interconnects. The device further includes a resistance change film provided between the first interconnect and at least one of the second interconnects and including a first metal layer or a first semiconductor layer that includes a first face provided on a first interconnect side and a second face provided on a second interconnect side, at least any of the first face and the second face having a curved plane shape.
US10522593B2
Two phase-change memory cells are formed from a first conductive via, a second conductive and a central conductive via positioned between the first and second conductive vias where a layer of phase-change material is electrically connected to the first and second conductive vias by corresponding resistive elements and insulated from the central conductive via by an insulating layer. The conductive vias each include a lower portion made of a first metal (such as tungsten) and an upper portion made of a second metal (such as copper). Drains of two transistors are coupled to the first and second conductive vias while sources of those two transistors are coupled to the central conductive via.
US10522592B2
A TMR element includes a base layer that is disposed on an upper surface of a via interconnect part, a magnetic tunnel junction that is disposed on a surface of the base layer, and an interlayer insulation layer that covers a side surface of each of the via interconnect part and the base layer. The base layer includes a stress relieving region. The magnetic tunnel junction includes a reference layer having a magnetization fixed direction, a magnetization free layer, and a tunnel barrier layer disposed between the reference layer and the magnetization free layer. The interlayer insulation layer includes an insulation material.
US10522587B2
A display panel comprises a display region, a non-display region, and a black matrix. The display region includes a plurality of pixels arranged in both a first direction and a second direction, where the plurality of pixels are arranged in the first direction to form a plurality of pixel rows and, meanwhile, arranged in the second direction to form a plurality of pixel columns, and a pixel includes a light-transmitting area. The black matrix does not overlap with the light-transmitting area. The display region includes at least one irregular edge intersecting both the first direction and the second direction. The plurality of pixels include a plurality of first pixels intersecting the at least one irregular edge and a plurality of second pixels without intersecting the at least one irregular edge, and the light-transmitting area of the first pixel is smaller than the light-transmitting area of the second pixel.
US10522584B2
Provided are a display panel, a manufacturing method thereof and a display device. The display panel includes: a first substrate and a second substrate disposed opposite to each other, and a plurality of light-emitting units and a plurality of fingerprint identification units, disposed on one side of the first substrate facing to the second substrate. Each of the plurality of light-emitting units includes a first N-type semiconductor layer and a first P-type semiconductor layer, each of the plurality of fingerprint identification units includes a second N-type semiconductor layer and a second P-type semiconductor layer. The first N-type semiconductor layer and the second N-type semiconductor layer are disposed in a same layer, and the first P-type semiconductor layer and the second P-type semiconductor layer are disposed in a same layer.
US10522577B2
An image sensor may include: a pixel array having a plurality of pixels arranged in a matrix structure; and an image array including a plurality of image dots which are arranged in a matrix structure, and implemented by output signals of the respective pixels. The position of a first pixel in the pixel array may not correspond to the position of an image dot corresponding to the first pixel in the image array, and the position of a second pixel adjacent to the first pixel in the pixel array may correspond to the position of an image dot corresponding to the second pixel in the image array.
US10522574B2
A method for manufacturing a display device is provided. The method includes a step of forming a first layer over a first substrate, a terminal electrode over the first layer, a display element over the first layer, and a peeling layer overlapping with the terminal electrode, a step of forming a second layer over a second substrate, a step of attaching the first substrate to the second substrate with a bonding layer therebetween, a step of separating the first substrate from the first layer, a step of attaching a third substrate to the first layer, a step of separating the second substrate from the second layer together with part of the bonding layer, and a step of attaching a fourth substrate to the second layer. At least one of the first layer and the second layer includes an organic film.
US10522568B2
It is an object to manufacture and provide a highly reliable display device including a thin film transistor with a high aperture ratio which has stable electric characteristics. In a manufacturing method of a semiconductor device having a thin film transistor in which a semiconductor layer including a channel formation region is formed using an oxide semiconductor film, a heat treatment for reducing moisture and the like which are impurities and for improving the purity of the oxide semiconductor film (a heat treatment for dehydration or dehydrogenation) is performed. Further, an aperture ratio is improved by forming a gate electrode layer, a source electrode layer, and a drain electrode layer using conductive films having light transmitting properties.
US10522560B2
A semiconductor device and a method of manufacturing a semiconductor device may be provided. The semiconductor device may include a source line formed over a substrate. The semiconductor device may include a channel pattern including a connection part disposed over the source line, and pillar parts protruding from the connection part in a first direction. The semiconductor device may include a well structure protruding from the connection part in the first direction and spaced apart from the source line. The semiconductor device may include a source contact structure protruding from the source line in the first direction and passing through the connection part. The semiconductor device may include a gate stack disposed between the source contact structure and the well structure and enclosing the pillar parts over the connection part.
US10522556B1
An antifuse structure includes an active area and a gate electrode over the active area. The active area includes a first body portion and a first extending portion extending in a first direction. The gate electrode includes a second body portion and a second extending portion extending in a second direction perpendicular to the first direction. The first body portion includes a first surface facing a portion of the second body portion, and the second body portion includes a second surface facing a portion of the first extending portion. The first extending portion and the second extending portion are partially overlapped in a third direction perpendicular to both the first direction and the second direction, with a dielectric layer sandwiched between the first and second extending portions, forming an intersection area.
US10522553B2
A semiconductor device includes first, second, third, and fourth active regions arranged along a first direction. The first, second, third, and fourth active regions includes channel regions and source/drain (S/D) regions of first, second, third, and fourth transistors respectively, the first and fourth transistors are of a first conductivity type, and the second and third transistors are of a second conductivity type opposite the first conductivity type. The semiconductor device further includes a fifth active region between the second and third active regions. The fifth active region includes channel regions and S/D regions of fifth and sixth transistors that are of same conductivity type. The semiconductor device further includes first, second, third, fourth, fifth, and sixth gates. The first through sixth gates are disposed over the channel regions of the first through sixth transistors respectively. The first, second, and fifth gates are electrically connected.
US10522547B2
Apparatuses and methods are disclosed. One such apparatus includes a well having a first type of conductivity formed within a semiconductor structure having a second type of conductivity. A boundary of the well intersects an active area of a tap to the well.
US10522546B2
A semiconductor device includes a substrate; semiconductor fins over the substrate and oriented lengthwise along a first direction; first multi-dielectric-layer (MDL) fins and second MDL fins over the substrate and oriented lengthwise along the first direction, wherein the first and the second MDL fins are intermixed with the semiconductor fins, wherein each of the first MDL fins and the second MDL fins includes an outer dielectric layer and an inner dielectric layer, wherein the outer dielectric layer and the inner dielectric layer have different dielectric materials; and gate structures oriented lengthwise along a second direction generally perpendicular to the first direction, wherein the gate structures are spaced from each other along the first direction, and are separated by the first MDL fins along the second direction, wherein the gate structures engage the semiconductor fins and the second MDL fins.
US10522540B2
A semiconductor device includes a semiconductor substrate; a semiconductor projection connected to the semiconductor substrate; and a gate engaging the semiconductor projection, wherein the semiconductor projection includes a first region and a second region, the second region is between the first region and the gate, and the first region is lower in height than the second region.
US10522533B1
A three-dimensional (3D) circuit structure includes a 3D insulating substrate having at least one circuit forming zone and at least one exposed contact forming zone; at least one circuit pattern portion provided on the 3D insulating substrate and having at least one circuit trace layout layer located in the circuit forming zone and at least one exposed contact located in the exposed contact forming zone and connected to the circuit trace layout layer; and an insulating encapsulation member covering at least the circuit forming zone and the circuit trace layout layer. With the insulating encapsulation member, the circuit trace layout layer is waterproof, dustproof, scratch-resistant, peeling-proof, secure for use, and compliant with safety codes of electrical insulation, enabling the 3D circuit structure in use to have stable electrical characteristics.
US10522532B2
A process for manufacturing an integrated circuit (IC) with a through via extending through a group III-V layer to a diode is provided. An etch is performed through the group III-V layer, into a semiconductor substrate underlying the group III-V layer, to form a via opening. A doped region is formed in the semiconductor substrate, through the via opening. Further, the doped region is formed with an opposite doping type as a surrounding region of the semiconductor substrate. The through via is formed in the via opening and in electrical communication with the doped region.
US10522528B2
Semiconductor devices and semiconductor cell arrays are provided herein. In some examples, a semiconductor device includes a multi-fin active region, a mono-fin active region, and an isolation feature between the multi-fin active region and the mono-fin active region. The multi-fin active region includes a first plurality of fins, a second plurality of fins parallel to the first plurality of fins, a first n-type field effect transistor (FET), and a first p-type FET. The mono-fin active region abuts the multi-fin active region. The mono-fin active region includes a first fin, a second fin different from the first fin, a second n-type FET, and a second p-type FET. The isolation feature is parallel to the first and second gate structures.
US10522519B2
Provided are a display module, a display device, and method of assembling and disassembling the display module. The display module includes a cabinet, a light-emitting diode (LED) panel mounted on the cabinet, and a coupling device configured to detachably mount the LED panel on the cabinet, wherein the coupling device comprises a first coupling member and a second coupling member, and at least one of the first coupling member and the second coupling member is configured to be moved by mutual magnetic force.
US10522515B2
Computer modules with small thicknesses and associated methods of manufacturing are disclosed. In one embodiment, the computer modules can include a module substrate having a module material and an aperture extending at least partially into the module material. The computer modules can also include a microelectronic package carried by the module substrate. The microelectronic package includes a semiconductor die carried by a package substrate. At least a portion of the semiconductor die extends into the substrate material via the aperture.
US10522507B2
A semiconductor device assembly includes a substrate having a plurality of external connections, a first shingled stack of semiconductor dies disposed directly over a first location on the substrate and electrically coupled to a first subset of the plurality of external connections, and a second shingled stack of semiconductor dies disposed directly over a second location on the substrate and electrically coupled to a second subset of the plurality of external connections. The semiconductor device assembly further includes an encapsulant at least partially encapsulating the substrate, the first shingled stack and the second shingled stack.
US10522505B2
A surface mount structure includes a substrate, a sensor, an electrical contact and a package body. The substrate has a first surface and a second surface opposite to the first surface. The sensor is disposed adjacent to the second surface of the substrate. The electrical contact is disposed on the first surface of the substrate. The package body covers the first surface and the second surface of the substrate, a portion of the sensor and a first portion of the electrical contact.
US10522498B2
A system of bonded substrates may include a first substrate, a second substrate, and a bonding layer. The first substrate may include a bonding surface, wherein a geometry of the bonding surface of the first substrate includes a plurality of microchannels. The second substrate may include a complementary bonding surface. The bonding layer may be positioned between the first substrate and the second substrate, wherein the bonding layer may fill the microchannels of the first substrate and may contact substantially the entire bonding surface of the first substrate. The bonding layer may include a metal.
US10522496B2
A semiconductor device and method utilizing a dummy structure in association with a redistribution layer is provided. By providing the dummy structure adjacent to the redistribution layer, damage to the redistribution layer may be reduced from a patterning of an overlying passivation layer, such as by laser drilling. By reducing or eliminating the damage caused by the patterning, a more effective bond to an overlying structure, such as a package, may be achieved.
US10522494B2
A semiconductor device includes a wiring board, a semiconductor chip, and a connecting member provided between a surface of the wiring board and a functional surface of the semiconductor chip. The connecting member extends a distance between the wiring board surface and the functional surface. A sealing material seals a gap space between the wiring board and the semiconductor chip. An electrode is formed at the wiring board surface and arranged outside of an outer periphery of the sealing material. A lateral distance between an outer periphery of the semiconductor chip and the outer periphery of the sealing material is between 0.1 mm and a lateral distance from the outer periphery of the semiconductor chip to the electrode.
US10522481B2
A semiconductor device includes a semiconductor substrate, a passivation layer overlying the semiconductor substrate, and an interconnect structure overlying the passivation layer. The interconnect structure includes a landing pad region and a dummy region electrically separated from each other. A protective layer is formed on the interconnect structure and has a first opening exposing a portion of the landing pad region and a second opening exposing a portion of the dummy region. A metal layer is formed on the exposed portion of landing pad region and the exposed portion of the dummy region. A bump is formed on the metal layer overlying the landing pad region.
US10522476B2
A package structure including an integrated fan-out package and plurality of conductive terminals is provided. The integrated fan-out package includes an integrated circuit component, a plurality of conductive through vias, an insulating encapsulation having a first surface and a second surface opposite to the first surface, and a redistribution circuit structure. The insulating encapsulation laterally encapsulates the conductive through vias and the integrated circuit component. Each of conductive through vias includes a protruding portion accessibly revealed by the insulating encapsulation. The redistribution circuit structure is electrically connected to the integrated circuit component and covers the first surface of the insulating encapsulation and the integrated circuit component. The conductive terminals are disposed on and electrically connected to the protruding portions of the conductive through vias, and a plurality of intermetallic compound caps are formed between the conductive terminals and the protruding portions.
US10522474B2
Embodiments of three-dimensional (3D) memory devices and methods for controlling a photoresist (PR) trimming rate in the formation of the 3D memory devices are disclosed. In an example, a method includes forming a dielectric stack over a substrate, measuring a first distance between the first trimming mark and the PR layer along a first direction, and trimming the PR layer along the first direction. The method also includes etching the dielectric stack using the trimmed PR layer as an etch mask to form a staircase, forming a second trimming mark using the first trimming mark as an etch mask, measuring a second distance between the second trimming mark and the trimmed PR layer, comparing the first distance with the second distance to determine a difference between an actual PR trimming rate and an estimated PR trimming rate, and adjusting PR trimming parameters based on the difference.
US10522470B1
A package structure including a first semiconductor die, a second semiconductor die, a molding compound, an interconnect structure, first conductive features, through insulator vias, an insulating encapsulant and a redistribution layer is provided. The molding compound is encapsulating the first semiconductor die and the second semiconductor die. The interconnect structure is disposed on the molding compound and electrically connecting the first semiconductor die to the second semiconductor die. The first conductive features are electrically connected to the first semiconductor die and the second semiconductor die, wherein each of the first conductive features has a recessed portion. The through insulator vias are disposed on the recessed portion of the first conductive features and electrically connected to the first and second semiconductor die. The insulating encapsulant is encapsulating the interconnect structure and the through insulator vias. The redistribution layer is disposed on the insulating encapsulant and over the interconnect structure.
US10522465B2
A semiconductor device may include: a semiconductor substrate; an interlayer insulating film; a contact plug penetrating the interlayer insulating film; a first metal layer covering a surface of the interlayer insulating film; a protective insulating film covering a part of of the first metal layer; and a second metal layer covering the surface of the first metal layer. A peripheral region may be a region in which the protective insulating film is located; an active region may be a region in which a plurality of first parts of the contact plug is located; and an intermediate region may be a region which is located between the peripheral region and the active region and in which a second part of the contact plug is located. The first parts may extend toward an edge portion of the protective insulating film, and the second part may extend along the edge portion.
US10522462B2
Provided is a memory device including an array of memory cells. A first bit-line coupled to memory cells of a first column of the array of memory cells. The first bit-line is disposed on a first metal layer. A second bit-line is coupled to the first bit-line. The second bit-line is disposed on a second metal layer and coupled to the first bit-line by at least one via. A word line is coupled to a row of the array of memory cells.
US10522454B2
A microelectronic package including a passive microelectronic device disposed within a package body, wherein the package body is the portion of the microelectronic package which provides support and/or rigidity to the microelectronic package. In a flip-chip type microelectronic package, the package body may comprise a microelectronic substrate to which an active microelectronic device is electrically attached. In an embedded device type microelectronic package, the package body may comprise the material in which the active microelectronic device is embedded.
US10522444B2
A surface treatment and an apparatus for semiconductor packaging are provided. In an embodiment, a surface of a conductive layer is treated to create a roughened surface. In one example, nanowires are formed on a surface of the conductive layer. In the case of a copper conductive layer, the nanowires may include a CuO layer. In another example, a complex compound is formed on a surface of the conductive layer. The complex compound may be formed using, for example, thiol and trimethyl phosphite.
US10522443B2
A module package can include a substrate; at least one device component configured to be positioned on the substrate; a module package lid configured to be positioned over the at least one device component and on the substrate, the module package lid exhibiting a plateau portion; and at least one mounting spring configured to be positioned on the module package lid, wherein the at least one mounting spring is configured to be mechanically coupled with a mounting surface and further positionally secure the module package lid and the at least one device component. Each mounting spring can include a middle portion; an end portion having a mounting hole; and a curved section between the middle portion and the end portion, the middle portion arranged to mate with the plateau portion of the module package lid when the end portion are secured to the substrate, the curved section being configured to prevent contact with a first corner portion of the module package lid.
US10522438B2
A package structure includes a redistribution layer, a chip, an encapsulant, a plurality of under ball release layers, and a plurality of solder balls. The redistribution layer includes a first surface, a second surface opposite to the first surface, and a patterned circuit layer, wherein the patterned circuit layer includes a plurality of pads protruding from the first surface. The chip is disposed on the second surface and electrically connected to the patterned circuit layer. The encapsulant is disposed on the second surface and encapsulates the chip. The under ball release layers cover the pads respectively. The solder balls are disposed on the under ball release layers and electrically connected to the pads.
US10522436B2
An embodiment method includes encapsulating a semiconductor die in an encapsulant, planarizing the encapsulant, and depositing a polymer material on the encapsulant. The method further includes planarizing the polymer material and forming a metallization pattern on the polymer material. The metallization pattern electrically connects a die connector of the semiconductor die to a conductive feature disposed outside of the semiconductor die.
US10522419B2
A semiconductor device includes a plurality of stacked gate regions spaced apart from each other on a substrate, a plurality of first epitaxial source/drain regions between the plurality of stacked gate regions, wherein the first epitaxial source/drain regions extend from sides of the plurality of stacked gate regions in a first doped region, a plurality of second epitaxial source/drain regions between the plurality of stacked gate regions and positioned over the first epitaxial source/drain regions, wherein the second epitaxial source/drain regions extend from sides of the plurality of stacked gate regions in a second doped region, and a contact region extending through a second epitaxial source/drain region of the plurality of second epitaxial source/drain regions to a first epitaxial source/drain region of the plurality of first epitaxial source/drain regions.
US10522416B2
The present disclosure provides a method, which includes forming a first fin structure and a second fin structure over a substrate, which has a first trench positioned between the first and second fin structures. The method also includes forming a first dielectric layer within the first trench, recessing the first dielectric layer to expose a portion of the first fin structure, forming a first capping layer over the exposed portion of the first fin structure and the recessed first dielectric layer in the first trench, forming a second dielectric layer over the first capping layer in the first trench while the first capping layer covers the exposed portion of the first fin feature and removing the first capping layer from the first fin structure.
US10522415B1
A semiconductor device includes a semiconductor substrate, a gate structure, an isolation structure, and a source/drain region. The semiconductor substrate includes a fin. The gate structure is disposed on the fin and is disposed straddling the fin. The isolation structure covers a sidewall and a top surface of the fin. The source/drain region is disposed in the fin and extends beyond the top surface of the fin.
US10522411B2
A method for forming a semiconductor device structure is provided. The method includes forming a dielectric layer over a substrate. The substrate has a fin structure, and the dielectric layer has a trench exposing a portion of the fin structure. The method includes forming a gate material layer in the trench. The method includes forming a planarization layer over the gate material layer. The planarization layer includes a first material that is different from a second material of the gate material layer and a third material of the dielectric layer. The method includes performing an etching process to remove the planarization layer and a first upper portion of the gate material layer so as to form a gate in the trench.
US10522406B2
A support structure for use in fan-out wafer level packaging is provided that includes, a silicon handler wafer having a first surface and a second surface opposite the first surface, a release layer is located above the first surface of the silicon handler wafer, and a layer selected from the group consisting of an adhesive layer and a redistribution layer is located on a surface of the release layer. After building-up a fan-out wafer level package on the support structure, infrared radiation is employed to remove (via laser ablation) the release layer, and thus remove the silicon handler wafer from the fan-out wafer level package.
US10522402B2
Grid self-aligned metal via processing schemes for back end of line (BEOL) interconnects are described. In an example, a method of fabricating an interconnect structure for a semiconductor die includes forming a lower metallization layer including alternating metal lines and dielectric lines above a substrate, the dielectric lines raised above the metal lines. A hardmask layer is formed on the metal lines of the lower metallization layer, between and co-planar with the dielectric lines of the lower metallization layer. A grating structure is formed above and orthogonal to the alternating metal lines and dielectric lines of the lower metallization layer. A mask is formed above the grating structure. Select regions of the hardmask layer are removed to expose select regions of the metal lines of the lower metallization layer. Metal vias are formed on the select regions of the metal lines of the lower metallization layer.
US10522398B2
A metal interconnect structure can be fabricated within an integrated circuit (IC). A recess can be created in an IC dielectric layer and a surface modulation liner can be formed by depositing two different metallic elements onto the surfaces of the recess. One metallic element can have a standard electrode potential greater than a standard electrode potential of an interconnect metal, and the other metallic element can have a standard electrode potential less than the standard electrode potential of the interconnect metal. A metal interconnect structure can be formed by filling the remainder of the recess with interconnect metal, which is physically separated from the dielectric layer by the surface modulation liner. The surface topography of the metal interconnect structure can be modulated with a polishing process, by removing a top portion of the interconnect metal and a top portion of the surface modulation liner.
US10522397B2
A miniaturized transistor is provided. A first layer is formed over a third insulator over a semiconductor; a second layer is formed over the first layer; an etching mask is formed over the second layer; the second layer is etched using the etching mask until the first layer is exposed to form a third layer; a selective growth layer is formed on a top surface and a side surface of the third layer; the first layer is etched using the third layer and the selective growth layer until the third insulator is exposed to form a fourth layer; and the third insulator is etched using the third layer, the selective growth layer, and the fourth layer until the semiconductor is exposed to form a first insulator.
US10522395B1
A metal pattern comprising interconnected small metal segments, medium metal segments, and large metal segments. At least one of the small metal segments comprises a pitch of less than about 45 nm and the small metal segments, medium metal segments, and large metal segments are separated from one another by variable spacing. Semiconductor devices comprising initial metallizations, systems comprising the metal pattern, and methods of forming a pattern are also disclosed.
US10522389B2
A transfer printing method provides a first wafer having a receiving surface, and removes a second die from a second wafer using a die moving member. Next, the method positions the second die on the receiving surface of the first wafer. Specifically, to position the second die on the receiving surface, the first wafer has alignment structure for at least in part controlling movement of the die moving member.
US10522388B1
An SOI IC includes a polysilicon/silicon plug extending through the buried insulation layer between a P-type handle layer and a P-type device layer. An N-type well region is formed in the device layer over the polysilicon/silicon plug, and then a high-voltage (HV) device is formed in the well region such that part of its drift region is located over the polysilicon/silicon plug. Doping of the well region, the polysilicon/silicon plug and the handle layer is coordinated to form a P-N junction diode that couples the HV device, by way of the polysilicon/silicon plug, to a ground potential applied to the handle layer, thereby increasing the HV device's breakdown voltage by expanding its depletion region to include the handle layer. The polysilicon/silicon plug grows in holes formed through the insulation layer during the epitaxial silicon growth process used to form the device layer.
US10522387B2
An embodiment is an apparatus. The apparatus includes: a collective wafer platter including a plurality of individual wafer pockets, the individual wafer pockets having respective individual wafer platters, the individual wafer platters configured to rotate around respective first axes, the collective wafer platter configured to rotate around a second axis; a motor coupled to the collective wafer platter; and a control unit configured to control the motor such that the individual wafer platters rotate around the respective first axes, and the collective wafer platter rotates around the second axis.
US10522382B2
A system and method for a semiconductor wafer carrier is disclosed. An embodiment comprises a semiconductor wafer carrier wherein conductive dopants are implanted into the carrier in order to amplify the coulombic forces between an electrostatic chuck and the carrier to compensate for reduced forces that result from thinner semiconductor wafers. Another embodiment forms conductive layers and vias within the carrier instead of implanting conductive dopants.
US10522380B2
Methods for determining substrate placement in a process chamber are provided herein. In some embodiments, a method for determining substrate placement in a process chamber includes receiving sensor readings from a plurality of sensor arrays attached to the calibration substrate, calculating locations of a plurality of edge locations of a support member beneath the sensors based on the sensor readings, calculating a center point location of the support member based on the locations of the plurality of edge locations of the support member and determining an offset between the center point location and a location of the center of the calibration substrate.
US10522376B2
A die-die inspection image can be aligned using a method or system configured to receive a reference image and a test image, determine a global offset and rotation angle from local sections on the reference image and test image, and perform a rough alignment de-skew of the test image prior to performing a fine alignment.
US10522366B2
Disclosed is a method of fabricating a semiconductor device. The method includes forming a lower layer on a substrate, forming on the lower layer a sacrificial layer and an etching pattern, forming a first spacer layer on the sacrificial layer and the etching pattern, etching the sacrificial layer and the first spacer layer to form a sacrificial pattern and a first spacer on at least a portion of a top surface of the sacrificial pattern, forming a second spacer layer on the sacrificial pattern and the first spacer, etching the second spacer layer and the first spacer to form a second spacer on a sidewall of the sacrificial pattern, and partially etching the lower layer to form a pattern. The second spacer is used as an etching mask to partially etch the lower layer.
US10522335B2
A mass spectrometry data processing apparatus includes a data processing part and a calculation part. The calculation part calculates differences in mass among all pieces of the peak data from the peak list, calculates an intensity ratio that is a ratio of intensity between two pieces of the peak data used in calculating the difference, and generates difference-intensity ratio data. Further, the calculation part retrieves difference-intensity ratio data having the difference included in a section, calculates a sum of the intensity ratio of the retrieved difference-intensity ratio data, and calculates difference-intensity ratio distribution data.
US10522332B2
A chamber has an upper housing and a lower housing and receives a reaction gas. A first plasma source includes electron beam sources providing electron beams into the upper housing to generate an upper plasma. A second plasma source includes holes generating a lower plasma within the holes connecting the upper housing and the lower housing. Radicals of the upper plasma, radicals of the lower plasma, and ions of the lower plasma are provided, through the holes, to the lower housing so that the lower housing has radicals and ions at a predetermined ratio of the ions to the radicals in concentration. The second plasma source divides the chamber into the upper housing and the lower housing. A wafer chuck is positioned in the lower housing to receive a wafer.
US10522326B2
A method of locating a substrate within a field of view of an imaging system includes acquiring an image of a first marker on a substrate in the field of view. The first marker has a first spatial pattern representing a position of the first marker relative to the substrate. The method also includes determining possible positions of the substrate based on the first spatial pattern and moving the substrate relative to the field of view based on the possible positions of the substrate. The method also includes acquiring an image of a second marker on the substrate in the field of view. The second marker has a second pattern representing a position of the second marker relative to the substrate. The method further includes determining the position of the substrate relative to the field of view based on the position of the second marker on the substrate.
US10522313B2
A reversing linear solenoid polarized in a permanent magnetic manner having a first and second end stroke position as well as at least one armature, wherein it has a spring system or is operated at such a spring system which exerts a force in the direction of the center stroke position on the armature or armatures in the end stroke position(s). The spring system and the reversing linear solenoid are coordinated with one another such that the armature or armatures are held in a permanent magnetic manner against the spring force in both end stroke positions. The spring system is configured such that the potential energy (elastically) stored by movement of the armature or armatures into its/their end stroke movements is of equal magnitude. If external restoring forces caused by the application are present, they must be taken into account in the design of the spring system.
US10522310B2
An extinguishing gas filtering device for an electric current switchgear with separable contacts, including an electric arc extinguishing chamber, includes, assembled together an inlet part for the extinguishing gases, made of a metal material and including an inlet aperture intended to be fluidically connected with an extinguishing gas outlet of the switchgear; an outlet aperture; a flared wall extending between the inlet and outlet apertures; a gas diffuser, which covers the outlet aperture, being planar in shape and including through-apertures; a filter made of porous metal foam, placed at the output of the gas diffuser.
US10522308B2
Provided is a multi-operating switch device for a vehicle, including: a housing unit; a substrate; a switch shaft unit; a rotary switch unit; a directional switch unit; and a push switch unit. The directional switch unit includes: a directional slide part within the housing unit; a directional switch disposed on the substrate, and configured to be operated by a change in the position of the directional slide part to generate a signal indicating the change in the position of the directional slide part; and a directional return part. The directional switch includes: a directional switch housing; and a directional switch knob partially exposed to the outside from one surface of the directional switch housing to contact with the directional slide part so that when the directional switch knob is pressedly rotated pivotally about an axis parallel with the substrate, it is received in the directional switch housing.
US10522300B2
A metal foil with a karstified topography having a surface morphology in which a maximum peak height minus a maximum profile depth is greater than 0.5 μm and extends into the surface at least 5% of the foil thickness, a root mean square roughness is at least about 0.2 μm measured in a direction of greatest roughness, and an oxygen abundance is less than 5 atomic %. The foil may be composed of aluminum, titanium, nickel, copper, or stainless steel, or an alloy of any thereof, and may have a coating composed of nickel, nickel alloy, titanium, titanium alloy, nickel oxide, titanium dioxide, zinc oxide, indium tin oxide, or carbon, or a mixture or composite of any thereof. The foil may form part of a metal electrode, current collector, or electrochemical interface. Further described is a method for producing the foil by laser ablation in a vacuum.
US10522299B2
Provided is a negative-electrode active material for a power storage device that has a low operating potential, can increase the operating voltage of the power storage device, and has excellent cycle characteristics. The negative-electrode active material for a power storage device, the negative-electrode active material containing, in terms of % by mole of oxide, 1 to 95% TiO2 and 5 to 75% P2O5+SiO2+B2O3+Al2O3+R′O (where R′ represents at least one selected from Mg, Ca, Sr, Ba, and Zn) and containing 10% by mass or more amorphous phase.
US10522297B2
A power storage device has a power storage element and an electrolytic solution. The power storage element includes an anode body, a cathode body opposed to the anode body, and a separator interposed between the anode body and the cathode body. The separator includes a separator base material and a conductive polymer deposited on the separator base material. The power storage element is impregnated with the electrolytic solution. The separator has a first surface layer, which includes a first surface opposed to the anode body, and a second surface layer, which includes a second surface opposed to the cathode body. An amount of the conductive polymer deposited in a first separator half body, which is a part from a center of the separator to the first surface, is greater than an amount of the conductive polymer deposited in a second separator half body, which is a part from the center of the separator to the second surface.
US10522292B2
A multi-layer ceramic capacitor includes a ceramic body, a first external electrode, and a second external electrode. The ceramic body includes ceramic layers laminated along a first direction, first internal electrodes and second internal electrodes that are alternately disposed between the ceramic layers, a first end surface and a second end surface that are oriented in a second direction orthogonal to the first direction, and a first inner groove and a second inner groove that are respectively formed in the first end surface and the second end surface along the first direction. The first and second external electrodes respectively cover the first and second end surfaces, the first internal electrodes being drawn to the first end surface and protruding in the first inner groove, the second internal electrodes being drawn to the second end surface and protruding in the second inner groove.
US10522291B2
A multilayer ceramic capacitor includes: a ceramic multilayer structure having ceramic dielectric layers and internal electrode layers alternately stacked, the internal electrode layers being mainly composed of a transition metal other than an iron group, end edges of the internal electrode layers being alternately exposed to a first end face and a second end face; and a pair of external electrodes provided on the first end face and the second end face, wherein the external electrode includes a base conductive layer that includes glass of less than 7 weight % and is mainly composed of a transition metal other than an iron group or a noble metal, and a first plated film that covers the base conductive layer, has a thickness that is half of a thickness of the base conductive layer or more and is mainly composed of a transition metal other than an iron group.
US10522285B2
A multilayer ceramic capacitor (MLCC) includes a body including first dielectric layers and second dielectric layers, the body including first to sixth surfaces, a second surface, a third surface, a fourth surface, a fifth surface and a sixth surface; first internal electrodes disposed on the first dielectric layers, exposed to the third surface, the fifth surface, and the sixth surface, and spaced apart from the fourth surface by first spaces; second internal electrodes disposed on the second dielectric layers to oppose the first internal electrodes with the first dielectric layers or the second dielectric layers interposed therebetween, exposed to the fourth surface, the fifth surface, and the sixth surface, and spaced apart from the third surface by second spaces; first dielectric patterns disposed in at least a portion of the first spaces, and second dielectric patterns disposed in at least a portion of the second spaces; and lateral insulating layers.
US10522273B2
A joystick assembly is disclosed. In embodiments, the joystick controls a boom and aids in insulating a user from potential electric shock. Handle utilized by the operator may be made of, or at least one surface coated or covered in, material highly-resistant to electric current. The highly-resistant material may also extend to other components such as, a connecting rod, and a mounting base. The highly-resistant components may separate the operator from electrically charged components. As well as separating the operator from potentially electrically charged components, the rod may be received at the base by force measuring sensors, or strain measuring sensors may be attached to the rod. This allows the handle and rod to be stationary and, in embodiments, rigid, and only the applied force to be measured, thus decreasing the number of components needed in the assembly.
US10522263B2
An aluminum alloy wire composed of an aluminum alloy, wherein the aluminum alloy contains more than or equal to 0.03 mass % and less than or equal to 1.5 mass % of Mg, more than or equal to 0.02 mass % and less than or equal to 2.0 mass % of Si, and a remainder of Al and an inevitable impurity, Mg/Si being more than or equal to 0.5 and less than or equal to 3.5 in mass ratio, and the aluminum alloy wire has a dynamic friction coefficient of less than or equal to 0.8.
US10522262B2
An apparatus to perform a CT scan of an object of interest with a reduced radiation dose including: an X-ray source configured to circularly rotate about the object of interest, the X-ray source configured to generate an X-ray beam; a detector assembly configured to move in tandem with the X-ray source on the opposite side of the X-ray source with respect to the object of interest, wherein the detector assembly is fixed with respect to the X-ray source and configured to detect the X-ray beam on a side of the object of interest opposite to the X-ray source after the X-ray beam passes through the object of interest; a 6-DOF collimator coupled to the X-ray source and comprising a plate with a hole disposed within the plate, wherein an aperture of the X-ray beam is dynamically adjusted by controlling a 3-D pose of the plate.
US10522260B2
The invention concerns a package for transporting and/or storing radioactive materials. The package comprises a wall element (26) and a cooling element (31, 32) attached to the wall element (26) and protruding from the wall element (26) towards the outside of the package. The cooling element (31, 32) comprises a base (40) and at least one fin (35) rigidly connected to the base (40). The base (40) extends to either side of the fin (35) respectively towards two opposing lateral ends of the base, each of the lateral ends being attached to the wall element (26) via a weld.
US10522248B2
A mechanism is provided in a data processing system comprising a processor and a memory, the memory comprising instructions that are executed by the processor to specifically configure the processor to implement a medical imaging story board creation engine. The medical imaging story board creation engine executing in the data processing system receives a patient data structure comprising a medical imaging study comprising a plurality of electronic medical images. The medical imaging story board creation engine analyzes the patient data structure to determine a modality of the medical imaging study. The medical imaging story board creation engine determines, based on the determined modality of the medical imaging study, for each electronic image in the medical imaging study, at least one of an image mode or viewpoint. The medical imaging story board creation engine performs a saliency feature extraction operation on the electronic medical images in the medical imaging study based on the image mode or viewpoint of each of the electronic medical images. The medical imaging story board creation engine selects a subset of electronic medical images based on results of the saliency feature extraction. The medical imaging story board creation engine generates and outputs a collection of selected electronic medical images based on the selection of the subset of electronic medical images to form a medical imaging story board.
US10522242B2
Disclosed herein are methods for determining the copy number of a chromosome in a fetus in the context of non-invasive prenatal diagnosis. In an embodiment, the measured genetic data from a sample of genetic material that contains both fetal DNA and maternal DNA is analyzed, along with the genetic data from the biological parents of the fetus, and the copy number of the chromosome of interest is determined. In an embodiment, the maternal serum is measured using a single-nucleotide polymorphism (SNP) microarray, along with parental genomic data, and the determination of the chromosome copy number is used to make clinical decisions pertaining to the fetus.
US10522239B2
Described herein is technology for determining the 2-D or 3-D atomic resolution structure of a polynucleotide bound to and/or interacting with another molecule, for example a small molecule. In some aspects of the technology, NMR and isotopic labeling strategies are used. The technology described herein is useful for a plurality of applications including but not limited to drug discovery and chemical biology probe discovery.
US10522238B1
A memory correcting method includes steps: providing a memory with a plurality of memory bytes; respectively adding a plurality of correcting bytes to the plurality of memory bytes; providing a plurality of non-volatile compared memory bytes; detecting whether there are any underperforming bits in the plurality of memory bytes, the plurality of correcting bytes, and the plurality of compared memory bytes of the memory to complete the correction. Alternatively, the method respectively provides a plurality of compared memory address bytes for the plurality of memory bytes and for the plurality of correcting bytes for labeling underperforming-bit addresses. Then, the method detects whether there are any underperforming bits in the plurality of memory bytes, the plurality of correcting bytes, and the plurality of compared memory address bytes of the memory to complete the correction.
US10522235B2
Various embodiments, disclosed herein, include apparatus and methods of using the apparatus having a core array of memory cells arranged as data storage elements; and an array of latches to store repair information for the core array. Each latch can be structured as a static random access memory cell. Additional apparatus, systems, and methods are disclosed.
US10522226B2
Numerous embodiments are disclosed for a high voltage generation algorithm and system for generating high voltages necessary for a particular programming operation in analog neural memory used in a deep learning artificial neural network. Different calibration algorithms and systems are also disclosed. Optionally, compensation measures can be utilized that compensate for changes in voltage or current as the number of cells being programmed changes.
US10522219B2
A method of operating a semiconductor memory device may include increasing threshold voltage of memory cells by performing an LSB program operation on the memory cells having first state, decreasing threshold voltage of memory cells to be programmed to second state of the memory cells to a level lower than a first level in unit of a memory cell for an MSB program operation, and increasing threshold voltage of memory cells to be programmed to third state of the memory cells to a level higher than a second level, which is higher than the first level, in unit of a memory cell for an MSB program operation.
US10522205B1
Apparatuses and methods for reducing row address (RAS) to column address (CAS) delay are disclosed. An example apparatus includes a memory including a memory cell coupled to a first digit line in response to a wordline being set to an active state and a sense amplifier coupled to the first digit line and to a second digit line. The sense amplifier is configured to perform a threshold voltage compensation operation to bias the first digit line and the second digit line based on a threshold voltage difference between at least two circuit components of the sense amplifier. The apparatus further comprising a decoder circuit coupled to the wordline and to the sense amplifier. In response to an activate command, the decoder circuit is configured to initiate the threshold voltage compensation operation and, during the threshold voltage compensation operation, to the set the wordline to the active state.
US10522200B2
A two pin communication interface bus and control circuits are used with circuit boards, integrated circuits, or embedded cores within integrated circuits. One pin carries data bi-directionally and address and instruction information from a controller to a selected port. The other pin carries a clock signal from the controller to a target port or ports in or on the desired circuit or circuits. The bus may be used for serial access to circuits where the availability of pins on ICs or terminals on cores is minimal. The bus is used for communication, such as serial communication related to the functional operation of an IC or core design, or serial communication related to test, emulation, debug, and/or trace operations of an IC or core design.
US10522198B2
A semiconductor memory device includes a sense amplifier, a voltage supply circuit and a voltage supply control circuit. The sense amplifier may be activated by receiving driving voltages from first to third voltage supply lines to detect and amplify voltage levels of a data line and a data bar line. The voltage supply circuit may apply the driving voltages to the first to third voltage supply lines in response to first to third voltage supply signals and a bias control signal. The voltage supply control circuit may generate the first to third voltage supply signals and the bias control signal in response to an active signal.
US10522195B2
There are provided a memory system and a method for operating the same. A memory system includes: a controller configured to generate and output a first command corresponding to a normal operation or a second command corresponding to a deep power down (DPD) mode; and a semiconductor memory device configured to perform the normal operation in response to the first command, wherein the normal operation is performed using an internal power voltage generated by down-converting a first external power voltage, and operate in the DPD mode in response to the second command, wherein, in the DPD mode, the semiconductor memory device operates using a second external power voltage as the internal powervoltage.
US10522183B2
There is provided a signal processing apparatus and a signal processing method capable of allowing data recorded at a high density to be robustly reproduced. A frame sync (FS) is restored by performing maximum likelihood decoding of the FS according to a time-varying trellis with a state and a state transition being limited according to a time, in maximum likelihood decoding of a reproduction signal reproduced from a disk-shaped recording medium, the FS representing a head of a frame, the FS of the frame being arranged at the head of the frame, the FS being recorded at the same positions in a track direction in two adjacent tracks.
US10522180B2
The magnetic tape has a nonmagnetic layer containing nonmagnetic powder and binder on a nonmagnetic support, and a magnetic layer containing ferromagnetic powder and binder on the nonmagnetic layer; wherein the combined thickness of the nonmagnetic layer and the magnetic layer is less than or equal to 0.60 μm, the coefficient of friction as measured on the base portion of the surface of the magnetic layer is less than or equal to 0.35, at least the magnetic layer contains one or more components selected from the group consisting of a fatty acid and a fatty acid amide, and a C—H derived carbon, C, concentration calculated from a C—H peak area ratio in a C1s spectrum obtained by X-ray photoelectron spectroscopy conducted at a photoelectron take-off angle of 10 degrees on the surface of the magnetic layer is greater than or equal to 45 atom %.
US10522179B2
A magnetic tape is provided in which the total thickness of the non-magnetic layer and the magnetic layer is equal to or smaller than 0.60 μm. The magnetic layer includes ferromagnetic hexagonal ferrite powder and an abrasive. The percentage of a plan view maximum area of the abrasive confirmed in a region having a size of 4.3 μm×6.3 μm of the surface of the magnetic layer by plane observation using a scanning electron microscope, with respect to the total area of the region, is equal to or greater than 0.02% and less than 0.06%. Further, the tilt cos θ of the ferromagnetic hexagonal ferrite powder with respect to a surface of the magnetic layer acquired by cross section observation performed by using a scanning transmission electron microscope is 0.85 to 1.00.
US10522170B2
A method for acquiring the number of modified frames for active sound, and a method and apparatus for voice activity detection are disclosed. Firstly, a first voice activity detection decision result and a second voice activity detection decision result are obtained (501), the number of hangover frames for active sound is obtained (502), and the number of background noise updates is obtained (503), and then the number of modified frames for active sound is calculated according to the first voice activity detection decision result, the number of background noise updates and the number of hangover frames for active sound (504), and finally, a voice activity detection decision result of a current frame is calculated according to the number of modified frames for active sound and the second voice activity detection decision result (505).
US10522157B2
A method and system are implemented in a stereo sound signal encoding system for time domain down mixing right and left channels of an input stereo sound signal into primary and secondary channels. Correlation of the primary and secondary channels of previous frames is determined, and an out-of-phase condition of the left and right channels is detected based on the correlation of the primary and secondary channels of the previous frames. The left and right channels are time domain down mixed, as a function of the detection, to produce the primary and secondary channels using a factor β, wherein the factor β determines respective contributions of the left and right channels upon production of the primary and secondary channels.
US10522156B2
An apparatus for generating a representation of a bandwidth-extended signal on the basis of an input signal representation includes a phase vocoder configured to obtain values of a spectral domain representation of a first patch of the bandwidth-extended signal on the basis of the input signal representation. The apparatus also includes a value copier configured to copy a set of values of the spectral domain representation of the first patch, which values are provided by the phase vocoder, to obtain a set of values of a spectral domain representation of a second patch, wherein the second patch is associated with higher frequencies than the first patch. The apparatus is configured to obtain the representation of the bandwidth-extended signal using the values of the spectral domain representation of the first patch and the values of the spectral domain representation of the second patch.
US10522151B2
Various disclosed implementations involve processing and/or playback of a recording of a conference involving a plurality of conference participants. Some implementations disclosed herein involve analyzing conversational dynamics of the conference recording. Some examples may involve searching the conference recording to determine instances of segment classifications. The segment classifications may be based, at least in part, on conversational dynamics data. Some implementations may involve segmenting the conference recording into a plurality of segments, each of the segments corresponding with a time interval and at least one of the segment classifications. Some implementations allow a listener to scan through a conference recording quickly according to segments, words, topics and/or talkers of interest.
US10522138B1
A computer-implemented method and supporting system transcribes spoken words being monitored from a telephonic interaction among two or more individuals. Telephonic interactions among the individuals are monitored, and at least two of the individuals are each assigned to a separate channel. While still being monitored, each of the channels is assigned a context-based speech recognition models, and in substantially real-time, the monitored telephonic interaction is transcribed from speech to text based on the different assigned models.
US10522133B2
Techniques for error correction using a history list comprising at least one misrecognition and correction information associated with each of the at least one misrecognitions indicating how a user corrected the associated misrecognition. The techniques include converting data input from a user to generate a text segment, determining whether at least a portion of the text segment appears in the history list as one of the at least one misrecognitions, if the at least a portion of the text segment appears in the history list as one of the at least one misrecognitions, obtaining the correction information associated with the at least one misrecognition, and correcting the at least a portion of the text segment based, at least in part, on the correction information.
US10522132B2
Disclosed is an ultrasound array comprising a plurality of ultrasound transducer elements (20) on a carrier (10), said carrier further carrying an actuator arrangement (30, 30′) of a material having an adjustable shape in response to an electromagnetic stimulus, e.g. an electro active polymer or optically responsive polymer, wherein the material is arranged to change the orientation of said ultrasound transducer elements in response to said stimulus. This facilitates configurable beam shaping and/or body contour matching with the ultrasound array. An ultrasound system (100) comprising such an ultrasound array is also disclosed.
US10522127B2
A conversion-to-note apparatus includes: a key which is operated by a user; and a processor. The processor obtains, from a memory, first information and second information. The first information is information to associate a key operation on the key with an open/close state of a tone hole or virtual tone hole. The second information is information to associate the open/close state of the tone hole or virtual tone hole with a note. Further, the processor identifies, based on the first information, the open/close state of the tone hole or virtual tone hole for the key operation detected. Further, the processor determines, based on the second information, the note for the identified open/close state of the tone hole or virtual tone hole.
US10522108B2
Methods, systems, and devices for refreshing a display of a device are described. A device may identify a type of content to be displayed. For example, the type of content may be associated with a given application. The device may determine, based at least in part on the type of content, a periodicity for a histogram analysis operation for the display. The device may then perform the histogram analysis operation according to the periodicity. For example, the device may compare a histogram for a frame of the content to a scene change threshold according to the periodicity. The device may determine one or more pixel adjustment parameters for the display based at least in part on the histogram analysis operation. The device may display one or more frames on the display based at least in part on the one or more pixel adjustment parameters.
US10522107B2
A data driver includes shift registers, sampling latches, holding latches, and a data sensing unit. The shift registers generate sampling pulses by shifting a source start pulse in response to a source sampling clock. Each of the sampling latches receives current data and stores the current data in response to each of the sampling pulses. Each of the holding latches receives the current data stored in each of the sampling latches, and stores the received current data in response to a source output enable signal. The data sensing unit receives the current data corresponding to an i-th sampling latch of the sampling latches or an i-th holding latch of the holding latches (i is a positive integer) and previous data stored in the i-th sampling latch or the i-th holding latch, compares the current data with the previous data, and generates control data based on the comparison result.
US10522092B2
An electronic paper display apparatus and a driving method thereof are provided. The electronic paper display apparatus includes an electronic paper display panel and a control chip. The control chip is coupled to the electronic paper display panel. The control chip is configured to generate a clock signal and simulate a driving signal according to the clock signal and panel control data. The control chip drives the electronic paper display panel by utilizing the clock signal and the driving signal.
US10522083B1
The present disclosure relates to an organic light-emitting diode (OLED) driving circuit, including: a switch thin film transistor (TFT), a driving TFT, a storage capacitor, a third TFT, a sixth TFT, an OLED, and an elimination module. A gate of the third TFT is configured to receive reset signals, a first end of the third TFT is configured to receive a reset voltage, and a second end of the third TFT is electrically connected to the first node. A gate of the sixth TFT is configured to receive enabling signals, and a first end of the sixth TFT is electrically connected the second node. An elimination module is electrically connected to the first electrode of the storage capacitor and the first end of the driving TFT. The elimination module is configured to receive the data voltage and the power supply voltage.
US10522077B2
An organic light-emitting display can include a display panel including sensing lines connected to pixels; a current integrator configured to receive current from a pixel through a sensing line connected to a first input terminal, receive a reference voltage through a reference voltage line connected to a second input terminal, and swap a path through which the current applied through the first input terminal flows and a path through which the reference voltage applied through the second input terminal is supplied; a sampling part including a first sample and hold circuit for sampling a first output voltage of the current integrator and a second sample and hold circuit for sampling a second output voltage of the current integrator, subsequent to the first output voltage, which outputs the first and second output voltages sampled by the first and second sample and hold circuits simultaneously through a single output channel.
US10522073B2
The present disclosure provides a sensing circuit and a voltage compensation method. With the sensing circuit according to the present disclosure, a capacitance value of a capacitor to be measured on an internal sensing line of a display panel is determined, a compensation voltage for the internal sensing line is determined according to the capacitance value of the capacitor to be measured, and then voltage compensation is performed on the internal sensing line according to the compensation voltage corresponding to the capacitor to be measured.
US10522061B2
In one embodiment, a vehicle mirror includes a heads-up display (HUD) projector, an on-board diagnostics (OBD) transceiver, and one or more processors. The processors access OBD data received by the OBD transceiver from an OBD port of a vehicle. The processors further determine an identification of the vehicle from the accessed OBD data and determine one or more calibration parameters for the HUD projector based on the determined identification of the vehicle. The one or more calibration parameters are operable to position a displayed image from the HUD projector onto a HUD reflector within a line-of-sight of a driver of the vehicle. The processors further send one or more instructions based on the one or more calibration parameters to the HUD projector.
US10522054B2
Dynamic industrial vehicle monitoring for modification of vehicle operator behavior comprises identifying a metric that characterizes an event associated with the operation of an industrial vehicle, the metric having at least one behavior modification action and at least one performance parameter to evaluate the event against. Monitoring operation of the industrial vehicle is carried out for the event. Upon detecting an occurrence of the event, event data is recorded that characterizes a response of a vehicle operator to the event. The recorded event data is evaluated against at least one performance parameter associated with the corresponding metric to determine whether the vehicle operator demonstrated appropriate behavior for the event. A vehicle operator score is updated based upon the evaluation and the updated vehicle operator score is communicated.
US10522046B2
In some examples, a system for transmitting a location of an ownship vehicle is configured to be mounted on the ownship vehicle and includes a positioning system configured to receive positioning signals. In some examples, the system also includes a cellular transceiver, a surveillance transceiver, and processing circuitry configured to determine a position of the ownship vehicle based on the positioning signals. In some examples, the processing circuitry is further configured to determine that the ownship vehicle is located in an identified risk volume based on the position of the ownship vehicle and to cause the surveillance transceiver and the cellular transceiver to simultaneously transmit surveillance signals and cellular signals indicating the position of the ownship vehicle in response to determining that the ownship vehicle is located in the identified risk volume.
US10522042B2
A vehicular exterior rearview mirror assembly includes a blind zone indication module that includes a plastic housing having a front end configured for attaching the blind zone indication module at the rear side of the mirror reflective element. When at least one light emitting diode of the blind zone indication module is electrically powered, light emitted by the light emitting diode exits the blind zone indication module via a light-transmitting portion of the front end of the plastic housing of the blind zone indication module. With the blind zone indication module disposed at the mirror reflective element, and with the light-transmitting portion of the front end of the plastic housing juxtaposed with a light-transmitting aperture of the mirror back plate, light emitted by the light emitting diode passes through the mirror reflective element.
US10522038B2
Systems for automatically warning at least one nearby vehicle of a potential safety hazard in or near a roadway, including one or more sensors configured to detect a potential safety hazard in or near a roadway; a memory containing computer-readable instructions for generating a message including at least one of a location of the one or more sensors and a location of the potential safety hazard; a processor configured to read the computer-readable instructions from the memory and generate the message; and a transmitter configured to wirelessly transmit the message to at least one nearby vehicle. Systems for coordinating actions of a first vehicle and a second vehicle upon detection of a potential safety hazard in or near a roadway, including in part evaluating whether the actions conflict and, if so, requesting that the first vehicle execute alternative actions for avoiding or mitigating risk of collision. Corresponding methods are disclosed.
US10522029B1
Techniques are described for handling duress input. For example, techniques are described for handling duress input provided to a mobile application that controls a monitoring system located at a fixed property.
US10522023B2
Embodiments of systems, apparatus, and/or methods are described for enhanced situational awareness of dispatchers and/or first responders associated with responding to an incident such as an emergency situation by assigning mobile emergency units to a scene of emergency. As such, an emergency response system is disclosed. In some embodiments, the disclosed emergency response system provides an electronic platform for collaboration or partnership involving two or more first responders. In some partnership embodiments, the disclosed emergency response system provides a ranked list of potential candidates than can be assigned to respond to the incident. For example, the potential candidates can be mobile emergency units belonging to a first responder and/or its partner(s). Various beneficial aspects of partnerships and their technical implementations are discussed in detailed herein.
US10522018B1
A system includes an energy production device, a tampering detection system comprising a plurality of sensors, and a control system in communication with the plurality of sensors. The control system is configured to detect a candidate for a tampering event, determine if the candidate is a tampering or a normal operational error by comparing a first order condition to a predetermined threshold, and, when the predetermined threshold is not met, comparing the candidate to a subsequent order condition until the threshold is met, and direct an undertaking of a countermeasure when the candidate is a determined tampering or undertaking a maintenance when the candidate is a determined normal operational error.
US10522014B2
A surveillance system and method with at least one wireless input capture device ICD(s) and a corresponding digital input recorder (DIR) and/or another ICD, including the steps of providing the base system; at least one user accessing the DIR via user interface either directly or remotely; the DIR and/or ICD searching for signal from the ICD(s) and establishing communication with them, and the system providing for input capture and data transmission prioritization, thereby providing a secure surveillance system having wireless communication for monitoring a target environment with prioritization capabilities.
US10522004B2
A gaming system implements a method of gaming. The gaming system includes one or more gaming devices configured to enable a player to place a wager for play of a wagering game, and each gaming device includes a player tracking/marketing module (PTM). A plurality of avatars are selectable by a player, and after receiving one or more inputs from the player relating to the avatars selected and credit allocation for each selected avatar, one is designated as the active avatar for game play. The system receives, via a credit input mechanism, a credit wager to initiate play of a wagering game, and in response to a user input triggering game play via the gaming device, the PTM records credit wagered for game play against the active avatar. Moreover, in response to a winning outcome occurring in a game outcome for the triggered game play, the PTM records any award for the game outcome against one or more avatars in accordance with allocation criteria.
US10522002B2
Systems and methods described herein are for use with a gaming table including an opening, below which is located a drop box, and that is covered by a door when the door is in a closed position. A camera is positioned relative to the door to capture an image of tokens resting on the door. A camera trigger detects when the door is being moved from a closed position to an open position, and selectively triggers the camera to capture an image of tokens resting on the door before they drop into the drop box. Processor(s) analyze images, stored in memory, of the tokens resting on the door to determine a value of each of the tokens, calculate a total value of the tokens dropped into the drop box, and attribute to dealers a subtotal of the total value of the tokens dropped into the drop box by the dealer.
US10521995B2
A crane or hanger-type cargo lane device includes two parallel half housings, a chain mounting assembly, a roller chain assembly, a link, and a drive mechanism. The half housing includes a main plate, bent extensions on top, and a slit. The chain mounting assembly is between the main plates and includes two parallel frames, limit members each in the frame and having a slot, and a shuttle member between slots and having a bottom pawl. The roller chain assembly is between one set of the frame and the limit member and the other set of the frame and the limit member. The roller chain assembly includes two sets of plate members each having a top tooth and a bottom hook; and rollers each driven through the plate members of two sets. The bifurcated link is secured to the shuttle member through the slits. The drive mechanism rotates the link.
US10521988B1
A guest management system configured to facilitate the provision of services to guest. A guest's personal computing device, and provided computing devices, are used to request and receive products and services. The services provided may be tacked and scored based on either feedback from guests and/or objective measurements of the performance of service providers. Services are optionally dependent on an automatically determined location of a guest and may include access to third party accounts of the guests.
US10521987B1
A vehicle charging system includes a locking mechanism to secure a charge plug to a charge port of a vehicle. The system includes a wireless transceiver and a near field communication transceiver. The system further includes a controller programmed to, responsive to receiving a request to disengage the locking mechanism during charging, send the request to a vehicle owner via the wireless transceiver, and, responsive to receiving an unlock command via the wireless transceiver, disengage the locking mechanism.
US10521984B1
Techniques described and suggested in the present document include access-card systems and methods that are resistant to attack. In certain implementations, a card reader transmits a challenge message to an access card. When the access card receives the challenge message, the access card validates the challenge message, and then generates a response message based at least in part on the information contained in the challenge message. A security server validates the response message, and when the security server determines that the response is secure, valid, and from an authorized access card, the security server grants access to a physical space. In some implementations, the challenge and response messages are digitally signed using a cryptographic key. Additional implementations include various tests that, when performed on the challenge and/or response messages detect and defeat many attempts to compromise the access-card system.
US10521982B2
A diagnostic system of a vehicle includes an energy absorber sandwiched between a front bumper fascia and a front bumper reinforcement of the vehicle. A sensing tube is located between a portion of the energy absorber and the front bumper reinforcement. A first pressure sensor and a second pressure sensor measure a first pressure of air and a second pressure of air within the sensing tube, respectively. An actuator is configured to actuate and vary a pressure within the sensing tube. A diagnostic module is configured to selectively diagnose the presence of a fault with the sensing tube based on at least one of: a first change in the first pressure in response to actuation of the actuator; and a second change in the second pressure in response to the actuation of the actuator.
US10521978B2
An electrical load life-cycle management and analysis system and method are disclosed. In the system and method, a database module stores electrical system configuration data and electrical system requirements, and an electrical system analysis module determines electrical system performance characteristics as a function of and based on the electrical system configuration data. In addition, an electrical system configuration management module manages at least one change to the electrical system configuration data, and compares the electrical system performance characteristics to the electrical system requirements to enable optimal performance and to provide compliance information.
US10521970B2
Certain embodiments involve refining local parameterizations that apply two-dimensional (“2D”) images to three-dimensional (“3D”) models. For instance, a particular parameterization-initialization process is select based on one or more features of a target mesh region. An initial local parameterization for a 2D image is generated from this parameterization-initialization process. A quality metric for the initial local parameterization is computed, and the local parameterization is modified to improve the quality metric. The 3D model is modified by applying image points from the 2D image to the target mesh region in accordance with the modified local parameterization.
US10521969B2
The present invention relates to method for simulating mandibular movements, device for the same and recording medium for recording the same. With the method for simulating mandible movements according to the present invention, it is possible to perform the simulation directly on the medical image of the patient and thus simulate the mandibular movements more closely to the actual situation. Therefore, the inaccurate mechanical approximation of the mandibular movement with the articulator according to the conventional art is overcome. In addition, according to the present invention, it is possible to simulate mandibular movements customized to the various states of the patient and specific clinical cases.
US10521968B2
Disclosed are techniques that use mixed reality, e.g., augmented reality and virtual reality technologies to improve analysis of retail processes and activity in retail establishments. A server system receives images from a mixed reality device, which images including representations of physical objects and receives voice data from the mixed reality device and executes a cognitive agent to process the voice data received from the mixed reality device that generates a set of virtual objects that include data describing merchandising process concepts regarding the set of physical objects, based on input queries received in the voice data and sending by a server system, the set of virtual objects to the mixed reality device.
US10521965B2
An information processing apparatus configured to execute an augmented reality (AR) processing, the information processing apparatus includes a display device, and a processor configured to acquire image data, detect an AR marker included in the image data, identify a content corresponding to the AR marker, and position information indicating a display position of the content in the display device, determine whether a part of the content is not within a display area of the display device, when it is determined that the part of the content is not within a display area of the display device, determine, based on attribute information of the content, whether the content is to be displayed on the display device, and when it is determined that the part of the content is to be displayed on the display device, display the content including the part of the content on the display device.
US10521964B1
Techniques for switching among disparate Simultaneous Localization and Mapping (SLAM) methods in virtual, augmented, and mixed reality (xR) applications are described. In some embodiments, an Information Handling System (IHS) may include a host processor and a memory coupled to the host processor, the memory having program instructions stored thereon available that, upon execution, cause the IHS to: identify a plurality of SLAM devices available to a virtual, augmented, or mixed reality (xR) application, wherein each of the plurality of SLAM devices implements a corresponding one of a plurality of SLAM methods; designate a primary SLAM method among the plurality of SLAM methods; and use the primary SLAM method to execute the xR application.
US10521954B2
Various embodiments of the present invention relate generally to systems and methods for analyzing and manipulating images and video. According to particular embodiments, the spatial relationship between multiple images and video is analyzed together with location information data, for purposes of creating a representation referred to herein as a surround view. In particular embodiments, a surround view can be generated by combining a panoramic view of an object with a panoramic view of a distant scene, such that the object panorama is placed in a foreground position relative to the distant scene panorama. Such combined panoramas can enhance the interactive and immersive viewing experience of the surround view.
US10521946B1
Functionality is disclosed herein for using a framework for a VR/AR application to utilize different services. In some configurations, a VR/AR application can utilize different services, such as an animation service, a multi-modal disambiguation service, a virtual platform service, a recognition service, an automatic speech recognition (ASR) service, a text-to-speech (TTS) service, a search service, as well as one or more other services. Instead of a developer of the VR/AR application having to develop programming code to implement features provided by one or more of services, the developer may utilize functionality of existing services that are available from a service provider network.
US10521941B2
Provided are a system and method for displaying a virtual image through a head mounted display (HMD) device. A method by which a device displays a virtual image through an HMD device includes: receiving, from the HMD device, an object image of a real space captured through a camera included in the HMD device; determining a virtual image to be displayed at a particular position around the captured object; determining an operation of the virtual image corresponding to the object and the particular position; and providing the virtual image and operation information about the determined operation to the HMD device, wherein the provided virtual image is displayed through the HMD device.
US10521925B1
Multiple image verification challenges can be used to identify the location of an object within an initial image. For instance, a first set of tiles is generated using the initial image. This first set is provided to a client computing device for display in a first verification challenge requesting that the user select tiles including the object. In response, a user selection of tiles of the first set is received. These selected tiles are then used to generate a second set of tiles corresponding to a sub-portion of the initial image. The second set of tiles is provided to a client computing device for display in a second verification challenge. In response to the second verification challenge, a user selection of tiles of the second set is received. This user selection of tiles of the second set is then used to determine a location of the object in the image.
US10521924B2
A system, method and virtual tool for size estimation of in-vivo objects includes receiving and displaying a two-dimensional image of in-vivo objects obtained by in-vivo imaging device; receiving indication of a selected area representing a point of interest from the user via a user input device; estimating depth of a plurality of image pixels around the selected area; calculating three-dimensional coordinates representation of the plurality of image points, based on the estimated depths; casting a virtual tool of a known size onto the three-dimensional representation; and projecting the virtual tool onto the two-dimensional image to create a cursor having a two-dimensional shape on the displayed image.
US10521921B2
An apparatus includes time of flight single-photon avalanche diode (ToF SPAD) circuitry. The ToF SPAD circuitry generates indications of distance between the apparatus and an object within a field of view. A processor receives the indications of distance and controls at least one image sensor, such as a camera, to capture at least one image based on at least one indication of distance. The processor determines whether an image is a true representation of an expected object by comparing multiple indications of distance associated with the object to an expected object distance profile and comparing the image to at least one expected object image.
US10521916B2
Provided in accordance with the present disclosure are systems for identifying a position of target tissue relative to surgical tools using a structured light detector. An exemplary system includes antennas configured to interact with a marker placed proximate target tissue inside a patient's body, a structured light pattern source, a structured light detector, a display device, and a computing device configured to receive data from the antennas indicating interacting with the marker, determine a distance between the antennas and the marker, cause the structured light pattern source to project and detect a pattern onto the antennas. The instructions may further cause the computing device to determine, a pose of the antennas, determine, based on the determined distance between the antennas and the marker, and the determined pose of the antennas, a position of the marker relative to the antennas, and display the position of the marker relative to the antennas.
US10521915B2
A distance measurement device includes a memory, and a processor coupled to the memory and configured to detect a plurality of edge lines from image data received from a camera mounted on a moving object, identify a plurality of first edge lines that are among the detected plurality of edge lines and have a characteristic of a predetermined target object, search coordinates of a second edge line located at the lowest position from among the identified plurality of first edge lines, and measure a distance from the moving object to the predetermined target object based on the searched coordinates of the second edge line and a parameter of the camera.
US10521908B2
Methods and systems for generating and displaying a simulated anatomical photograph based on a medical image generated by an imaging modality. The system comprises an electronic processor configured to receive the medical image, determine an anatomical structure in the medical image, and automatically generate the simulated anatomical photograph based on the anatomical structure, wherein the pixels of the simulated anatomical photograph represent a simulated cross-sectional anatomical photograph of the anatomical structure. The electronic processor is also configured to determine a degree of confidence of a portion of the simulated anatomical photograph, compare the degree of confidence to a threshold, and, in response to the degree of confidence of the portion of the simulated anatomical photograph failing to satisfy the threshold, display the portion of the simulated anatomical photograph differently from another portion of the simulated anatomical photograph.
US10521906B2
In a method and processor for evaluating a contrast agent-enhanced two-dimensional magnetic resonance slice image of a heart of a patient in order to determine picture elements revealing contrast agent deposits in the myocardium, an endocardium contour in the magnetic resonance slice image, taking into consideration deposition information describing picture elements potentially revealing contrast agent deposits and determined by image analysis on the basis of a shape assumption for the heart structure that is to be examined, in particular the left ventricle, such that picture elements potentially revealing contrast agent deposits are avoided as much as possible as a contour component. An epicardium contour enclosing the endocardium contour is then determined. Picture elements are marked that indicate contrast agent enhancement in the myocardium lying between the epicardium contour and the endocardium contour as contrast agent deposit.
US10521904B2
A region identifier identifies a region within a diagnostic image corresponding to one of plural predetermined clinical findings according to a first feature value from a feature value detector. A level detector performs level detection of the region at one of plural levels associated with the clinical findings for evaluation of the clinical findings according to a second feature value from a feature value detector. A color mapped image generator generates a color mapped image by color mapping of the diagnostic image with a display color associated with respectively the clinical findings and chromaticity of the display color associated with the levels. A monitor display panel is caused to display the color mapped image by control of a display control unit. Preferably, the diagnostic image is an image generated by an endoscope. The color mapped image generator is included in a processing apparatus.
US10521901B2
An image processing apparatus has an image data obtaining means configured to obtain image data acquired by photographing biological tissue, a score calculating means configured to calculate a score representing severity degree of lesion of the biological tissue photographed in an image represented by the image data for each pixel based on the image data, a reliability evaluation means configured to evaluate reliability of the score based on the image data, and a score reliability calculating means configured to calculate score reliability which represents a ratio of pixels of which scores having predetermined reliability to all the pixels of the image data.
US10521899B2
The runway illumination light inspection apparatus includes: an illumination light detection unit; an image capturing unit; and a determination unit. The illumination light detection unit detects an illumination light embedded in a runway the image capturing unit captures, when the illumination light detection unit has detected the illumination light, an image of the illumination light, and the determination unit determines whether or not the illumination light is abnormal, based on the captured image of the illumination light.
US10521896B2
A device for detecting offending features on individual granular objects or small objects. The device uses an image capturing system to scan batches of granular or small objects such as wheat, grain, rice, seeds, legumes or nuts to detect any undesirable feature such as disease, mold or spoilage. An action head on the device is configured to automatically respond once an undesirable feature is identified. The action head may capture the individual objects having undesirable features or it may cast them aside.
US10521887B2
The present invention provides an image processing device and an image processing method capable of removing haze (reducing the effect of haze) without losing detail of a high-luminance subject. In the aspect of the present invention, the input image I is represented by I=J·t+A·(1−t) where an original image is J, an atmospheric light pixel value is A, and a transmittance is t. In this case, a dark channel value D of each pixel of the input image I is calculated, and is associated with the transmittance t having a value monotonically decreasing for each pixel of which D ranges from 0 to 1 and associated with the transmittance t having a value monotonically increasing for each pixel which corresponds to haze and of which D ranges from 1 to Dmax. In such a manner, the original image J is generated as a corrected image.
US10521879B2
Methods, apparatuses, and computer program products for overlaying multisource media in VRAM are described. The primary media source is rendered in VRAM by an application program, and then the secondary media source(s) are rendered and blended to the primary source in VRAM at the same location of the primary source in VRAM, so no extra buffer is needed. This improves system performance and reduces power consumption, through reduced system bus, system memory, and CPU usage.
US10521877B2
An apparatus, a method, a method of manufacturing and apparatus, and a method of constructing an integrated circuit are provided. The apparatus includes a reservation logic device that receives a plurality of primitive types in a data pipeline, wherein the plurality of primitive types includes a binning (BIN) primitive and a setup (SU) primitive; a combinatorial logic device connected to the reservation logic device; an allocation logic device connected to the combinatorial logic device; a plurality of BIN buffers connected to the reservation logic device and the allocation logic device; and a plurality of SU buffers connected to the reservation logic device and the allocation logic device, wherein the allocation logic device determines whether a primitive type is allocated to a BIN buffer or a SU buffer, wherein the reservation logic device requests a reservation of one of the plurality of BIN buffers and the plurality SU buffers based on a corresponding indication of available BIN buffers and available SU buffers and the primitive type.
US10521874B2
An apparatus and method are described for executing workloads without host intervention. For example, one embodiment of an apparatus comprises: a host processor; and a graphics processor unit (GPU) to execute a hierarchical workload responsive to one or more commands issued by the host processor, the hierarchical workload comprising a parent workload and a plurality of child workloads interconnected in a logical graph structure; and a scheduler kernel implemented by the GPU to schedule execution of the plurality of child workloads without host intervention, the scheduler kernel to evaluate conditions required for execution of the child workloads and determine an order in which to execute the child workloads on the GPU based on the evaluated conditions; the GPU to execute the child workloads in the order determined by the scheduler kernel and to provide results of parent and child workloads to the host processor following execution of all of the child workloads.
US10521873B2
A variety of methods and systems involving sensor-equipped portable devices, such as smartphones and tablet computers, are described. One particular embodiment decodes a digital watermark from imagery captured by the device and, by reference to watermark payload data, obtains salient point data corresponding to an object depicted in the imagery. Other embodiments obtain salient point data for an object through use of other technologies (e.g., NFC chips). The salient point data enables the device to interact with the object in a spatially-dependent manner. Many other features and arrangements are also detailed.
US10521871B2
A robot system including a conveying apparatus that conveys an object; a robot that performs a process on the object being conveyed; a visual sensor that acquires visual information about the object; a high-frequency processing unit that detects at least one of a conveying velocity at which the object is being conveyed by the conveying apparatus and a position of the object by processing, at a first frequency, the visual information; a low-frequency processing unit that detects a position of the object by processing, at a second frequency that is lower than the first frequency, the visual information; and a control unit that controls the robot.
US10521870B2
A publicly accessible urban beach entertainment complex is disclosed, with a man-made tropical, pristine-clear lagoon as the centerpiece of the complex, with surrounding entertainment, educational, sports, and commercial facilities, the complex having controlled public access and providing the look and feel of a tropical beach with clear waters and sandy beaches. In addition a method for efficiently utilizing facilities and land that are vacant, underutilized, have limited uses, or that are contiguous to or nearby recreational, educational, sports, or commercial venues is disclosed. The method providing a publicly accessible urban beach entertainment complex with a centerpiece man-made tropical-style pristine-clear lagoon. The method allows for generating revenue and increasing efficiency by pairing vacant sites, underutilized sites, limited use land, or sites that are contiguous to entertainment, educational, sports, and/or commercial venues with urban beach entertainment complexes. The complex preferably has a controlled public access, thereby allowing entrance upon payment of a fee.
US10521867B2
A system for purchasing and selling power that fairly accommodates sellers and buyers. For instance, a submarket may be formed between a utility company or retailer and its consumer or customer. The utility or retailer may eliminate differences between generated or purchased power and demanded power. Mechanisms used for elimination of power differences may incorporate utilizing power from ancillary services, purchasing or selling power on the spot market, and affecting a demand for power with demand response programs. A difference between purchased power and demanded power may be minimized by forming an optimal power stack having a mix of power of the demand response program, power at the spot market and/or power of ancillary services. An optimization sequence may be implemented to minimize the difference between the purchased power and demanded power, and to maximize profit.
US10521856B1
During operation of a system, a financial transaction of an individual is associated with one or more predefined categories based on scores that indicate the likelihood of association. For example, a given predefined category may include a merchant name (such as the name of a potential counterparty in the financial transaction) and/or an attribute associated with one or more merchants. The score for a given predefined category may be determined based on a number of occurrences of the given predefined category in financial-transaction histories of a subset of a group of individuals who have common spending patterns in their financial-transaction histories. Moreover, the spending pattern may be based on values of financial transactions in the financial-transaction histories.
US10521849B2
A user terminal providing an in-app service and an in-app service server are provided. The user terminal includes an in-app module configured to be connected to the in-app service server and configured to transmit a multimedia content purchase request, a present request, and a share request to the in-app service server, and a terminal agent installed in an operating system of the user terminal, automatically driven when the user terminal is booted, and operating as a user interface for requesting the in-app service. The in-app service server includes an in-app module interworking unit configured to interwork with an in-app module of a user terminal, and a service controller configured to implement the in-app service when the in-app service is requested.
US10521848B2
A system and method to generate and maintain interaction with a customer by evaluating customer initiated messages and telematics data to obtain information used to generate response messages and, further, generating conversation initiating messages autonomously in an effort to solicit response messages from a customer.
US10521842B2
An on-line method of facilitating e-commerce sales of circular adornments (such as watches, bracelets, etc.) through the provision of selectable representations of such an adornment in its primary dimensions is provided. Such representations are generated in relation to specific adornment structures and are provided, in terms of three-dimensional polymer printed articles. A purchaser is allowed to select a specific adornment from an on-line source, and print a single part or multiple parts thereof in the form of a reliable representation of the subject article. The purchaser may then place the representation on his or her wrist, ankle, arm, etc., in order to gauge and assess the look, placement, and size thereof, in accordance with his or her own tastes and needs. Such an on-line system allows for reductions in returns and greater reliability in terms of actual purchases up front. The actual generated printed representations are encompassed herein as well.
US10521838B2
A system and method for automatically negotiating Internet access between a user and one of a plurality of Internet connection providers. Users can buy or bid for Internet bandwidth, for example, through a server or website or by direct communications with an Internet access point such as, for example, a WIFI access point.
US10521837B1
A method may include receiving activity data associated with a user, wherein the activity data relates to online activity involving a product type, identifying the product type associated with the activity data, and predicting, based on the activity data, that the user is likely to purchase a product of the product type. The method may include generating, based on predicting that the user is likely interested in purchasing the product of the product type, an annotation to indicate that a potential transaction to purchase the product is forthcoming, and storing the annotation in a profile associated with an account of the user. The method may include detecting a transaction to purchase the product, wherein the transaction involves a payment from the account, and performing an action associated with a fraud analysis of the transaction based on the annotation.
US10521835B2
A digital medium environment includes a content provider that receives a request for content and provides the requested content to a computing device. An improved advertisement detection method implemented by the content provider comprises determining whether the requesting computing device is blocking advertisements provided with the content. If the requesting computing device is blocking advertisements, the content provider may prevent the requested content from being displayed unless a user of the requesting device selects an alternate option for viewing the requested content. Alternate options for viewing the requested content include purchasing a subscription to the content provider, paying the content provider to view only the requested content, or enabling display of advertisements at the requesting computing device. The improved advertisement detection method protects content provider revenue streams and informs users of alternate options for viewing content from a trusted content source.
US10521832B2
A computer-implemented method for generating creative type suggestions for an online content provider is provided. The method uses a computing device including a processor and a memory. The method includes training a first model with historical information including one or more of (i) serving performance of online advertisements and (ii) advertiser information. The method also includes computing a preliminary creative type suggestion using at least the first model. The method further includes modifying the preliminary creative type suggestion based at least in part on past suggestion performance to generate a final creative type suggestion. The method also includes presenting the final creative type suggestion to the online content provider.
US10521824B1
Identifying personalized content recommendations for users in an electronic environment is disclosed. User data comprising information relating to web-based content consumption of multiple users is collected. Multiple user cluster types associated with one or more interest categories are established. A feature vector is generated for each user for each of the multiple user cluster types. Based on the generated feature vectors, the user are grouped into multiple clusters. A grade is generated for each of a plurality of candidate recommendations for each of the clusters. Based on the generated grades, one or more personalized content recommendations for each of the clusters are identified.
US10521818B2
A server receives incoming data records comprising an ID value and respective user attributes corresponding to a user activity that originates at a user device. Characteristics of the activity and/or characteristics of the user device are considered in order to assign a probabilistic confidence value, which is in turn used to generate links from an incoming data record to other previously-received data records, and in so doing, generates a probabilistic link between one set of user attributes from the incoming data record and another set of user attributes from previously-received data records. A messaging campaign specification that describes target user attributes is used to identify a matching set of target audience member records. The determination of a match or not is based on the probabilistic confidence value and a threshold can be varied to extend audience reach. The identified set of target audience member records are transmitted over a network.
US10521811B2
Systems and methods for optimizing allocation of configuration elements in a service engagement. A plurality of Service Level Agreements (SLAs) corresponding to a service engagement is received. A Service Level Agreement (SLA) of the plurality of Service Level Agreements (SLAs) includes a plurality of configuration elements and a plurality of SLA compliances. A model is created by allocating a subset of the plurality of configuration elements to meet the SLA. The model is simulated to verify the plurality of SLA compliances being met by the subset allotted. Based on the simulation, a time series data indicating behavior of the model is obtained. The model is optimized to obtain an optimal allocation of the plurality of configuration elements. The model is optimized by allocating another subset of the plurality of configuration elements to meet the SLA.
US10521780B1
Techniques are described for managing a transaction, such as a purchase of a vehicle or other product, using one or more blockchains. The completion of a transaction may be facilitated by providing an information portal, such as one or more application user interfaces, to enable the buyer, seller, or other parties to readily access blockchain-stored information that is relevant to the transaction. In some examples, where the product to be purchased is a vehicle (e.g., car, truck, motorcycle, boat, etc.), the blockchain-stored information may include information regarding the loan, title, insurance, driver's license or other identification verification, vehicle ownership history, inspection history, repair history, lien information, and so forth. The portal also enables a point of contact to be maintained between the buyer and a lender during the process of purchasing the product.
US10521770B2
In an approach for providing a dynamic definition of a problem statement during an IT critical situation with an associated conflict resolution, a processor receives an initial problem definition. A processor identifies related social collaboration channels associated with the initial problem definition. A processor updates users within the related social collaboration channels. A processor determines there is at least one problem update from the related social collaboration channels. A processor identifies a set of subject matter experts who are relevant to the initial problem definition. A processor initiates a different social collaboration channel for the set of subject matter experts. A processor determines a consensus to a solution to the initial problem definition is gained by the set of subject matter experts. A processor updates the initial problem definition to include the solution.
US10521767B2
A product order fulfillment system includes multiple decks arrayed at different levels and defining multilevel decks, at least one autonomous transport vehicle on each of the decks, and configured for holding and transporting a pickface on each deck, at least one lift, traversing and connecting more than one level of the decks, and arranged for lifting and lowering the pickface from the decks, and at least one pickface transfer station on each deck interfacing between the transport vehicle and the at least one lift to effect transfer of the pickface between the transport vehicle and the at least one lift, the at least one lift defines a fulfillment stream of mixed case pickfaces outbound from the multilevel decks to a load fill, at least one stream of the fulfillment stream has an ordered sequence of streaming pickfaces wherein the ordered sequence of streaming pickfaces is based on another fulfillment stream.
US10521763B2
This invention relates to a natural resource and reserve management system, a corresponding method and a resultant natural asset inventory. The system has means for amalgamating and integrating data from disparate expert technical systems and applications, including computer developed or generated data, into at least one common, spatially-referenced database for use by at least one commercially available inventory management application, in order to provide integrated natural asset management in a natural resource inventory. The natural resources and reserves may comprise of depletable mineral resources and reserves, the amalgamation and integration may be conducted continually, and the data may be from disparate expert technical systems and applications in order to provide integrated mineral asset management in a mineral resource inventory.
US10521761B2
Systems and methods for facilitating delivery of parcels to, from, and between attended delivery/pickup locations. In various embodiments, the attended delivery/pickup locations may be associated with brick-and-mortar retail locations and used to facilitate inventory transfer between locations, shipment of goods purchased at the brick-and-mortar-retail locations to other attended delivery/pickup locations or other locations, and to receive delivery of parcels sent from any suitable location. In some embodiments, the attended delivery/pickup locations are configured to receive shipments of items ordered from online retail websites. In other embodiments, the attended delivery/pickups locations are associated with shopping centers and configured to facilitate shipment of items purchased at the associated shopping centers.
US10521756B2
A method, executed by one or more processors, includes identifying at least one product for delivery and create a shipping manifest for the at least one product. The method includes extracting from the shipping manifest, a required amount of storage space for the at least one product and one or more environmental conditions required for storage of the at least one product at the receiving location. Furthermore, the method includes identifying a storage space location for storage of the at least one product at the receiving location, wherein the identified storage space location provides the required amount of storage space and the one or more environmental conditions required for the at least one product.
US10521752B1
An auditing system for creating audits, presenting the audits to auditor users, capturing data via a user interface, compiling results from captured data, and presenting the results, is disclosed. The auditing system is configured to define and present audit elements and sub elements in a parent-child fashion. The auditing system may be configured to extract scores of audit elements into customizable categories. A location of an auditor device may be determined for tailoring audit content to the auditor device based on the determined location. Machine-readable identification tags may be scanned via an auditor device for determining an identity of the scanned identification tag and associating the identification tag with an audit element. Audit results may be presented visually in an interactable graph such that a user may view scores for each category of each audit element. Further, various scheduling systems are disclosed for scheduling work.
US10521740B2
Methods, systems, and apparatus, including computer programs encoded on computer storage media, for an automated enterprise content management (ECM) migrator. One of the methods includes generating, by an enterprise content management process migration engine (ePME), a migration profile for migrating data from a first ECM system to a second ECM system. Determining content to extract associated with a process template from the first ECM system. Identifying at least one process and at least one activity associated with the at least one process associated with the process template. Determining at least one classification associated with the at least one process activity in the process template. Generating a database in the second ECM system storing each of the at least one process, the at least one activity, and the associated at least one classification from the template. Validating a successful transaction between the first ECM system and the second ECM system.
US10521734B2
A computing device predicts an event or classifies an observation. A trained labeling model is executed with unlabeled observations to define a label distribution probability matrix used to select a label for each observation. Unique combinations of observations selected from the unlabeled observations are defined. A marginal distribution value is computed from the label distribution probability matrix. A joint distribution value is computed between observations included in each combination. A mutual information value is computed for each combination as a combination of the marginal distribution value and the joint distribution value computed for the respective combination. A predefined number of observation vector combinations is selected from the combinations that have highest values for the computed mutual information value. Labeled observation vectors are updated to include each observation vector included in the selected observation vector combinations with a respective obtained label.
US10521722B2
A disturbance detection, predictive analysis, and handling system and method is provided. The system and method may assist in identifying when, how, and what actions should be taken and by whom to prevent, reduce, or eliminate disturbances. The system and method may do so by monitoring or sensing activity in real time, performing predictive analytics on the data, and communicating the outcome to achieve a desired result. The system and method may include sensors provided within a sensor unit in communication with a hub. The sensor unit and hub may communicate over a personal area network. The system and method may also include a server and analytics engine to aid in the identification of disturbance and/or damage. The system and method may also use predictive algorithms and historic disruption data to enhance the accuracy of its prediction of disturbance and/or damage.
US10521720B2
A electronic sensor signals monitoring unit (10), system and computer program, for sepsis monitoring, includes an interactive visualization status calculation monitor (M), a sensor data acquisition interface (11), acquiring time-critical status-relevant sensor signals from medical devices (G), a rule engine interface (12) to a memory or a data bank (DB) with stored rules for analyzing and processing status-relevant parameters and/or sensor signals, and a computer-assisted control unit (S), configured to dynamically control the interactive visualization on the monitor (M) and including an arithmetic unit (RW). The arithmetic unit (RW) is supplied with the acquired sensor signals via the sensor data acquisition interface (11) and is intended for the status calculation with the rules stored in the data bank (DB). The status calculation includes an overview display, a detail view and a logbook view. A display of the course of status-relevant sensor signals over time is visualized in the detail view.
US10521716B2
Computer-assisted analysis of a data record from observations is provided. The data record contains, for each observation, a data vector that includes values of input variables and a value of a target variable. A neuron network structure is learned from differently initialized neuron networks based on the data record. The neuron networks respectively include an input layer, one or more hidden layers, and an output layer. The input layer includes at least a portion of the input variables, and the output layer includes the target variable. The neuron network structure outputs the mean value of the target variables of the output layers of the neuron networks. Sensitivity values are determined by the neuron network structure and stored. Each sensitivity value is assigned an observation and an input variable. The sensitivity value includes the derivative of the target variable of the assigned observation with respect to the assigned input variable.
US10521712B2
An antenna includes first and second radiation portions including one lead wire that is folded back into a loop shape to define a folded-back portion and that includes a first power feed portion at a first end and a second power feed portion at a second end. The lead wire portion extending toward the folded-back portion and the lead wire portion extending through the folded-back portion are close enough to each other near each of the first and second power feed portions in the first and second radiation portions, respectively, to be electromagnetically coupled to each other. The power feed portions of the antenna are coupled to a wireless IC chip. The power feed portions may be coupled to a feed circuit in a feed circuit board coupled to a wireless IC.
US10521702B2
A method for estimating and forecasting an energy production indicator for a solar system. The method comprises, in particular, the steps of: a) receiving images of the sky taken from the ground, each image comprising an optical marker; b) extracting values of pixels and locating of image pixels from the received images; c) determining distances between the located pixels and the optical marker of the image; d) generating a vector of parameters from a pixel classification, according to the extracted values and the determined distances; e) comparing parameters of the generated vector with predetermined parameters, the predetermined parameters being respectively associated with energy production indicators; f) estimating the energy production indicator of the solar system from energy production indicators of the predetermined parameters compared to the generated vector.
US10521697B2
A local connectivity feature transform (LCFT) is applied to binary document images containing text characters, to generate transformed document images which are then input into a bi-directional Long Short Term Memory (LSTM) neural network to perform character/word recognition. The LCFT transformed image is a gray scale image where the pixel values encode local pixel connectivity information of corresponding pixels in the original binary image. The transform is one that provides a unique transform score for every possible shape represented as a 3×3 block. In one example, the transform is computed using a 3×3 weight matrix that combines bit coding with a zigzag pattern to assign weights to each element of the 3×3 block, and by summing up the weights for the non-zero elements of the 3×3 block shape.
US10521683B2
A system and method are provided for actively illuminating and capturing images of an object, such as a driver of a vehicle to reduce glare. The system includes a video imaging camera orientated to generate images of the subject object (e.g., eye(s)) in successive video frames. The system also includes first and second light sources operable to illuminate the object one at a time. The system further includes a processor for processing the image by performing a functional operation to reduce glare in the image. The system may remove glare caused by the illuminators and by external energy sources.
US10521680B2
A system for detecting and identifying foliage includes a tracking component, a tracking parameters component, and a classification component. The tracking component is configured to detect and track one or more features within range data from one or more sensors. The tracking parameters component is configured to determine tracking parameters for each of the one or more features. The tracking parameters include a tracking age and one or more of a detection consistency and a position variability. The classification component is configured to classify a feature of the one or more features as corresponding to foliage based on the tracking parameters.
US10521676B2
A lane detection and lane departure determining device and method are provided. The lane detection device includes a first Region of Interest (ROI) setting unit configured to set a rectangular ROI from an input image which is a road image, a second ROI setting unit configured to set a Λ-ROI having distorted trapezoidal shape from the rectangular ROI, and a lane detection unit configured to detect the lane including a left and right lane marking in the Λ-ROI. The second ROI setting unit is configured to calculate a merged first line segment through a merging process, obtains a left and right second line segment by scanning brightness, and determines the left and right second line segment as a temporary left and right lane marking when a preset condition is satisfied. The Λ-ROI is determined by changing a slope of the temporary left and right lane marking in a predetermined range.
US10521674B2
Embodiments of the present invention generally relate to trailer loading analytics. In an embodiment, the present invention is a method for detecting a trailer door status. The method includes: capturing a 3D image representative of a 3D formation; analyzing respective depth values of a first sub-plurality of the plurality of points of the 3D image to determine whether the formation is within a first predetermined distance threshold from a location; and when the formation is within the first predetermined distance threshold, analyzing respective depth values of a second sub-plurality of the plurality of points to determine whether the 3D formation is substantially flat, a determination of the three-dimensional formation being substantially flat being indicative of the trailer door being closed.
US10521670B2
A system includes a plurality of summarization engines, each summarization engine to receive video content, via a processing system, and to provide a summary of the video content, thereby providing a plurality of summaries of the video content. The system includes a plurality of meta-algorithmic patterns, each meta-algorithmic pattern to be applied to at least two of the summaries to provide, via the processing system, a meta-summary of the video content using the at least two summaries, thereby providing a plurality of meta-summaries of the video content. The system includes an evaluator to evaluate the plurality of summaries and the plurality of meta-summaries and to determine similarity measures of the video content over each given class of a plurality of classes of video content, and to select a class of the plurality of classes based on the determined similarity measures.
US10521663B1
Herein is disclosed an image location iteration system comprising one or more processors configured to receive from one or more unmanned aerial vehicles a plurality of images and corresponding detected positions; determine an alignment of the plurality of images according to one or more image features; calculate a first set of measured locations for the plurality of images according to the alignment and the detected positions; and calculate a second set of measured locations the plurality of images according to the alignment and a first subset of the detected positions.
US10521657B2
Systems and methods for detecting, decoupling and quantifying unresolved signals in trace signal data in the presence of noise with no prior knowledge of the signal characteristics (e.g., signal peak location, intensity and width) of the unresolved signals. The systems and methods are useful for analyzing any trace data signals having one or multiple constituent signals, including overlapping constituent signals, and particularly useful for analyzing data signals which often contain an unknown number of constituent signals with varying signal characteristics, such as peak location, peak intensity and peak width, and varying resolutions and varying amounts of asymmetry. A general signal model function is assumed for each unknown, constituent signal in the trace signal data.
US10521654B2
Methods and apparatuses are described for of recognizing handwritten characters in digital images using context-based machine learning. A server captures an image of a document that comprises one or more handwritten data fields, the document associated with a user identifier. The server identifies a field type for each handwritten data field in the image. The server creates a pixel intensity array for each character in each handwritten data field and determines whether a user-specific character map exists for the user identifier. If a map exists, the server retrieves the map and generates digital form data by executing a user-specific handwriting classifier using the map, the pixel intensity arrays, and the field types. If a map does not exist, the server builds a map based upon the pixel intensity arrays and generates digital form data by executing a baseline handwriting classifier using the map, the pixel intensity arrays, and the field types.
US10521653B2
The present invention is directed to reducing a calculation amount for human body detection to achieve high speed processing. Detection processing is executed to detect a predetermined object in an image captured by an image capturing unit. When the predetermined object is detected using a pattern having a predetermined size, a partial area of the image is excluded from a processing region in which the detection processing of detecting the predetermined object is executed using the pattern having the predetermined size, based on a position at which the predetermined object is detected.
US10521650B2
A three-dimensional (3D) image recognition system includes a first imaging sensor capable of collecting a first wavelength range of light and a second imaging sensor capable of collecting a second wavelength range of light. The first imaging sensor and the second imaging sensor are placed apart. The 3D image recognition system also includes a processor configured to identify at least one landmark area of a first image of an object collected by the first imaging sensor, and identify at least one matching landmark area in a second image of the object collected by the second imaging sensor. The processor is further configured to extract the 3D information of the object from the at least one landmark area of the images collected.
US10521649B2
Two related methods of fitting a three dimensional model, and a method of performing facial recognition, are disclosed. One method comprises estimating and refining geometric information using image landmarks on an object in a two dimensional image. The other method comprises estimating and refining photometric information of the object in the two dimensional image. Furthermore, a method of performing image recognition is provided.
US10521645B2
The present disclosure relates to systems and methods for identifying products in retail stores based on analysis of image data and for automatically generating performance indicators relating to the identified products. In one implementation, the system may include a processor configured to receive a first set of images depicting a first plurality of products associated with single product type displayed on a first shelving unit in a retail store; analyze the first set of images to determine first product turnover data associated with the first shelving unit; receive a second set of images depicting a second plurality of products also associated with the single product type displayed on a second shelving unit in the retail store nonadjacent to the first shelving unit; and analyze the second set of images to determine second product turnover data associated with the second shelving unit.
US10521641B2
Devices, systems, and techniques are provided for performing human fingerprint detection and authentication for authenticating a request to access a locked mobile device equipped with a fingerprint detection module. In one aspect, responsive to detecting a contact from an object with the fingerprint detection module, described technique can be used to determines whether the contact from the object is from human skin. When determined that the detected contact from the object is from human skin, a presence of a human fingerprint can be detected from the object making contact. The detected fingerprint data can be obtained from the object and compared against stored fingerprint profiles associated with an authorized user of the locked mobile device. Based on the comparing, the request to access the locked mobile device can be granted.
US10521639B2
In a fingerprint sensor, two adjacent sensing plates are detected at a same time to obtain first sensing data and second sensing data therefrom respectively, so that the first sensing data and the second sensing data include a same noise, then the first sensing data is subtracted from the second sensing data to generate a difference by which the noise is eliminated, and the difference is added to first fingerprint data corresponding to the sensing plate which provides the first sensing data, resulting in second fingerprint data corresponding to the other sensing plate. The fingerprint portions on the two adjacent sensing plates are determined according to the first and the second fingerprint data respectively.
US10521631B2
This patent specification describes operations of a mobile device with barcode-reading capabilities and an application and license server. A mobile device may include a barcode-reading application downloaded from an application server. The barcode-reading application may operate in a base mode or an enhanced mode. In the base mode, the barcode-reading application may establish a network connection to a licensing server to obtain a license code, and determine at least one operating permission authorized by the license code. In the enhanced mode, the barcode-reading application may implement at least one enhanced barcode-reading function which corresponds to the at least one operating permission authorized by the license code. For example, the enhanced barcode-reading function may be a function of decoding a barcode symbology that the decoder is restricted from decoding in the base mode of operation.
US10521625B2
A safety control device, a method of controlling safety control device, and a recording medium are provided. A detection zone in which the safety of an operator can be secured and a decrease in an operation rate of a machine can be minimized is set. A safety controller sets a detection zone for executing a safety operation when it is determined that an operator has entered for each operator.
US10521618B1
The present disclosure describes apparatuses and techniques for secure root key provisioning. In some aspects, a stream of entropy bits is generated based on analog noise. From the stream of entropy bits, entropy symbols are constructed and used to modulate bits of a unique chip identifier to provide a block of modulated symbols. A hash digest of the block of modulated symbols is then calculated to generate a device-level root key. This device-level root key written to a write-only register of a one-time programmable (OTP) memory controller for subsequent writing into an OTP memory. By so doing, unauthorized entities can be prevented from accessing the device-level root key during the secure key provisioning process.
US10521617B2
Technology that provides security for a requestor of data stored in a non-volatile memory device is disclosed. In one aspect, the non-volatile memory device provides data on a host interface only if a digest for the data matches an expected digest for the data. The non-volatile memory device may store expected digests for data for various logical addresses. Upon receiving a request on the host interface to read data for a logical address, the non-volatile memory device may access the data for the logical address, compute a digest for the accessed data, and compare the computed digest with the expected digest. The non-volatile memory device provides the accessed data on the host interface only if the computed digest matches the expected digest, in one aspect. The non-volatile memory device may be used to provide a secure boot of a host.
US10521609B2
The present invention provides a method, and associated computer system and computer program product, for masking selected vulnerable data portions of a data set transmitted over a network by parsing the vulnerable data, generating masked values for the vulnerable data including generating symbols of the masked values of a parsed word of the parsed vulnerable data, updating the data set to include the masked values, then sending the updated data set to a third party for analysis and for subsequent decoding of the masked values of the parsed vulnerable data. The symbols, used to represent basic sounds of a language, are contained in a set in a fixed order.
US10521602B2
Provided are a system and method of encrypting a folder in a device. The device for controlling access to the folder includes a communication part configured to transmit, to a server, an encryption key generation request with respect to the folder, and receive, from the server, an encryption key associated with the folder that is generated in response to the encryption key generation request, wherein the encryption key generation request includes an identification of the folder and authentication data of a user who accesses the folder is an authorized user; and a controller configured to authenticate the user by using the encryption key.
US10521598B2
A system and method are provided for the destruction of electronically stored information and/or components that incorporated sensitive technology or that contain sensitive information upon the occurrence of one or more predetermined events. The system and method of the present invention is particularly suited for the safeguarding of electronically stored information and/or classified technology in systems deployed in an operational environment. The system and method of the present invention be incorporated into drones, full size aircraft, any type of vehicle, mines, missiles, torpedos, bombs, phones, cameras, robots, satellites or other spacecraft, computers, hard drives, thumb drives, switches, routers, bugs, brief cases, safes, and generally any device that utilizes components on which sensitive data is stored or components that utilize technology that should only be accessed by authorized personnel.
US10521596B1
In an embodiment, a system is provided in which the private key is managed in hardware and is not visible to software. The system may provide hardware support for public key generation, digital signature generation, encryption/decryption, and large random prime number generation without revealing the private key to software. The private key may thus be more secure than software-based versions. In an embodiment, the private key and the hardware that has access to the private key may be integrated onto the same semiconductor substrate as an integrated circuit (e.g. a system on a chip (SOC)). The private key may not be available outside of the integrated circuit, and thus a nefarious third party faces high hurdles in attempting to obtain the private key.
US10521594B2
A computer-implemented method includes executing one or more tests on a computing device. The computing device has Instruction Execution Protection (IEP), and each test of the one or more tests includes selectively setting one or more IEP bits of one or more page tables, where each IEP bit prevents code in a respective storage block from being executed. During the one or more tests, an IEP exception is detected, by a computer processor, each time an attempt is made to execute code in a storage block for which a respective IEP bit is set. Test results of the one or more tests are determined based on the detecting. A remedial action is performed in response to the test results of the one or more tests.
US10521589B2
Systems, methods, and computer program products are provided for managing data re-installation including service re-installation. A re-installation procedure re-installs and optionally activates data at least partially installed on a secure element without intervention middleware to repair a personalization procedure failure. Thus, personalization data on a secure element (SE) may be comprehensively managed by interfacing between one of a plurality of service provider (SP) trusted service managers (TSM) and a central trusted service manager (central TSM). The processing time required to manage the re-installation procedure is minimized.
US10521586B2
The invention relates to a secured comparative processing method of the type in which a processor of an electronic component compares a set of proof data received by the processor as an input with main secret data stored in said electronic component, characterised in that the processor executes, in parallel with the comparison with the secret data, a series of complementary operations on the set of proof data which generate on the electronic component a variation in behaviour which is a function of the proof data which the component receives as an input and which is added to the variation in behaviour linked to the comparison with the main secret data, the series of complementary operations including a series of base operations repeated K times, and the execution of said series being preceded by an adjustment of execution parameters of said series, the parameters including: the identifier of the series of base operations to be executed, the series of base operations being comprised within a set of predefined base operations, and the number K of executions of the set of base operations, the set of adjusted execution parameters being specific to the set of proof data received by the electronic component.
US10521583B1
Computer-implemented methods and systems are provided for the detection of software presence remotely through the web browser by detecting the presence of webinjects in a web browser that visits a detection webpage. The methods can include delivering a detection webpage to a web browser, in which the detection webpage has detection code configured to detect a presence of the webinject in the detection webpage; and inspecting, by the detection code, rendering of content of the detection webpage in the browser to detect webinject content in the detection webpage by the webinject, the webinject content including one or more Hypertext Markup Language (HTML) components. The method can further include, if webinject content is detected, generating a fingerprint for each of the one or more HTML components; transmitting the one or more fingerprints to an external server; and classifying, by the external server, the webinject based on the one or more fingerprints.
US10521569B2
A license update engine is run as part of a license entitlement automation system. The license update engine is minimally executed daily and identifies, for example, content updates to be applied and licenses that have drifted from their definition. The license update engine then generates proposals for operators to consider. Accepted proposals update the license configuration. Thus, the license update engine identifies licenses and the definitions that are connected to them, including definitions that the licenses from which the were created and definitions that are linked to SKUs of entitlement purchases. Analyses relates three categories of proposal, including license types, applications linked to licenses, and usage rights on licenses. Proposals are stored in a database and operators can accept or ignore them. The database maintains a history of license changes.
US10521568B1
Authentication translation is disclosed. A request to access a resource is received at an authentication translator, as is an authentication input. The authentication input corresponds to at least one stored record. The stored record is associated at least with the resource. In response to the receiving, a previously stored credential associated with the resource is accessed. The credential is provided to the resource.
US10521567B2
Techniques and systems are described to support digital image processing through use of an image repository, e.g., a stock image database or other storage. In one example, a plurality of candidate digital images are obtained from an image repository based on a target digital image. A plurality of transformations are generated to be applied to the target digital image, each transformation based on a respective candidate digital image. Semantic information is employed as part of the transformations, e.g., blending, filtering, or alignment. A plurality of transformed target digital images are generated based at least in part through application of the plurality of transformations to the target image.
US10521563B2
A treatment planning apparatus includes a treatment modeler. The treatment modeler uses models of a plurality of treatment modalities in a treatment space to generate a treatment protocol that includes one or more the modalities in the treatment space. In one implementation, a treatment modality includes the removal of targeted treatment agents from an object.
US10521555B2
Methods, systems, and storage media for generating an auto-tagged video record of a healthcare service are disclosed. In an embodiment, the auto-tagged video record of a healthcare service includes a digital video component and an audio component. One or more healthcare service tags may be generated by voice and/or video image recognition of the audio component and/or the digital video component to indicate one or more selected segments within healthcare service. The auto-tagged video record may be stored with the one or more healthcare service tags and, in embodiments, one or more of the selected segments may be accessed with respect to the healthcare service tags.
US10521551B2
A method is provided that includes providing a first digital representation of a first member and a second digital representation of a second member. The first member and the second member are configured to be joined. The method also includes aligning the first digital representation and the second digital representation in a same coordinate system. Further, the method includes determining, in the coordinate system, a virtual deformation corresponding to at least one of the first digital representation or the second digital representation corresponding to an applied loading. Also, the method includes determining shim dimensions for a shim to be interposed between the first member and the second member based on the virtual deformation. The method further includes fabricating a shim having the shim dimensions.
US10521543B1
Disclosed herein are embodiments of systems, methods, and products for dynamically determining and rendering a target resistance of a partially routed net between two circuit devices in an integrated circuit (IC) design and automatically resizing a wire segment being edited in real time based on the target resistance such that the fully routed net satisfies the maximum resistance constraint. Therefore, the embodiments disclosed herein simplify the circuit designer's job and improves design productivity. Unlike conventional systems, an EDA tool disclosed herein does not have to route the full net between two circuit devices to run design rule checking (DRC). Thus, the EDA tool does not require multiple iterations of fully routing a net and checking for DRC violations such that the maximum resistance constraint is not violated.
US10521541B2
A semiconductor device includes a first active fin on a substrate; a second active fin on the substrate and separate from the first active fin; a first fin stub on the substrate, wherein the first fin stub connects a bottom portion of the first active fin and a bottom portion of the second active fin; and an isolation feature over the first fin stub and between the first and second active fins. The first fin stub is lower than both the first and the second active fins in height. The isolation feature is higher than the first fin stub and lower than both the first and the second active fins in height. From a top view, the first active fin is oriented lengthwise in a first direction, and the first fin stub is oriented lengthwise in a second direction that is different from the first direction.
US10521533B2
An inductor simulation method and nonlinear equivalent circuit model enabling dynamic simulation of nonlinear characteristics when a direct current is superimposed with high precision. An equivalent circuit of an inductor is represented using a series circuit of passive circuit elements. Characteristic change ratios of the passive circuit elements when a direct current is superimposed are expressed as an approximate function on the basis of actually measured values. A reference current measured by each of voltage source models is referred to by a control voltage source connected in series to the passive circuit elements. The characteristic change ratios are calculated in accordance with the reference current Iref. Difference voltages are generated on the basis of the characteristic change ratios and voltages occurring when no direct current is superimposed, they are superimposed on the voltages VL1 and VR1 occurring when no direct current is superimposed, thereby simulating the nonlinear characteristics.
US10521531B1
The present disclosure relates to a method for formal verification of an electronic design. Embodiments may include receiving, using a processor, an electronic design having a plurality of clock configurations associated therewith and identifying a target clock configuration associated with the electronic design. Embodiments may also include receiving a range of clock factor values from a user, wherein each clock factor value corresponds to a frequency of the target clock configuration. Embodiments may further include selecting, via a formal engine, at least one clock factor value from the range and selecting, via the formal engine, at least one clock phase associated with the target clock configuration. Embodiments may also include performing formal verification of the electronic design, based upon, at least in part, the at least one clock factor value or the at least one clock phase.
US10521530B2
A method of designing a logic circuit with data-dependent delays is performed using an electronic design automation system. The logic circuit includes logic paths from logic inputs to at least one logic output. The method includes: obtaining an initial circuit design; specifying respective delays for multiple logic paths in the initial circuit design such that at least some of the outputs switch at different times within a clock cycle for different combinations of logic input levels; and forming a second circuit design having the specified respective delays along the respective logic paths by adding delay elements to the initial circuit design based on the specified respective delays.
US10521527B2
An apparatus is provided for analysis of a leading edge rib of a fixed leading edge section of an aircraft wing. The apparatus may identify geometric or inertial properties of a plurality of stiffeners of the rib, and based thereon perform an analysis to predict a failure rate of the leading edge rib under an external load. From the failure rate, the apparatus may determine a structural integrity of the leading edge rib under the external load. Performing the analysis may include importing a plurality of section cuts into a finite element model of the rib and thereby identifying nodes proximate the section cuts. Under an external load, internal load distributions may be extracted from elements proximate the nodes and elements, and the failure rate of the leading edge rib under the external load may be predicted based on the internal load distributions of the elements.
US10521522B2
A robot simulator according to one aspect of the embodiment includes a job information acquiring unit, an image generating unit, a playback information generating unit, and an output unit. The job information acquiring unit acquires job information that includes a group of operation commands for a robot and information for a plurality of target points through which the robot passes. The image generating unit generates virtual three-dimensional images of a robot system including the robot in a three-dimensional space for each of the operation commands. The playback information generating unit generates playback information for continuously replaying the three-dimensional images by animation in association with the job information. The output unit generates and outputs an output file in which the job information, the three-dimensional images, and the playback information are embedded in an electronic document format that can be browsed in a general-purpose manner.
US10521512B2
A method of operating a situationally aware speaker associated with a virtual personal assistant (VPA) service provider that comprises receiving an indication of at least one parameter of an environment proximate the situationally aware speaker, and delivering the response to the vocal query to the user formatted as speech through an audio output of the situationally aware speaker, at least one audio parameter of the response set based on the indication of the at least one parameter.
US10521511B2
Disclosed is a method of phonetically encoding a text document. The method comprises providing, for a current word in the text document, a phonetically equivalent encoded word comprising one or more syllables, each syllable comprising a sequence of phonemes from a predetermined phoneme set, the sequence being phonetically equivalent to the corresponding syllable in the current word, and adding the phonetically equivalent encoded word or the current word at a current position in the phonetically encoded document. Each phoneme in the phoneme set is associated with a base grapheme that is pronounced as the phoneme in one or more English words.
US10521510B2
When retrieving specific text from a search target document, an information processing apparatus receives text, generates a semantic structure indicating a meaning of a word that is included in the received text, by subjecting the received text to semantic analysis, identifies a word that is associated with the generated semantic structure, by referring to a synonym dictionary that stores a word and semantic structure indicating a meaning of the word in an associated manner, determines whether the identified word is included in the search target document, and outputs information according to a determination result.
US10521508B2
Provided is a process for extracting conveyance records from unstructured text documents, the process including: obtaining, with one or more processors, a plurality of documents describing, in unstructured form, one or more conveyances of interest in real property; determining, with one or more processors, for each of the documents, a respective jurisdiction; selecting, with one or more processors, from a plurality of language processing models for the English language, a respective language processing model for each of the documents based on the respective determined jurisdiction; extracting, with one or more processors, for each of the documents, a plurality of structured conveyance records from each of the plurality of documents by applying the language processing model selected for the respective document based on the jurisdiction associated with the document; and storing, with one or more processors, the extracted, structured conveyance record in memory.
US10521507B2
A method includes accepting an input of text from an input device, detecting a string of characters from the text, the string of characters corresponding to an abbreviation, the abbreviation corresponding to a plurality of phrases, the plurality of phrases having different meanings respectively, generating the plurality of phrases for display in an interactive display window on a display device, the plurality of phrases being generated from a database storing correspondence information between the string of characters and the plurality of phrases, displaying the string of characters and the plurality of phrases on the interactive display window as candidates for an appropriate phrase corresponding to the abbreviation, the interactive display window being configured to enable a user to select the appropriate phrase from among the plurality of phrases, and storing the selected appropriate phrase with the text into a memory while keeping displaying the string of characters.
US10521493B2
The present disclosure provides systems and methods displaying and formatting text on an electronic display. A gesture input may be received via a gesture input device associated with the electronic display. For instance, a touchscreen may receive a touch gesture input. Each of a plurality of gesture inputs may be associated with a formatting rule and/or a text-component for selecting a portion of displayed text. Selected text may be formatted according to the formatting rule associated with the received gesture input. The formatted text may be displayed on the electronic display. A data store may associate each of the plurality of gesture inputs with a formatting rule that can be applied to selected text. Alternatively, a data store may associate each of the plurality of gesture inputs with a formatting rule and a text-component that defines to which component of text the formatting rule should be applied.
US10521484B1
A method and system for facilitating typeahead. The method can include: identifying a set of topics and/or connected accounts; storing, based on one or more signals associated with a user account, a portion of the topics and/or connected accounts in a cache; and using the cache to provide typeahead suggestions to a client in response to a request associated with the user account.
US10521469B2
The present disclosure relates to an image re-ranking method, which includes: performing image searching by using an initial keyword, obtaining, by calculation, an anchor concept set of a search result according to the search result corresponding to the initial keyword, obtaining, by calculation, a weight of a correlation between anchor concepts in the anchor concept set, and forming an anchor concept graph ACG by using the anchor concepts in the anchor concept set as vertexes and the weight of the correlation between anchor concepts as a weight of a side between the vertexes; acquiring a positive training sample by using the anchor concepts, and training a classifier by using the positive training sample; obtaining a concept projection vector by using the ACG and the classifier; calculating an ACG distance between images in the search result corresponding to the initial keyword; and ranking the images according to the ACG distance.
US10521464B2
Information extraction methods for use in extracting values from unstructured documents for predetermined or user-specified attributes into structured databases are provided herein. Methods include (a) automatically training machine learning models for extracting values from unstructured documents such that the values of the attributes are known for those training documents but the locations of the values in the documents are not known, (b) making a sustained connection between structured databases and unstructured documents so that the data across those two types of data stores can be cross-referred by the users any time, (c) a graphical interface specialized for rich user feedback to rapidly adapt and improve the machine learning models. The methods allow businesses and other entities or institutions to apply their domain knowledge to train software for extracting information from their documents so that the software becomes customized to those documents both from initial training as well as continuing user feedback.
US10521456B2
Disclosed herein are system, method, and computer program product embodiments for linking data records in memory. The system, method, and computer program product includes accessing a first record stored in memory, the first record holding information describing a first person and accessing at least one additional record stored in memory, the additional records holding information describing additional persons. The method continues by parsing the information of the first record and additional record and assigning the parsed information to predefined categories within the respective records. After assigning the information into categories, a similarity score between categorical information in the first record and categorical information of additional records is determined. A category of an additional record is then modified based on the similarity score, so the additional record is associated with the first person.
US10521452B2
A method and computer readable medium for exploring similar users and items of a media service. In one aspect, a user can explore for similar users iteratively. In one aspect, a user interface is generated that displays a user selectable indicia representing a similar member function for allowing a user to search a media service for at least one other user which has a degree of similarity with respect to the searching user. In another aspect, a method facilitates the search of such a similar user within a media service.
US10521448B2
Transformation pipelines are applied to disparate data sets and domains. An existing transformation pipeline is configured as a stored actionable task structure with a predefined plurality of sequenced tasks for transforming a first data set having a first set of attributes into a modified data set. The existing transformation pipeline is then applied to a different data set having a different set of attributes. Compatibility and operability for implementing the tasks of the actionable data set on the second data set are then determined, based at least in part on the stored attributes of the tasks and the second data set. Interface elements are also utilized to reflect the compatibility and operability of the tasks in the visual representation of the actionable task structure. Some elements are also utilized to provide suggestions for improving the compatibility of the actionable task structure.
US10521438B2
A method of presenting computer-generated search result information can include receiving a search request from a client computer; identifying a plurality of search results responsive to the search request; ranking the plurality of search results using content in one or more web notebooks; and providing the ranked plurality of search results for presentation in the client computer. Using the content can include determining whether at least one of a title, a heading, clipped content, metadata or a user-annotation in at least one web notebook relates to the search request and, if so, increasing a ranking of at least one search result referenced by the at least one web notebook.
US10521436B2
Presented are systems and methods that estimate the strength of a relationship between elements gathered from online and/or offline information sources by estimating the trustworthiness both of the gathered data and the information sources from which the data originates. In one exemplary application, the relatedness between co-occurring symptom and disease terms collected from information sources, such as health-related online databases, is iteratively evaluated based on the trustworthiness of symptom-disease pairings and the trustworthiness of the information sources themselves. In various embodiments of the present disclosure, an objective function is used to extract a knowledge base that aids in identifying a potential relationship between a set of given symptoms provided by a user of an online healthcare service and co-occurring disease terms, such that a likely disease may be inferred from the set of symptoms.
US10521434B2
A computer system includes processors that execute instructions stored on storage media to sort data using a data gravity well membrane. When executed, the program instructions: convert raw data into a first logical address that describes metadata about a first payload data; compare the first logical address to a second logical address for a second payload data to derive a Hamming distance between the first and second logical addresses; create a data vector for the second payload data that includes the Hamming distance between the first and second logical addresses; sort data vectors into specific data gravity wells on a data gravity wells membrane according to the Hamming distance stored in the data vector; incorporate a context object and a non-contextual data object into the data vector for the second payload data; and sort the second payload data into specific data gravity wells on the data gravity wells membrane.
US10521433B2
A query device for conducting automated user identification using a domain specific query language is described. The domain specific language is a computer language specially adapted for use in the healthcare domain. The domain specific language includes specific syntax suitable to the medical or healthcare industries, and is structured in the form of a string for processing. The domain-specific query is automatically processed and delineated into one or more processing sections. The domain-specific query is specifically structured for improved efficiency through iterative processing of the one or more processing sections, where each of the one or more processing sections is classified and mapped to a specific filter. Each filter represents a programmatic mechanism for automatically conducting a query against one or more backend data storages or other datasets to return a list of users or equipment that meet the criteria of the filter. Corresponding methods, and computer readable media are described.
US10521432B2
Described is a system, a method, and a computer-implemented apparatus for increasing computational efficiency and capacity of data stream processing systems. In one embodiment, executor grouping reduces cross-socket communication in a Non-Uniform Memory Access (NUMA) system. In another embodiment, input batching reduces thread context switches which improves instruction cache performance.
US10521431B2
A calculation engine of a database management system is described. In an exemplary implementation, the calculation engine receives a calculation scenario. The calculation scenario includes one or more relational operations and one or more non-relational operations of a multiprovider, the multiprovider utilizing a plurality of database partitions. The calculation engine processes the one or more non-relational operations via the multiprovider. After processing the one or more non-relational operations, the calculation engine converts the one or more relational operations. This converting comprises filtering first data from the plurality of partitions to form second data and forming third data by performing a union operation on the second data. Thereafter, the third data is filtered to form fourth data. Related systems, methods, and articles of manufacture are also described.
US10521423B2
Methods and apparati for scanning objects stored in a cloud storage system are disclosed. In an embodiment, the method includes determining at least one object that requires scanning; scanning each of the at least one object, wherein the scanning is performed using at least one scanning engine; and synchronizing the scanning results of the at least one object with a plurality of devices connected to the cloud store system.
US10521421B2
According to embodiments of the present invention, machines, systems, computer-implemented methods and computer program products for retrieving information pertaining to an affinity of a user are provided. In some embodiments, a search query is received from a user. The search query is analyzed to determine a bias of the user. The social media activity of the user is evaluated to determine affinity indicators for the user. Prior searches and selection of search results by the user is evaluated to detect patterns of the user. An affinity of the user is determined based on the bias, affinity indicators, and patterns. Initial search results are generated that satisfy the search query, and the initial search results are filtered based on the determined affinity of the user to produce search results in accordance with the determined affinity of the user.
US10521418B2
In an enforcement of temporal referential integrity in a database system, the database system receives a change request for one or more rows in a target table in the database system. The system determines that the target table has temporal referential constraints with a second table. The system compares a non-period child key value in child table row(s) with a non-period parent key value in parent table row(s) and compares a child business time period key value in the child table row(s) with a parent business time period key value in the parent table row(s). When the non-period child key value matches the non-period parent key value and when the child business time period key value is within the parent business time period key value, the system determines that the change request satisfies the temporal referential constraints. Otherwise, the system determines that the change request violates the temporal referential constraints.
US10521415B2
Systems and methods are disclosed for providing weighted evaluation. The system may comprise one or more processors and a memory storing instructions that, when executed by the one or more processors, cause the system to obtain a plurality of data point groups, obtain an inbound rank of each data point group based on one or more inbound ranks of one or more data groups linking to the data point group, obtain an outbound rank of the each data point group based on one or more outbound ranks of one or more data groups linked from the each data point group, obtain a group rank of the each data point group based on the inbound rank and the outbound rank of the each data point group, and process the data point groups according to the corresponding group ranks.
US10521409B2
A computer system exposes an interface for the specification of filter criteria. The filter criteria may identify control information of a service monitoring system (SMS) that defines entities in an IT environment monitored by the SMS. An association of identified entities with a monitored service may be made to direct the ongoing operation of the SMS toward the service.
US10521407B2
A computing device analyzes the transaction entries in a transaction log to identify related commands associated with performing a set of data operations. Commands are considered to be potentially related if the commands are executed within a predetermined timespan. Sets of potentially related commands are then grouped together into corresponding candidate patterns, and further analyzed in view of additional information to determine a probability that the potentially related commands of a candidate pattern are actually related. A confidence value indicating that probability is also determined. Application management tasks, such as database optimization and recovery tasks, for example, may then be performed based on the candidate patterns that meet or exceed a predetermined threshold.
US10521404B2
A system may receive a request to derive an output variable from a source variable. The request may include proposed logic to derive the output variable from the source variable. The system may then compare the proposed logic to existing logic to determine the proposed logic is new. In response to the proposed logic being new, the system may generate transformation code configured to execute the proposed logic. The system may further schedule the transformation code for execution at a predetermined time, and then execute the transformation code to generate data for the output variable.
US10521402B2
Systems, methods and apparatus for data management with shallow copy functionality are provided. The invention discloses embodiments capable of creating, managing and editing a user's data and a graphical, and related command line, user interface for visualizing and interacting with both the containers for collections of data items and the contained data items. The invention provides for copying a data object to a new container such that the original and new data object are indistinguishable in appearance and content.
US10521396B2
A region-based placement policy that can be used to achieve a better distribution of data in a clustered storage system is disclosed herein. The clustered storage system includes a master module to implement the region-based placement policy for storing one or more copies of a received data across many data nodes of the clustered storage system. When implementing the region-based placement policy, the master module splits the received data into one or more regions, where each region includes a contiguous portion of the received data. Further, for each of the plurality of regions, the master module stores complete copies of the region in a subset of the data nodes.
US10521394B2
A method and apparatus are for providing information to at least one other wireless communication device (WCD of a group of WCDs of which the WCD is a member, wherein the WCDs in the group have agreed to share computing resources. An assignment as one of a provider WCD and a recipient WCD is received in response to the information. At least one of two actions is taken. The first action is to operate, as a provider WCD, a power intensive portion of an application and providing the results to at least one recipient WCD of the group of WCDs. The second action is to operate, as a recipient WCD, to receive the results. Another method provides for a WCD to make a selection of the provider and recipient WCDs.
US10521382B2
A method of scheduling a system-on-chip (SoC) by a scheduler, located between a plurality of masters and a slave, includes receiving a plurality of access requests from the plurality of masters, setting the plurality of access requests in a plurality of registers, and scheduling the plurality of access requests based on the plurality of access requests.
US10521380B1
A computer program product, according to one embodiment, includes a computer readable storage medium having program instructions embodied therewith. The computer readable storage medium is not a transitory signal per se. Moreover, the program instructions are readable and/or executable by a controller to cause the controller to perform a method which includes: receiving a same input/output request along more than one communication paths, and evaluating a workload associated with each of the communication paths. A communication path having a lowest workload associated therewith is selected. Moreover, information corresponding to the input/output request as well as a status are sent along the selected communication path. The status sent indicates that the selected communication path was chosen to satisfy the input/output request. A special status indicating that none of the remaining communication paths were chosen to satisfy the input/output request is also sent along each of the remaining communication paths.
US10521374B2
Data on a memory space are compared without using a CPU, and an interrupt is generated in an interrupt condition based on at least one of the number of times of the comparison and the number of times of coincidence with a comparison condition. An interrupt controller outputs an interrupt signal to a first CPU core or a second CPU core. A DMAC transfers data on the memory space to at least one of a first buffer and a second buffer. A comparison circuit compares the data of the first buffer with the data of the second buffer. A condition coincidence frequency counter counts the number of times at which the comparison in the comparison circuit coincides with a comparison condition. An interrupt request circuit outputs an interrupt request to the interrupt controller, based on at least one of a value of the condition coincidence frequency counter and a value of a comparison frequency counter.
US10521368B2
Arbitration circuitry is provided for arbitrating between requests awaiting servicing. The requests require variable numbers of resources and the arbitration circuitry permits the request to be serviced in a different order to the order in which they were received. Checking circuitry prevents a given request other than a oldest request from being serviced when a number of available resources is less than a threshold number of resources. The threshold number is varied based on the number of resources required for at least one other request awaiting servicing.
US10521358B2
A network sensor that features a data store and a packet processing engine. Communicatively coupled to the data store, the packet processing engine is configured to (i) generate a retention priority for at least a first flow within a first storage region of a plurality of storage regions and (ii) identify, in response to an eviction request, the priority of each of the plurality of storage regions. The priority of the first storage region is partially based on the retention priority associated with the first flow while the priority of a second storage region is based on retention priorities associated with flows stored within the second storage region. The packet processing engine also is configured to identify, through use of the retention priorities of the stored flows within the first storage region, which flows are to be retained and which flows are to be evicted.
US10521356B1
Components of a data object are distributed throughout a data storage system. Manifests are used to store the locations of the components of data objects in a data storage system to allow for subsequent reconstruction of the data objects. The manifests may be stored in another data storage system when cost projections indicate it being economical to do so. If a manifest for a data object becomes lost or otherwise inaccessible, clues are used to regenerate the manifest, thereby providing a continued ability to access the components of the data object to reconstruct the data object.
US10521349B2
In an example, an apparatus comprises a plurality of processing unit cores, a plurality of cache memory modules associated with the plurality of processing unit cores, and a machine learning model communicatively coupled to the plurality of processing unit cores, wherein the plurality of cache memory modules share cache coherency data with the machine learning model. Other embodiments are also disclosed and claimed.
US10521339B2
A method for writing data to a memory module, the method may include determining to write a representation of a data unit to a retired group of memory cells; searching for a selected retired group of memory cells that can store a representation of the data unit without being erased; and writing the representation of the data unit to the selected retired group of memory cells.
US10521337B1
Methods and systems for performing mainframe batch testing and/or property-based validation testing using a finite-state machine are provided. According to certain aspects, a validation server may receive a set of batch data designed to validate a property under test, such as during mainframe batch testing. A validation server may validate that the set of batch data is in a proper format. The validation server may then cause a finite-state machine to process instructions contained within the set of batch data. Once the finite-state machine processes the set of batch data, the validation server may then validate that the finite-state machine adheres to the property under test. If the validation fails, the validation server may generate an error report describing the failure.
US10521335B2
Software applications are tested in different contexts, such as on different devices and under different conditions. During initial testing of an application, conditions of contexts are selected randomly, and the application is tested in each resulting context. After obtaining results from a sufficient number of contexts, the results are analyzed to create a predictive model indicating, for any postulated context, whether testing of the application is most likely to fail or to otherwise produce negative test results. The model is then analyzed to identify contexts that are most likely to produce negative results or failures, and those contexts are emphasized in subsequent application testing.
US10521332B1
A method for parametrization of a simulation model includes: composing the simulation model based on placement of elementary blocks and line connectors between the elementary blocks; adding a first marker block containing a first digital identifier to a first subsystem in the simulation model; adding a second marker block containing a second digital identifier to a second subsystem in the simulation model; analyzing the simulation model; listing parameters of the simulation model in a hierarchical tree and displaying the hierarchical tree on a screen to facilitate altering the parameters of the simulation model via the hierarchical tree; and determining whether to list the first subsystem and the second subsystem in a common node of the hierarchical tree or in separate nodes of the hierarchical tree based on whether or not the first digital identifier and the second digital identifier are identical.
US10521330B2
For each statement of an application executing in a debugger script-controlled debugger session, if the statement comprises an authorization check for a user in regard to an object, and if the debugger includes a set of authorization rules associated with the object, then execution of the application is discontinued. Application values for each data field of the object are obtained. These values are compared to respective values specified by each rule of the set of authorization rules. If the current values do not match values specified by at least one of the rules, the authorization check is executed normally. If the current values do match values specified by at least one of the rules, then: the authorization check is skipped, a pass or fail value for the authorization check is registered by the executing application according to the at least one rule, and execution of the application continues normally.
US10521324B2
Provided is a process including: receiving a given alarm from a given instance of a given service executing on a given computing device, wherein: the given service is one of a plurality of different services that form at least part of a given distributed application, and the distributed application is executing on a plurality of different computing devices including the given computing device; accessing contextual data, the contextual data including metrics or events received from other instances of the given service or other services of the given distributed application; determining an alarm score for the given alarm based on the contextual data, the alarm score being indicative of a marginal effect of the given alarm on performance of the given distributed application; and storing the alarm score in memory in association with the given alarm.
US10521323B2
A method of controlling a terminal is provided. The method includes determining a current status of at least one of the terminal and a peripheral environment of the terminal based on information obtained by using at least one sensor from a predetermined list of a plurality of statuses regarding the terminal or the peripheral environment of the terminal, determining an operation schedule of the at least one sensor based on the determined current status and the information obtained by using the at least one sensor, and controlling the at least one sensor to operate based on the determined operation schedule.
US10521320B2
According to an embodiment, an information processing device includes a processor. The processor is configured to: execute a rewriting process to rewrite some of a plurality of factors, included in data for normal operation of a target device, into a value different from a normal value; execute a correction process that is performed in a course of generating test data to be used for a test of the target device; and determine a method of generating the test data based on a rewriting part that indicates a factor serving as a target of the rewriting process and based on a correction part that indicates a factor serving as a target of the correction process.
US10521319B2
An automated test platform is disclosed for use in developing and troubleshooting customized software for multimedia content receivers. The automated test platform allows developers to script test cases that permit interaction with multiple content receivers at the same time. The test platform can be applied generally to any client-server system. The automated test platform is used to create scripts, run the scripts on multiple content receivers, and view test results. A graphical user interface (GUI) is provided that allows technicians without any programming experience to build and run complex interactive test sequences in a modular fashion. Such an automated test platform can be used to test cable and satellite television set top boxes, as well as DVD players, streaming media receivers, and game consoles.
US10521318B2
In accordance with embodiments of the present disclosure, a method may be implemented to respond to receiving data A to be stored in a storage system that includes a plurality of N spans, each including a plurality of M drives. The method may include performing data storing operations. The data storing operations may include storing the data A in N portions across the plurality of spans, generating a Za parity based on an XOR operation applied to the N portions of the data A, storing the Za parity in N−1 portions across a subset of the plurality of spans, determining a Zap parity based on an XOR operation applied to the N−1 portions of the Za parity, and storing the Zap parity.
US10521309B1
The system for backing up data comprises an input interface configured to receive an input set of files. The system for backing up data additionally comprises a processor configured to add modified objects to a list of modified objects in the set of files, and, in the event it is determined to provide the list of modified objects to a backup process, provide the list to the backup process.
US10521299B2
Embodiments of the present disclosure relate to method and apparatus for data protection. For example, there is provided a computer-implemented method. According to the computer-implemented method, it only needs to read the changed data to be protected rather than the entire data to be protected during the procedure of generating a redundant data portion for the changed data to be protected.
US10521297B2
In an optical disc apparatus that records and reproduces data onto and from an optical disc in units of predetermined block, an information divider divides the data so as to reduce an amount of the data included in each of blocks when a recording state of the optical disc does not satisfy a predetermined criterion, and reproduces recording data in units of the block by adding sub-information including a value indicating the amount of the data included in each of the blocks. An error-correction encoder circuit encodes the recording data in a first error-correction code format, and a recorder converts encoded recording data into a recording signal, and records the recording signal onto the optical disc. A quality evaluator circuit produces an evaluation value indicating a recording quality based on a result of reproducing the recording signal recorded on the optical disc.
US10521295B2
A radiation hardened single board computer (SBC) includes a processor; synchronous dynamic random-access memory (SDRAM); non-volatile memory; a field programmable gate array (FPGA); and board-level physical layer interfaces.
US10521291B2
An operating method of a controller, comprising: generating, when a first ECC decoding operation to codeword read from a semiconductor memory device according to a hard read voltage fails, an optimization information corresponding the result of the first ECC decoding operation; generating one or more quantization intervals determined by the optimization information; and performing a second ECC decoding operation to codeword read from the semiconductor memory device according to soft read voltages determined by the quantization intervals and the hard read voltage, wherein the optimization information includes: deterioration information of a memory block; ECC decoder parameter information; and constituent code parameter information.
US10521290B2
A solid state comprising: memory cells programmable with threshold voltages, each one associated with a respective bit pattern and variable over the memory cells thereby defining a respective threshold voltage distribution. Each pair of adjacent bit patterns can be discriminated by a respective first reference voltage between the threshold voltages associated with the pair of adjacent bit patterns, and a controller for storing LLR tables; for each bit pattern combination comprising first, second and third bit patterns respectively associated with the first reference voltage, a second reference voltage higher than the first reference voltage, and a third reference voltage lower than the first reference voltage, each LLR table has an error information when that bit pattern combination is associated with respective threshold voltages that, based on the threshold voltage distributions, are inconsistent with each other, or a LLR value otherwise.
US10521283B2
An MPI collective operation carried out in a fabric of network elements by transmitting MPI messages from all the initiator processes in an initiator node to designated ones of the responder processes in respective responder nodes. Respective payloads of the MPI messages are combined in a network interface device of the initiator node to form an aggregated MPI message. The aggregated MPI message is transmitted through the fabric to network interface devices of responder nodes, disaggregating the aggregated MPI message into individual messages, and distributing the individual messages to the designated responder node processes.
US10521280B2
The disclosure relates to technology for coordinating execution of serverless functions. One or more events are received from one or more external sources. The one or more events are mapped to one or more event states of a processing graph according to mapping rules, the one or more event states including one or more actions, and the one or more actions are executed in response to the one or more events satisfying conditions of the mapping rules. An event response is the received in reply to the received one or more events, where the event response is based on execution of one or more tasks corresponding to a sequence of the executed one or more actions.
US10521278B2
A computing device may recreate data objects formatted specifically for use in a currently executing application based on other data objects formatted in a different manner and specifically for use in a secondary application. For example, the computing device may initially execute a first application. The computing device may execute a second application contains one or more data objects that are specifically formatted for use and display in the second application. The first application may receive a first data object, where a format of the first data object is specific to the second application. The first application may determine content of the first data object and create a second data object that includes at least a portion of the content of the first data object, where a format of the second data object is specific to the first application.
US10521275B2
The described technology is directed towards an asynchronous dispatcher including control logic that manages a queue set, including to dequeue and execute work items from the queue on behalf of application code executing in a program. The dispatcher yields control to the program to allow the program and application code to be responsive with respect to user interface operations.
US10521274B2
Systems and methods are disclosed for calculating and utilizing a variable CPU weighting factor for host configuration optimization in a data center environment. According to one illustrative embodiment, implementations may utilize actual workload profiles to generate variable CPU weighting factor(s) to optimize host configurations.
US10521268B2
A job scheduling method including notifying, by a first control node scheduling a first task, a second control node scheduling a second task to obtain execution data generated by at least one task instance of the first task when the at least one task instance of the first task completes execution; obtaining, by the second control node, the execution data generated by the at least one task instance of the first task and assigning the execution data to each task instance of the second task; and scheduling, by the second control node, an execution of at least one task instance of the second task and processing the execution data. The techniques of the present disclosure improve scheduling efficiency and resource utilization rate.
US10521266B1
Utility programs run on multiple mainframes to periodically monitor a list of started tasks that have been defined in metadata files as running on each mainframe. Some of the utility programs is largely driven by metadata, and filters programmed to manage an output stream for each started task, as the output stream is generated, while remaining agnostic as to an origin of the output stream. When problems are detected in the output stream, users are notified via alerts, along with a suggestion of what to do. This batch dashboard application can be used by anyone with mainframe started tasks that need to be monitored. Once alerted to a problem, the users can logon to the online dashboard for that same list of started tasks and take actions to research and fix the problems.
US10521263B2
A dispatcher layer is instantiated to include dispatcher correspondingly associated with microservices part of an application. The communication between the microservices may be performed based on different communication methods, such as API calling methods, event-publishing methods, combination thereof, other. Communication statistical data is stored in relation to performed interactions between the microservices while the application is running and serving requests sent by users. The communication statistical data is evaluated based on predefined communication conditions related to determining a communication method for interaction between services from the set. Based on the evaluation, instructions to a first dispatcher at the dispatcher layer for configuring the determined communication method between the first service and the second service is provided. The first dispatcher is coupled to the first service and the first dispatcher configures the communication method based on request exchange with a second dispatcher associated with the second service.
US10521254B2
An information processing system includes: an information processing apparatus including: a shared operation unit that performs verification of operation of inter-model common processing common to multiple models out of processes of an application with a first program for realizing operation common to the models, and sends a result of the operation verification to the application; a processing requesting unit that requests an external device to perform verification of operation of model-dependent processing specific to each model with a second program for realizing operation specific to each model; and an acquiring unit that acquires a result of the verification of operation of model-dependent processing from the external device, and sends the result to the application, and external devices that perform verification of operation of model-dependent processing specific to each model out of the processes of the application with the second program for realizing operation specific to each model.
US10521239B2
A method for accelerating code optimization a microprocessor. The method includes fetching an incoming microinstruction sequence using an instruction fetch component and transferring the fetched macroinstructions to a decoding component for decoding into microinstructions. Optimization processing is performed by reordering the microinstruction sequence into an optimized microinstruction sequence comprising a plurality of dependent code groups. The optimized microinstruction sequence is output to a microprocessor pipeline for execution. A copy of the optimized microinstruction sequence is stored into a sequence cache for subsequent use upon a subsequent hit optimized microinstruction sequence.
US10521238B2
The present application discloses a computing device that can provide a low-power, highly capable computing platform for computational imaging. The computing device can include one or more processing units, for example one or more vector processors and one or more hardware accelerators, an intelligent memory fabric, a peripheral device, and a power management module. The computing device can communicate with external devices, such as one or more image sensors, an accelerometer, a gyroscope, or any other suitable sensor devices.
US10521236B2
In an embodiment, a processor includes a branch prediction circuit and a plurality of processing engines. The branch prediction circuit is to: detect a coherence operation associated with a first memory address; identify a first branch instruction associated with the first memory address; and predict a direction for the identified branch instruction based on the detected coherence operation. Other embodiments are described and claimed.
US10521234B2
A method and circuit arrangement utilize inactive non-pipelined operation resources in one processing core of a multi-core processing unit to execute non-pipelined instructions on behalf of another processing core in the same processing unit. Adjacent processing cores in a processing unit may be coupled together such that, for example, when one processing core's non-pipelined execution sequencer is busy, that processing core may issue into another processing core's non-pipelined execution sequencer if that other processing core's non-pipelined execution sequencer is idle, thereby providing intermittent concurrent execution of multiple non-pipelined instructions within each individual processing core.
US10521231B2
In a processor supporting execution of a plurality of functions of an instruction, an instruction blocking value is set for blocking one or more of the plurality of functions, such that an attempt to execute one of the blocked functions, will result in a program exception and the instruction will not execute, however the same instruction will be able to execute any of the functions that are not blocked functions.
US10521229B2
A memory cell that may be used for computation and processing array using the memory cell are capable to performing a logic operation including a boolean AND, a boolean OR, a boolean NAND or a boolean NOR. The memory cell may have a read port that has isolation circuits that isolate the data stored in the storage cell of the memory cell from the read bit line.
US10521226B2
Disclosed embodiments relate to efficient complex vector multiplication. In one example, an apparatus includes execution circuitry, responsive to an instruction having fields to specify multiplier, multiplicand, and summand complex vectors, to perform two operations: first, to generate a double-even multiplicand by duplicating even elements of the specified multiplicand, and to generate a temporary vector using a fused multiply-add (FMA) circuit having A, B, and C inputs set to the specified multiplier, the double-even multiplicand, and the specified summand, respectively, and second, to generate a double-odd multiplicand by duplicating odd elements of the specified multiplicand, to generate a swapped multiplier by swapping even and odd elements of the specified multiplier, and to generate a result using a second FMA circuit having its even product negated, and having A, B, and C inputs set to the swapped multiplier, the double-odd multiplicand, and the temporary vector, respectively.
US10521224B2
The disclosed method may include accessing features including feature information of one or more candidate target projects and of a subject project, in which the candidate target projects and the subject project are software programs. The method may include determining a similarity score between the feature information of each of the candidate target projects and the feature information of the subject project, in which a similarity score is determined for each feature of each of the candidate target projects. The method may include aggregating the similarity scores of the feature information of each feature in the candidate target projects to create an aggregate similarity score for each of the candidate target projects and generate a set of similar target projects. The method may include modifying the subject project by implementing recommended code, based on the similar target projects, in the subject project to repair a defect.
US10521219B2
An update processing method executed by a processor included in an update processing apparatus, the update processing method includes storing, in a memory, update information that is updated in accordance with update processing executed by using information called from another computer in accordance with accepted request information, the update information regarding a frequency of the call, and response information that is used for response to the request information; when the request information corresponding to the update processing is accepted, determining in accordance with the update information whether to transmit the response information stored in the memory as a response to the request information to a transmission source of the request information; and transmitting the response information selected in accordance with a result of the determination to the transmission source.
US10521212B2
Methods, apparatus, systems, and articles of manufacture for alerting the presence of bundled software during an installation are disclosed. An example method includes identifying installation of a software product. The software product is scanned to identify first information, the first information to include information extracted from a file associated with the software product that is indicative of a main application to be installed as part of the software product. Information displayed to a user during the installation of the software product is scanned to identify second information. Whether a bundled application is included in the software product is identified based on the first information, the second information, and the signature file.
US10521209B2
Computer source code maintenance represents a significant aspect of computer systems. Code that was developed for one platform, in one language, may require a significant investment in human effort to port such code to another platform or language. Converting source code to a language-agnostic source code allows a user to view the interaction of various portions of the source code in a unified view. Additionally, the language-agnostic source code may be automatically regenerated by a processor to a different platform or language. As a further benefit, documentation, standards-compliance, security, and/or other non-functional requirements may be provided to further enhance the utility of the original source code.
US10521207B2
Systems, methods, and computer program products relating to compiling source code to reduce memory operations during execution. A compiler receives source code. The compiler identifies an indirect access array operation in the source code. The compiler generates replacement code for the indirect access array operation. The replacement code includes a mask array and a union data structure. The compiler generates modified code. The modified code modifies the source code to include the replacement code in place of the indirect access array operation.
US10521206B2
Implementations of the disclosure provide systems and methods for ensuring that the value for any local function variable is initialized before it is used during the execution of the function. The method comprises identifying, by a processor executing a compiler, a reference to a local variable in a source code. It is determined that there can be a usage of the local variable in an uninitialized state as an operand for an operation. In the source code, a notation is identified that is associated with the local variable for suppressing a warning by the compiler with respect to using the local variable in the uninitialized state as an operand for an operation, In view of the source code, an object code is generated for tracking initialization and usage of the local variable at runtime.
US10521204B2
A compiler may perform type checking as part of analyzing source code. The type checking may include existential type packing for structurally-restricted existential types. At compile time, the compiler may need to use an existential type that does not conform to the language's structural rules. The compiler may apply the “pack” operation described herein to produce a supertype of the desired existential type that does conform to the language's structural rules, and thus can be used as an approximation of the desired type. The compiler may then perform additional type checking using the resulting type.
US10521194B2
The present embodiments relate to integrated circuits with circuitry that efficiently performs mixed-precision floating-point arithmetic operations. Such circuitry may be implemented in specialized processing blocks. The specialized processing blocks may include configurable interconnect circuitry to support a variety of different use modes. For example, the specialized processing blocks may implement fixed-point addition, floating-point addition, fixed-point multiplication, floating-point multiplication, sum of two multiplications in a first floating-point precision, with or without casting to a second floating-point precision and the latter followed by a subsequent addition in the second floating-point precision, if desired, just to name a few. In some embodiments, two or more specialized processing blocks may be arranged in a cascade chain and perform together more complex operations such as a recursive mode dot product of two vectors of floating-point numbers having a first floating-point precision and output the dot product in a second floating-point precision.
US10521185B1
A user interface device for an intelligent automated assistant service uses a plurality of audio data paths that can be selectively switched to operate in a privacy mode. There is provided a first audio data input path between the audio input subsystem and an internal buffer; a first audio data output path between the internal buffer and the first communications subsystem; a second audio data output path between the internal buffer and the second communications subsystem; and a first audio data bypass path between the audio input subsystem and the second communications subsystem. In a first state, the first audio data input path directs audio data to the internal buffer, and to the first and second audio data output paths. In a second state, the first audio data input path is terminated and audio data is directed to the second communications subsystem on the first audio data bypass path.
US10521181B2
In some implementations, an electronic device includes a display stack to display content. The display stack can include a number of substrates coupled using a first optically clear adhesive (OCA) and a second OCA. In an implementation, the first OCA includes an acrylic-containing OCA and the second OCA includes a silicon-containing OCA. In some instances, the first OCA can include an additive to filter ultraviolet radiation. In a particular implementation, the first OCA can have a total luminous transmittance of no greater than approximately 30% for at least a portion of the UV spectrum radiation.
US10521174B2
A non-transitory computer-readable medium stores computer-readable instructions, the computer-readable instructions, in response to being activated by an operating system, causing the portable terminal to perform: a first acceptance process of accepting an operation designating one of image forming devices communicable; a first storage process of causing the memory to store a first device ID, as a designated device ID; a second acceptance process of accepting an operation designating contents; and an operation instruction process of transmitting operation instruction information, and the computer-readable instructions, in response to being activated by another program, causing the portable terminal to perform: an acquisition process of acquiring, from the another program, a second device ID for identifying the image forming device; and a second storage process of causing the memory to store the second device ID, as the designated device ID.
US10521169B2
A host device to which a print data generation device according to the invention is applied includes: a preview display unit which displays a handwritten input trajectory on a tape image showing an outer shape of a tape; a display control unit which performs display control of the preview display unit; and a print data generation unit which generates print data to print an image based on the input trajectory, on the tape with a size based on the tape image displayed by the preview display unit. The display control unit enlarges the tape image to include the handwritten input trajectory if the handwriting is performed outside the tape image.
US10521155B2
Examples disclosed herein relate, in one aspect, to a non-transitory machine-readable storage medium encoded with instructions executable by a processor of a computing device to cause the computing device to start a virtual machine process. The virtual machine process may obtain access to a shared memory segment accessible by a monitoring process, execute an application, and store in the shared memory segment management data associated with the application's execution.
US10521154B2
A method of controlling an ultra-deep power down (UDPD) mode in a memory device, can include: receiving a write command from a host via an interface; beginning a write operation on the memory device to execute the write command; reading an auto-UDPD (AUDPD) configuration bit from a status register; switching the interface to a Single SPI mode in response to the write command and the AUDPD configuration bit being set; completing the write operation on the memory device; automatically entering the UDPD mode upon completion of the write operation in response to the AUDPD configuration bit being set; and entering a standby mode upon completion of the write operation in response to the AUDPD configuration bit being cleared.
US10521151B1
Determining effective space utilization in a storage system, including: identifying an amount of data stored within the storage system that is associated with a user-visible entity; identifying an amount of data stored within the storage system that is associated with all snapshots of the user-visible entity; and reporting, in dependence upon the amount of data stored within the storage system that is associated with the user-visible entity and the amount of data stored within the storage system that is associated with all snapshots of the user-visible entity, a total capacity utilization associated with the user-visible entity.
US10521147B2
One general aspect of device reservation state synchronization in accordance with the present description, device reservation management logic ensures synchronization of reservation states of primary and secondary volumes of a mirror relationship in the event of a change in the state of the mirroring relationship such as achieving full data synchronization between the volumes. Other features and aspects may be realized, depending upon the particular application.
US10521145B1
There is disclosed herein techniques for managing data storage. In one exemplary embodiment, the techniques comprise generating one or more sets of storage devices. Each set is configured to be mutually exclusive with respect to other sets of the one or more sets such that storage devices within the same set provide the basis for the formation of a RAID (Redundant Arrays of Independent Disks) stripe. The techniques further comprise forming a RAID stripe from respective storage extents associated with different storage devices of the same set. The techniques further comprise mapping a storage object to the RAID stripe. The techniques further comprise servicing host I/O (Input/Output) operations directed to the storage object by using the RAID stripe mapped thereto.
US10521137B1
A method, computer program product, and computer system for receiving, by a computing device, a write I/O to a storage device array coupled to a cache, wherein the write I/O may be received from a host. A cache miss in the cache may be determined for the write I/O. One or more free pages may be allocated at an address in the cache to store data for the write I/O. The address in the cache to store the data may be sent to a hostside portion of a software stack in the storage device array. The data may be written directly from the hostside portion to the cache at the address.
US10521132B1
A method for managing volumes in a scratch pool of a virtual tape system is disclosed. In one embodiment, such a method provides a scratch pool containing volumes for use in a virtual tape system. The method further enables a user to predefine an external pool of volumes residing outside of the scratch pool. This external pool may be hidden to a host system accessing the virtual tape system. The method monitors current and/or past usage of the volumes in the scratch pool and, based on the usage, predicts a future need for volumes in the scratch pool. The method automatically moves volumes between the external pool and the scratch pool in accordance with the future need. A corresponding system and computer program product are also disclosed.
US10521127B2
Systems and methods that result in a stable storage system are provided. In the storage system, the latency spikes may be reduced when multiple volumes are aggregated into transfer sets according to system characteristics. The storage system transfers ownership of volumes in each transfer set as a single transaction. In the storage system, connectivity between the host and the storage controller is re-established based on the connectivity in a physical transport layer and a single path. In the storage system, pre-mature failback is also avoided when ownership of volumes is transferred back to a preferred storage controller when the same number of paths existed between the host and the preferred storage controller before and after a failover operation. Further, the storage system generates connectivity reports that display connectivity paths between hosts, storage controllers, and volumes.
US10521115B2
Provided are techniques for handling cache and Non-Volatile Storage (NVS) out of sync writes. At an end of a write for a cache track of a cache node, a cache node uses cache write statistics for the cache track of the cache node and Non-Volatile Storage (NVS) write statistics for a corresponding NVS track of an NVS node to determine that writes to the cache track and to the corresponding NVS track are out of sync. The cache node sets an out of sync indicator in a cache data control block for the cache track. The cache node sends a message to the NVS node to set an out of sync indicator in an NVS data control block for the corresponding NVS track. The cache node sets the cache track as pinned non-retryable due to the write being out of sync and reports possible data loss to error logs.
US10521113B2
An embodiment includes a module, comprising: a memory bus interface; circuitry; and a controller coupled to the memory bus interface and the circuitry, and configured to: collect meta-data associated with the circuitry; and enable access to the meta-data in response to a memory access received through the memory bus interface.
US10521108B2
An electronic apparatus includes a memory that stores a specified criterion for classifying a type of a touch region according to an assigned function, and a processor that classifies at least one touch region as belonging to a palm region for assigning a first function or to a pen region for assigning a second function based on the specified criterion if a touch to a touch panel is detected, issues an individual identifier (ID) for the pen region, and issues a group ID after performing grouping for the palm region.
US10521107B2
A method is performed at a mobile device with a display. The method includes displaying a first mode of a plurality of modes of the device. The first mode of the device is active when a first set of time and/or device location criteria are met and the second mode of the device is active when a second set of time and/or device location criteria are met. While the first set of time and/or device location criteria are met and the first mode of the device is active, the mobile device detects a first input that overrides the first mode of the device. In response to detecting the first input, the mobile device activates the second mode of the device. The mobile device detects a second input and, in response to detecting the second input, performs an operation in the second mode of the device.
US10521089B2
The present disclosure provides embodiments of a method of providing a virtual window treatment decorating interface that comprises receiving, at a processor, window data pertaining to at least one window of a premises, providing a user interface for selection of a window treatment for the at least one window, rendering one of the at least one window in the user interface, the rendering being generated based on the window data, receiving a selection of a window treatment to be applied to the rendered window, and rendering the window treatment onto the rendered window in the user interface. Preferably, the method includes setting dimensions of the rendered window and window treatment to correspond to professional measurement data of the window to provide an accurate virtual visualization of the window with the selected treatment.
US10521087B2
In one embodiment, a method includes, by a server computing device, providing first instructions to a client device to display a user interface including a first icon associated with a third-party system and a share shutter button, a selectable button to capture and designate one or more media items for sharing. The method includes receiving one or more selections of the share shutter button. The method includes providing second instructions to the client device to display, for each selection of the share shutter button, an animation indicating that the media item has been captured and designated. The second instructions include instructions to display a copy of the media item centered in the user interface and instructions to dimensionally reduce the copy of the media item while moving the copy toward a location of the first icon associated with the third-party system until the copy disappears from the user interface.