The voltage conditions stressed to a memory unit in a nonvolatile memory system during the erasing period are changed so that a selecting memory unit is balance to the erasing operation of other memory units which are erased right now in the system. The changed conditions can compensate the capacitance coupling voltage inside a NAND string. When erasing operation is carried on the offset NAND string and erasing voltage pulse is stressed on the offset NAND string, the word line of one or more inner memory unit can be floated, thereby forming a peak erasing potential which is lower than the normal potential on a unit channel electric medium coupled to the word line. Therefore, the erasing speed of the units is reduced so as to be matched with the tail memory units which have a relatively slow erasing speed. The erasing operation of different memory units can be changed with different amount by floating different word line in different time.