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CN101297208B IC测试方法和设备 失效 - 权利终止

IC测试方法和设备
摘要：
测试电路具有移位寄存器电路(76)，用于存储为了测试集成电路核心的指令数据。移位寄存器电路的每一级包括：第一移位寄存器存储元件(32)，用于存储从串行输入(wsi)接收到的信号并以扫描链操作模式将所述信号提供给串行输出(wso)；以及第二并行寄存器存储元件(38)，用于存储来自第一移位寄存器存储元件的信号并以更新操作模式将所述信号提供给并行输出。测试电路还包括多路复用器(70)，用于向移位寄存器电路的串行输入(wsi)发送串行测试输入或向移位寄存器电路(76)的串行输入中发送附加输入(wpi[n])。在优选实施例中，测试电路还包括控制电路(78)，所述控制电路响应于存储在移位寄存器的至少一级中的特定值以产生更新信号，所述更新信号用于将其他移位寄存器级设定为更新操作模式。
摘要（英）：

A testing circuit has a shift register circuit (76) for storing instruction data for the testing of an integrated circuit core. Each stage of the shift register circuit comprises a first shift register storage element (32) for storing a signal received from a serial input (wsi) and providing it to a serial output (wso) in a scan chain mode of operation, and a second parallel register storage element (38) for storing a signal from the first shift register storage element and providing it to a parallel output in an update mode of operation. The testing circuit further comprises a multiplexer (70) for routing either a serial test input to the serial input (wsi) of the shift register circuit or an additional input (wpi[n]) into the serial input of the shift register circuit (76). In a preferred example, the testing circuit further comprises a control circuit (78) which responds to a specific value of data stored in at least one stage of the shift register to generate an update signal for setting the other shift register stages into the update mode of operation.

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