The invention relates to a method of producing a large gate width silicon carbide metal semiconductor filed-effect transistor (SiC MESFET) with intercellular balance resistors, mainly comprising the steps of additionally arranging the intercellular balance resistors in the process of producing the large gate width SiC MESFET and finally arranging one intercellular balance resistor on the input end of the large gate width SiC MESFET and one balance resistor on the output end of the large gate width SiC MESFET. The method of producing intercellular balance resistors is easy, and after the intercellular balance resistors are additionally arranged in the process of producing the large gate width SiC MESFET, the yield of the finished large gate width SiC MESFET can be improved, the large gate width SiC MESFET with stable performance and high reliability can be produced, and the output power of the large gate width SiC MESFET can be improved.