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发明公开
CN104465423A 一种双引线框架叠合设计半导体器件封装方法 有权

一种双引线框架叠合设计半导体器件封装方法
摘要：
本发明公开了一种双引线框架叠合设计半导体器件封装方法，包括：提供第一引线框架；将第一芯片倒装在所述第一芯片座及第一芯片栅极管脚上，将第二芯片正装在所述第二芯片座上；提供第二引线框架；将所述第二引线框架组装在所述第一引线框架之上；焊接导线，所述导线连接所述第二引线框架的第二芯片栅极管脚和所述第二芯片的栅极。本发明所述的双引线框架叠合设计半导体器件封装方法具有以下优点：一是提高了半导体器件的电流承载能力，且第二引线框架上的铜桥能够吸收芯片瞬时产生的热量；二是封装后的半导体器件可以方便地测量芯片表面到第一引线框架表面的高度；三是第一引线框架和第二引线框架的结合更加紧密，封装可靠度高。
摘要（英）：

The invention discloses a double-lead-frame overlap design semiconductor device package method. The method includes the steps that a first lead frame is provided; a first chip is arranged on a first chip base and a first chip gate pin in an inverted mode, and a second chip is arranged on a second chip base in a forward mode; a second lead frame is provided; the second lead frame is assembled to the first lead frame; a wire is welded, and the wire connects a second chip gate pin of the second lead frame and a gate of the second chip. The double-lead-frame overlap design semiconductor device package method has the following advantages that the current bearing capacity of a semiconductor device is improved, and a copper bridge on the second lead frame can absorb the heat generated by the chips instantaneously; after the semiconductor device is packaged, the height between the surfaces of the chips and the surface of the first lead frame can be conveniently measured; the first lead frame and the second lead frame are combined more closely, and package reliability is high.

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