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发明授权
CN104752456B 用于改进的RRAM可靠性的金属线连接件、包括它的半导体布置及其制造方法 失效 - 权利终止

用于改进的RRAM可靠性的金属线连接件、包括它的半导体布置及其制造方法
摘要：
一种集成电路器件包括RRAM单元的阵列、用于RRAM单元的阵列的位线的阵列以及用于RRAM单元的阵列的源极线的阵列。源极线和位线都位于RRAM单元之上的金属互连层中。从而提供了具有比传统的引线尺寸更高的源极线，这使复位速度增大了约一个数量级。结果，RRAM晶体管的寿命和RRAM器件的耐久性提高了类似的程度。本发明提供用于改进的RRAM可靠性的金属线连接件、包括它的半导体布置及其制造方法。
摘要（英）：

An integrated circuit device includes an array of RRAM cells, an array of bit lines for the array of RRAM cells, and an array of source lines for the array of RRAM cells. Both the source lines and the bit lines are in metal interconnect layers above the RRAM cells. The source line are thereby provided with a higher than conventional wire size, which increases the reset speed by approximately one order of magnitude. The lifetime of the RRAM transistors and the durability of the RRAM device are consequentially improved to a similar degree.

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