The invention discloses an SRAM type FPGA double-array-hole electrostatic discharge protection layout structure for aerospace and brings forward a double-array-hole electrostatic discharge protection layout structure, for electrostatic discharge protection of ultra-deep submicron, especially an SRAM type FPGA IO interface circuit for aerospace. Two MOS type transistors form a standard unit. The structure employs double array holes at drain regions of the transistors, solves the problem of incapability of meeting design requirements of the transistors due to poor current passing capability of a conventional standard electrostatic discharge protection structure when the IO interface circuit satisfies design performance, realizes reasonable match between electrostatic discharge protection and the IO interface circuit, enhances the electrostatic discharge protection capability, and at the same time, reduces the layout area occupied by an electrostatic discharge protection device.