The embodiments herein relate to methods, apparatus, and systems for forming recessed features at high aspect ratios. Often, such features are formed in the context of fabricating a vertical NAND (VNAND) memory device. Various disclosed embodiments relate to process flows that involve depositing and shaping sacrificial posts on a metal seed layer that covers an underlying stack of materials, electroplating or electroless plating metal hard mask material around the sacrificial posts, removing the sacrificial posts, and etching the underlying stack of materials to form a high aspect ratio recessed feature.