The invention provides an SOI (Silicon On Insulator) lateral insulated gate bipolar transistor. A cellular structure comprises a substrate, a buried oxide layer, a thick medium layer, a thick-silicon-layer N-type drift region, a P well region, a P-type heavily-doped emitter region, an N-type heavily-doped region, an ultrathin top-silicon N-type drift region, an N-type buffer region, a P-type heavily-doped collector region, an emitter contact electrode, a collector contact electrode, a gate oxidation layer, a polycrystalline silicon gate, a P strip and an N strip. According to the SOI lateral insulated gate bipolar transistor provided by the invention, an electric field of a buried layer is enhanced by utilizing the medium-field enhancement theory, so that the longitudinal breakdown voltage of an SOI device is improved; the specific on-state resistance of the device is reduced by adopting the thick-silicon-layer N-type drift region at an emitter region close to a source end, the distribution of the electric field on the surface is adjusted by respectively adopting lateral linear variable doping for the ultrathin top-silicon N-type drift region and the thick-silicon-layer N-type drift region, so that the high breakdown voltage of the device is maintained and simultaneously, the specific on-state resistance is greatly reduced.