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发明授权
CN107017145B 用于阻抗匹配电路中的均匀性控制电路 有权

用于阻抗匹配电路中的均匀性控制电路
摘要：
本发明涉及用于阻抗匹配电路中的均匀性控制电路。描述了阻抗匹配电路(IMC)。所述IMC包括第一电路，所述第一电路包括沿路径限定的第一多个调谐元件。所述第一电路具有耦合到千赫(kHz)射频(RF)发生器的输入端。所述第一电路被耦合到输出端。所述IMC还包括具有第二多个调谐元件的第二电路。所述第二电路具有耦合到兆赫(MHz)RF发生器的输入端，并被耦合到所述输出端。所述IMC包括由所述第一电路的所述多个调谐元件中的至少一个限定的均匀性控制电路(UCC)。所述UCC沿着所述第一电路的所述路径串联连接以限定电容，所述电容至少部分地影响由所述等离子体室产生的蚀刻速率的径向均匀性分布。
摘要（英）：

An impedance matching circuit (IMC) is described. The IMC includes a first circuit that includes a first plurality of tuning elements defined along a path. The first circuit has an input coupled to a kilohertz (kHz) radio frequency (RF) generator. The first circuit is coupled to an output. The IMC further includes a second circuit having a second plurality of tuning elements. The second circuit has an input coupled to a megahertz (MHz) RF generator and is coupled to the output. The IMC includes a uniformity control circuit (UCC) defined from at least one of the plurality of tuning elements of the first circuit. The UCC is connected serially along the path of the first circuit to define a capacitance that at least partially influences a radial uniformity profile in an etch rate produced by a plasma chamber.

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