The invention discloses a transient voltage suppressor and a manufacturing method thereof. The transient voltage suppressor includes a semiconductor substrate of a first doping type, a buried layer of a second doping type, an epitaxial layer of the second doping type on the semiconductor substrate, a first doping area of the first doping type in the epitaxial layer, and a second doping area of the second doping type longitudinally going through the epitaxial layer from the first doping area to extend to the second doping are of the second doping area, wherein the cross-sectional area of the first doping area is not smaller than that of the second doping area, and the interfaces of the areas are at the lower surface of the first doping area. Since internal breakdown is used to replace surface breakdown and the heavily doped semiconductor substrate and the light doped reverse epitaxial layer are adopted, the transient voltage suppressor provided by the embodiment of the invention has better reliability and expansibility.