The invention discloses a differential output circuit and a semiconductor device. The invention provides a high reliability circuit using transistors with a lower withstanding voltage. The differential output circuit includes: a differential pair including first and second transistors (MN1, MN2) for receiving input signals (IN, INB) reverse in phase to each other, respectively; third and fourth transistors (MN3, MN4) having the same conductivity type as the first and second transistors which are cascode-connected to the first and second transistors, respectively; first and second output terminals (OUTB, OUT) connected to drains of the third and fourth transistors, respectively; and a voltage division circuit (10) for dividing a midpoint potential between respective potentials of the firstand second output terminals to feed gates of the third and fourth transistors.