The invention discloses a DLL-based improved structure. The locking process of a DLL is divided into two processes that 1, the phase detector coarse locking process is conducted; and 2, after coarse locking is completed, a phase detector phase detection mode is switched to a D-trigger structure-based phase and frequency detector fine locking mode, and it is guaranteed that an output signal of theDLL in a locked state has the smaller clock jitter. The invention provides a delay locked loop for a frequency multiplier circuit. A phase and frequency detector and a phase detector cooperate with each other, and the problem that due to the fact that the phase detector generates a large voltage fluctuation on a loop capacitor, the delay jitter of voltage controlled delay units and the spectrum purity and clock jitter of the output signal are influenced is avoided.