An apparatus divides one element a' of a Galois field GF(2 m ) by another element α i of the field. Divider data α i are supplied to one of the first linear shift registers (A, to A4) and to the other first linear shift registers through α N1 , α N2 ,... multiplier circuits (51 to 53), respectively. Simultaneously, dividend data α i are supplied to one of the second linear shift registers (B, to B 4 ) and to the other second linear shift registers through α N1 , α N2 , ... multiplier circuits (58 to 60), respectively. "1" detector circuits (55 to 57) are connected to the outputs of the first linear shift registers (A, to A 4 ), respectively. The first linear shift registers (A, to A4) and the second linear shift registers (B 1 to B 4 ) are shifted several times until any "1" detector circuit (55 to 57) detects "1' in response to output signals from a 2-input AND gate (AND,,). When "1" is detected, a NOR gate (NOR, o ) supplies a signal of logical "0" to the AND gate (AND,,), whereby the AND gate (AND 11 ) stops supplying output signals. 2-input AND circuits (61 to 64) are connected at one input terminal to the outputs of the "1" detector circuits (54 to 57) and at the other input terminal to the outputs of the second linear shift registers (B, to B 4 ). The AND circuit connected to the "1" detector circuit supplies the data stored in the second linear shift register to which it is connected. The data representing the quotient of the division α i - a i , are delivered through an OR circuit (65).