A digital chrominance signal processing system comprises a variable gain amplifier (11) for gain control of a carrier chrominance signal; an A/D converter (12) for effecting analogue/digital conversion of the output of said variable gain amplifier; a demodulator (13) for demodulating the output of said A/D converter into two chrominance difference signals (R-Y, B-Y); a computing circuit (15) for computing the amplitude of the burst signal of said carrier chrominance signal from said two chrominance signals; and a control circuit (21) for producing a signal for controlling the gain of said variable gain amplifier by the output of said computing circuit, whereby the gain control is prevented from erroneous operation even when the demodulating axis of the demodulator is not in agreement with the burst phase.