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公开(公告)号：EP0164274A2
公开(公告)日：1985-12-11
申请号：EP85304060.8
申请日：1985-06-07
IPC分类号： H04N9/68
CPC分类号： H04N9/793 , H04N9/68 , H04N9/7904
摘要： A digital chrominance signal processing system comprises a variable gain amplifier (11) for gain control of a carrier chrominance signal; an A/D converter (12) for effecting analogue/digital conversion of the output of said variable gain amplifier; a demodulator (13) for demodulating the output of said A/D converter into two chrominance difference signals (R-Y, B-Y); a computing circuit (15) for computing the amplitude of the burst signal of said carrier chrominance signal from said two chrominance signals; and a control circuit (21) for producing a signal for controlling the gain of said variable gain amplifier by the output of said computing circuit, whereby the gain control is prevented from erroneous operation even when the demodulating axis of the demodulator is not in agreement with the burst phase.
摘要翻译： 数字色度信号处理系统包括用于对载波色度信号进行增益控制的可变增益放大器（11） 用于对所述可变增益放大器的输出进行模拟/数字转换的A / D转换器（12）; 解调器（13），用于将所述A / D转换器的输出解调为两个色度差信号（R-Y，B-Y）; 计算电路（15），用于从所述两个色度信号计算所述载波色度信号的脉冲串信号的振幅; 以及用于通过所述计算电路的输出产生用于控制所述可变增益放大器的增益的信号的控制电路（21），由此即使当解调器的解调轴不一致时也防止了增益控制的错误操作 爆发阶段。
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公开(公告)号：EP0164274B1
公开(公告)日：1991-01-30
申请号：EP85304060.8
申请日：1985-06-07
IPC分类号： H04N9/68
CPC分类号： H04N9/793 , H04N9/68 , H04N9/7904
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公开(公告)号：EP0164274A3
公开(公告)日：1987-01-28
申请号：EP85304060
申请日：1985-06-07
IPC分类号： H04N09/68
CPC分类号： H04N9/793 , H04N9/68 , H04N9/7904
摘要： A digital chrominance signal processing system comprises a variable gain amplifier (11) for gain control of a carrier chrominance signal; an A/D converter (12) for effecting analogue/digital conversion of the output of said variable gain amplifier; a demodulator (13) for demodulating the output of said A/D converter into two chrominance difference signals (R-Y, B-Y); a computing circuit (15) for computing the amplitude of the burst signal of said carrier chrominance signal from said two chrominance signals; and a control circuit (21) for producing a signal for controlling the gain of said variable gain amplifier by the output of said computing circuit, whereby the gain control is prevented from erroneous operation even when the demodulating axis of the demodulator is not in agreement with the burst phase.
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