An integrated circuit comprises a converter for converting a logic input signal of a first logic type into a logic output signal of a second logic type, for example from ECL to CMOS level. The converter comprises a buffer (10), including a controllable load (14) and a driver transistor (12), and a control circuit (20). In dependence on a control voltage and a reference voltage (V REF ) externally applied, the load (14) is controlled so that the output signal (V OUT ) is substantially equal to the reference voltage (V REF ) if the input signal (V IN ) is substantially equal to the control voltage. The load (14) and the driver transistor (12) in the buffer are controllable in a mutually opposed manner, a capacitance (25) being inserted between the control terminal of the load and the input terminal (16) of the driver so as to pass the AC effect of signal transitions to the load, thus speeding up the transition at the buffer. In one embodiment the control circuit (20) comprises a copy (30) of the buffer (10), which copy (30) receives the control voltage on its input, its load being controlled by a differential amplifier (40) whose inputs receive the reference voltage (V REF ) and the output voltage of the copy. A CMOS-SRAM comprising ECL/CMOS level converters of the above kind communicates with fast ECL circuits and has a low energy consumption.