Integrated memory comprising a sense amplifier
    2.
    发明公开
    Integrated memory comprising a sense amplifier 失效
    集成存储器包括一个读出放大器

    公开(公告)号:EP0400724A1

    公开(公告)日:1990-12-05

    申请号:EP90201307.7

    申请日:1990-05-23

    发明人: Seevinck, Evert

    IPC分类号: G11C7/06 G11C11/419

    CPC分类号: G11C7/062 G11C11/419

    摘要: An integrated memory comprising a sense amplifier which includes a parallel connection of a first and a second current branch, each current branch including channels of a control transistor and a load transistor which are coupled via a relevant junction point, the relevant junction points on the one side and gates of the load transistors on the other side being cross-wise coupled, said junction points constituting outputs of the sense amplifier, said transistors being of the same conductivity type, each load transistor being connected in a source-follower configuration with the relevant control transistor. As a result, the control transistors will be operative in the saturation region at all times and can be driven to full output, so that an integrated memory in accordance with the invention is faster.

    摘要翻译: 一种包括读出放大器的集成存储器,所述读出放大器包括第一和第二电流分支的并联连接,每个电流分支包括控制晶体管和负载晶体管的沟道,所述控制晶体管和负载晶体管的沟道经由相关联结点耦合,所述一个 所述负载晶体管的另一侧的栅极和栅极交叉耦合,所述接点构成读出放大器的输出,所述晶体管具有相同的导电类型,每个负载晶体管以源极跟随器配置与相关 控制晶体管。 结果,控制晶体管将始终在饱和区工作并且可以被驱动为全输出,从而根据本发明的集成存储器更快。

    Integrated circuit comprising a signal level converter
    3.
    发明公开
    Integrated circuit comprising a signal level converter 失效
    Integrierte Schaltung mit einem Signalpegelumsetzer。

    公开(公告)号:EP0397268A1

    公开(公告)日:1990-11-14

    申请号:EP90201161.8

    申请日:1990-05-07

    CPC分类号: H03K19/00384 H03K19/01707

    摘要: An integrated circuit comprises a converter for converting a logic input signal of a first logic type into a logic output signal of a second logic type, for example from ECL to CMOS level. The converter comprises a buffer (10), including a controllable load (14) and a driver transistor (12), and a control circuit (20). In dependence on a control voltage and a reference voltage (V REF ) externally applied, the load (14) is controlled so that the output signal (V OUT ) is substantially equal to the reference voltage (V REF ) if the input signal (V IN ) is substantially equal to the control voltage. The load (14) and the driver transistor (12) in the buffer are controllable in a mutually opposed manner, a capacitance (25) being inserted between the control terminal of the load and the input terminal (16) of the driver so as to pass the AC effect of signal transitions to the load, thus speeding up the transition at the buffer. In one embodiment the control circuit (20) comprises a copy (30) of the buffer (10), which copy (30) receives the control voltage on its input, its load being controlled by a differential amplifier (40) whose inputs receive the reference voltage (V REF ) and the output voltage of the copy. A CMOS-SRAM comprising ECL/CMOS level converters of the above kind communicates with fast ECL circuits and has a low energy consumption.

    摘要翻译: 集成电路包括转换器,用于将第一逻辑类型的逻辑输入信号转换为第二逻辑类型的逻辑输出信号,例如从ECL到CMOS电平。 该转换器包括一个包括可控负载(14)和一个驱动晶体管(12)的缓冲器(10)和一个控制电路(20)。 根据外部施加的控制电压和参考电压(VREF),如果输入信号(VIN)基本上等于负载(14),则输出信号(VOUT)基本上等于参考电压(VREF) 等于控制电压。 缓冲器中的负载(14)和驱动晶体管(12)以相互相对的方式可控,电容(25)插入在负载的控制端和驱动器的输入端(16)之间,以便 将信号转换的交流效应传递给负载,从而加快缓冲器的转换。 在一个实施例中,控制电路(20)包括缓冲器(10)的副本(30),其复制(30)在其输入端接收控制电压,其负载由差分放大器(40)控制,差分放大器(40)的输入接收 参考电压(VREF)和复印的输出电压。 包括上述类型的ECL / CMOS电平转换器的CMOS-SRAM与快速ECL电路通信并且具有低能量消耗。

    Linear-gain amplifier arrangement
    5.
    发明公开
    Linear-gain amplifier arrangement 失效
    VerstärkerschaltungmitLinearverstärkung。

    公开(公告)号:EP0367330A1

    公开(公告)日:1990-05-09

    申请号:EP89202658.4

    申请日:1989-10-20

    IPC分类号: H03G1/00 H03F1/32

    CPC分类号: H03F1/3211 H03G1/04

    摘要: A linear-gain amplifier arrangement comprises a current amplifying cell constructed by means of field-effect transistors and comprising a first (M1, M3) and a second (M2, M4) current-mirror circuit whose respective input transistors (M1; M2) and output transistors (M3; M4) constitute a first and a second differential pair. The input transistors (M1; M2) have their drain electrodes connected to a voltage-­current converter (V/I) comprising field-effect transistors, which supplies difference currents (I in1 , I in2 ) which are square-law functions of the input voltage (U in ) to be amplified. The difference between these input currents (I in1 ; I in2 ) is a linear function of the input voltage (U in ). When the transistors are operated in their saturation regions the difference between the output currents (I out1 ; I out2 ) is also a linear function of the input voltage (U in ). By adding a direct voltage (V c ) to the gate-source voltage of the input and output transistors (M1, M2; M3, M4) or by adding a direct current (I c ) to the respective input currents (I in1 ; I in2 ) the gain can be varied without a change in bandwidth. When the arrangement is constructed as an integrated semiconductor circuit its gain can be made immune to temperature variations and tolerances in the fabrication process.

    摘要翻译: 线性增益放大器装置包括由场效应晶体管构成的电流放大单元,其包括第一(M1,M3)和第二(M2,M4)电流镜电路,其各自的输入晶体管(M1; M2)和 输出晶体管(M3; M4)构成第一和第二差分对。 输入晶体管(M1; M2)的漏电极连接到包括场效应晶体管的电压 - 电流转换器(V / I),该场效应晶体管提供作为输入电压的平方律函数的差电流(Iin1,Iin2) Uin)被放大。 这些输入电流(Iin1; Iin2)之间的差值是输入电压(Uin)的线性函数。 当晶体管在饱和区域工作时,输出电流(Iout1; Iout2)之间的差值也是输入电压(Uin)的线性函数。 通过向输入和输出晶体管(M1,M2; M3,M4)的栅极 - 源极电压添加直流电压(Vc)或者通过向各个输入电流(Iin1; Iin2)添加直流电流(Ic),增益 可以改变而不改变带宽。 当该装置构造为集成半导体电路时,可以使其增益免受制造过程中的温度变化和公差的影响。

    Current amplifier
    6.
    发明公开
    Current amplifier 失效
    电流放大器

    公开(公告)号:EP0357125A1

    公开(公告)日:1990-03-07

    申请号:EP89202102.3

    申请日:1989-08-17

    IPC分类号: H03F3/343 G05F3/26

    CPC分类号: H03F3/343 G05F3/265

    摘要: The invention relates to a current amplifier comprising an input terminal (1) for receiving an input current, an output terminal (2) for supplying an output current, a first transistor (T₁) having a base-emitter junction coupled to the input terminal, and a second transistor (T₂) having a collector coupled to the output terminal and having an emitter arranged in series with a voltage source (4), the series arrangement of the voltage source and the base-emitter junction of the second transistor being arranged in parallel with the base-­emitter junction of the first transistor, the first transistor being of the NPN conductivity type and the second transistor being of the PNP conductivity type. The low internal series resistor of the NPN transistor T₁ allows a comparatively large input current I in , so that the attenuated output current (I out ) is a linear function of the input current over a wide range. This results in a current-sourcing attenuating current mirror having a far better linearity than a current amplifier in which the first and the second transistor are both of the PNP conductivity type.

    摘要翻译: 本发明涉及一种电流放大器,包括用于接收输入电流的输入端(1),用于提供输出电流的输出端(2),具有耦合到输入端的基极 - 发射极结的第一晶体管(T 1) 和一个第二晶体管(T 2),其集电极连接到输出端并具有一个与电压源(4)串联的发射极,第二晶体管的电压源和基极 - 发射极结的串联电路布置在 与第一晶体管的基极 - 发射极结并联,第一晶体管具有NPN导电类型,第二晶体管具有PNP导电类型。 NPN晶体管T 1的低内部串联电阻允许相对较大的输入电流I in,使得衰减的输出电流(I out)在宽范围内是输入电流的线性函数。 这导致具有比其中第一和第二晶体管均为PNP导电类型的电流放大器具有好得多的线性的电流源衰减电流镜。

    Differential amplifier
    7.
    发明公开
    Differential amplifier 失效
    差分放大器

    公开(公告)号:EP0157447A1

    公开(公告)日:1985-10-09

    申请号:EP85200348.2

    申请日:1985-03-11

    发明人: Seevinck, Evert

    IPC分类号: H03F3/45

    摘要: A first and a second transistor (T,, T 2 ) whose emitters are connected to a common point (4) via first resistors (R 1 , R 2 ), which common point is connected to the positive power-supply terminal via a current source (I 1 ), form a differential amplifier to which an input signal (V i ) is applied. In order to increase the slew rate the quiescent current through the first and the second transistor (T 1 , T 2 ) is made to increase when the input voltage (V i ) increases. This is achieved by means of a third transistor (T 3 ) whose emitter is connected to the common point (4). The base of this transistor (T 3 ) is connected to the tapping of a voltage divider which is arranged between the bases of the first and the second transistor (T 1 , T 2 ) and which comprises second resistors (R 3 , R 4 ). When the input voltage increases the transistor (T 3 ) drains a continually decreasing portion of the current from the current source (I 1 ).

    摘要翻译: 第一和第二晶体管(T,T2)的发射极经由第一电阻器(R1,R2)连接到公共点(4),该公共点经由电流源(I1)连接到正电源端子 )形成输入信号(Vi)施加到的差分放大器。 为了提高转换速率,当输入电压(Vi)增加时,使通过第一和第二晶体管(T1,T2)的静态电流增加。 这是通过其发射极连接到公共点(4)的第三晶体管(T3)实现的。 该晶体管(T3)的基极连接到布置在第一和第二晶体管(T1,T2)的基极之间并且包括第二电阻器(R3,R4)的分压器的抽头。 当输入电压增加时,晶体管(T3)耗尽来自电流源(I1)的电流的连续下降部分。