A semiconductor device comprising a laminate structure of a first portion (103) principally composed of a component same as the principal component of the semiconductor layers (101), and a second portion consisting of a metal (104). PMOS device (P1) and NMOS device (N1) are formed on a semiconductor substrate (101) to constitute a CMOS circuit. On an oxide film (102) is formed a laminate electrode wiring structure consisting of a single semiconductor layer (103) and a metal layer (104), serving as gate electrodes and wirings for both devices. Said semiconductor layer (103) is doped in p-type in a portion 103A at the side of the PMOS device, and in n-type in a portion 103B at the side of the NNOS device on the entire area of the semiconductor layer (103) (e.g. polysilicon), there is deposited selectively a metal layer 104 composed of Al or principally of Al, or of another metal such Cu, Mo or W.