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公开(公告)号：EP0465152B1
公开(公告)日：1996-03-20
申请号：EP91305871.5
申请日：1991-06-28
发明人： Okabe, Takahiko, c/o Canon Kabushiki Kaisha , Monma, Genzo, c/o Canon Kabushiki Kaisha , Yuzurihara, Hiroshi, c/o Canon Kabushiki Kaisha
IPC分类号： H01L23/544 , H01L21/768
CPC分类号： H01L23/544 , H01L2223/54426 , H01L2223/54453 , H01L2924/0002 , Y10S148/102 , Y10S438/975 , H01L2924/00
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公开(公告)号：EP0459770B1
公开(公告)日：1995-05-03
申请号：EP91304827.8
申请日：1991-05-29
发明人： Matsumoto, Shigeyuki, c/o Canon Kabushiki Kaisha , Yuzurihara, Hiroshi, c/o Canon Kabushiki Kaisha , Miyawaki, Mamoru, c/o Canon Kabushiki Kaisha , Inoue, Shunsuke, c/o Canon Kabushiki Kaisha , Nakayama, Jun, c/o Canon Kabushiki Kaisha
IPC分类号： H01L21/3205 , H01L29/78 , H01L29/49
CPC分类号： H01L29/6659 , H01L21/266 , H01L21/76879 , H01L29/4925 , H01L29/66659 , H01L29/7835 , H01L29/7836
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3.发明授权Method of producing a semiconductor integrated circuit having complementary field effect transistors 失效一种用于生产具有互补场效应晶体管的半导体集成电路的过程
公开(公告)号：EP0459773B1
公开(公告)日：2001-04-04
申请号：EP91304831.0
申请日：1991-05-29
发明人： Yuzurihara, Hiroshi, c/o Canon Kabushiki Kaisha , Inoue, Shunsuke, c/o Canon Kabushiki Kaisha , Miyawaki, Mamoru, c/o Canon Kabushiki Kaisha , Matsumoto, Shigeyuki, c/o Canon Kabushiki Kaisha
IPC分类号： H01L21/8238 , H01L21/285
CPC分类号： H01L29/4933 , C23C14/568 , C23C16/04 , H01L21/823842 , H01L21/823871 , H01L23/53271 , H01L29/4925 , H01L2924/0002 , Y10S148/02 , H01L2924/00
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公开(公告)号：EP0510607A1
公开(公告)日：1992-10-28
申请号：EP92106874.8
申请日：1992-04-22
发明人： Miyawaki, Mamoru, c/o Canon Kabushiki Kaisha , Ishizaki, Akira, c/o Canon Kabushiki Kaisha , Monma, Genzo, c/o Canon Kabushiki Kaisha , Yuzurihara, Hiroshi, c/o Canon Kabushiki Kaisha , Kohchi, Tetsunobu, c/o Canon Kabushiki Kaisha
IPC分类号： H01L29/772 , H01L21/331 , H01L27/10 , G11C11/24
CPC分类号： H01L29/7851 , H01L21/823475 , H01L27/1026 , H01L27/10805 , H01L27/115 , H01L29/66795
摘要： A semiconductor memory device includes: an insulated gate transistor having a plurality of main electrode regions provided along a major surface of a substrate and a channel region provided between the plurality of main electrode regions, and a gate electrode provided on the channel region with a gate insulator therebetween, the gate electrode having at least two opposing portions; and an electrically breakable memory element provided on one of the main electrode regions.
摘要翻译： 一种半导体存储器件，包括：绝缘栅极晶体管，具有沿着基板的主表面设置的多个主电极区域和设置在所述多个主电极区域之间的沟道区域，以及设置在所述沟道区域上的栅电极， 绝缘体之间，所述栅电极具有至少两个相对的部分; 以及设置在主电极区域之一上的电可破坏的存储元件。
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公开(公告)号：EP0459773A3
公开(公告)日：1992-06-03
申请号：EP91304831.0
申请日：1991-05-29
发明人： Yuzurihara, Hiroshi, c/o Canon Kabushiki Kaisha , Inoue, Shunsuke, c/o Canon Kabushiki Kaisha , Miyawaki, Mamoru, c/o Canon Kabushiki Kaisha , Matsumoto, Shigeyuki, c/o Canon Kabushiki Kaisha
IPC分类号： H01L27/092 , H01L23/522
CPC分类号： H01L29/4933 , C23C14/568 , C23C16/04 , H01L21/823842 , H01L21/823871 , H01L23/53271 , H01L29/4925 , H01L2924/0002 , Y10S148/02 , H01L2924/00
摘要： A semiconductor device comprising a laminate structure of a first portion (103) principally composed of a component same as the principal component of the semiconductor layers (101), and a second portion consisting of a metal (104). PMOS device (P1) and NMOS device (N1) are formed on a semiconductor substrate (101) to constitute a CMOS circuit. On an oxide film (102) is formed a laminate electrode wiring structure consisting of a single semiconductor layer (103) and a metal layer (104), serving as gate electrodes and wirings for both devices. Said semiconductor layer (103) is doped in p-type in a portion 103A at the side of the PMOS device, and in n-type in a portion 103B at the side of the NNOS device on the entire area of the semiconductor layer (103) (e.g. polysilicon), there is deposited selectively a metal layer 104 composed of Al or principally of Al, or of another metal such Cu, Mo or W.
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6.发明公开
公开(公告)号：EP0472217A1
公开(公告)日：1992-02-26
申请号：EP91114197.6
申请日：1991-08-23
IPC分类号： H01J37/302 , G03B41/00
CPC分类号： G03F7/70433 , G03F7/2002 , G03F7/70475 , H01L21/0274
摘要： Disclosed is a method of manufacturing semiconductor devices in which a desired pattern having an area size larger than the field size that can be obtained in one exposure process step of an exposure device is formed. The manufacturing method includes the steps of dividing the desired pattern into a plurality of portions, and conducting exposure on the dividing patterns in a joined fashion.
摘要翻译： 公开了一种制造半导体器件的方法，其中形成了具有比在曝光装置的一个曝光处理步骤中可获得的场尺寸大的面积尺寸的期望图案。 该制造方法包括以下步骤：将期望的图案分成多个部分，并以连接的方式在分割图案上进行曝光。
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7.发明公开Semiconductor device and method for producing the same 失效Halbleiteranordnung und Verfahren zu dessen Herstellung。
公开(公告)号：EP0459773A2
公开(公告)日：1991-12-04
申请号：EP91304831.0
申请日：1991-05-29
发明人： Yuzurihara, Hiroshi, c/o Canon Kabushiki Kaisha , Inoue, Shunsuke, c/o Canon Kabushiki Kaisha , Miyawaki, Mamoru, c/o Canon Kabushiki Kaisha , Matsumoto, Shigeyuki, c/o Canon Kabushiki Kaisha
IPC分类号： H01L27/092 , H01L23/522
CPC分类号： H01L29/4933 , C23C14/568 , C23C16/04 , H01L21/823842 , H01L21/823871 , H01L23/53271 , H01L29/4925 , H01L2924/0002 , Y10S148/02 , H01L2924/00
摘要： A semiconductor device comprising a laminate structure of a first portion (103) principally composed of a component same as the principal component of the semiconductor layers (101), and a second portion consisting of a metal (104). PMOS device (P1) and NMOS device (N1) are formed on a semiconductor substrate (101) to constitute a CMOS circuit. On an oxide film (102) is formed a laminate electrode wiring structure consisting of a single semiconductor layer (103) and a metal layer (104), serving as gate electrodes and wirings for both devices. Said semiconductor layer (103) is doped in p-type in a portion 103A at the side of the PMOS device, and in n-type in a portion 103B at the side of the NNOS device on the entire area of the semiconductor layer (103) (e.g. polysilicon), there is deposited selectively a metal layer 104 composed of Al or principally of Al, or of another metal such Cu, Mo or W.
摘要翻译： 一种半导体器件，其中与不同导电类型的半导体层接触并用于连接至少相互不同的导电类型的层的电极布线包括主要由与主要成分相同的成分组成的第一部分 半导体层和由金属组成的第二部分。
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8.发明公开Photoelectric conversion device and process for its fabrication 有权Photoelektrische Umwandlungsvorrichtung und deren Herstellungsverfahren
公开(公告)号：EP1075028A2
公开(公告)日：2001-02-07
申请号：EP00306637.0
申请日：2000-08-04
IPC分类号： H01L27/146
CPC分类号： H01L27/14689 , H01L27/14609 , H01L27/14612 , H01L27/14643
摘要： In a photoelectric conversion device comprising a photoelectric-conversion section and a peripheral circuit section where signals sent from the photoelectric-conversion section are processed, the both sections being provided on the same semiconductor substrate, a semiconductor compound layer of a high-melting point metal is provided on the source and drain and a gate electrode of an MOS transistor that forms the peripheral circuit section, and the top surface of a semiconductor diffusion layer that serves as a light-receiving part of the photoelectric conversion section is in contact with an insulating layer.
摘要翻译： 在包括光电转换部分和从光电转换部分发送信号的外围电路部分的光电转换装置中，两部分设置在相同的半导体衬底上，高熔点金属的半导体化合物层 设置在源极和漏极以及形成外围电路部分的MOS晶体管的栅电极，并且用作光电转换部分的光接收部分的半导体扩散层的顶表面与绝缘体 层。
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公开(公告)号：EP0581280A3
公开(公告)日：1995-12-13
申请号：EP93112146.1
申请日：1993-07-29
发明人： Sekine, Yasuhiro, c/o Canon Kabushiki Kaisha , Momma, Genzo, c/o Canon Kabushiki Kaisha , Yuzurihara, Hiroshi, c/o Canon Kabushiki Kaisha
IPC分类号： G03F7/20 , G03F7/004 , G03F1/14 , H01L21/285
CPC分类号： G03F7/2065 , G03F7/004 , G03F7/2043 , H01L21/0332 , H01L21/0337 , H01L21/263 , H01L21/3086 , H01L21/321
摘要： A pattern forming method comprises subjecting a surface of a semiconductor substrate to surface treatment for imparting hydrogen atoms, irradiating a desired region of said surface with an energy ray, selectively forming a metal film on a non-irradiated region other than the desired region, and etching said semiconductor substrate using said metal film as a mask.
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公开(公告)号：EP0581280A2
公开(公告)日：1994-02-02
申请号：EP93112146.1
申请日：1993-07-29
发明人： Sekine, Yasuhiro, c/o Canon Kabushiki Kaisha , Momma, Genzo, c/o Canon Kabushiki Kaisha , Yuzurihara, Hiroshi, c/o Canon Kabushiki Kaisha
IPC分类号： G03F7/20 , G03F7/004 , G03F1/14 , H01L21/285
CPC分类号： G03F7/2065 , G03F7/004 , G03F7/2043 , H01L21/0332 , H01L21/0337 , H01L21/263 , H01L21/3086 , H01L21/321
摘要： A pattern forming method comprises subjecting a surface of a semiconductor substrate to surface treatment for imparting hydrogen atoms, irradiating a desired region of said surface with an energy ray, selectively forming a metal film on a non-irradiated region other than the desired region, and etching said semiconductor substrate using said metal film as a mask.
摘要翻译： 图案形成方法包括使半导体衬底的表面进行表面处理以赋予氢原子，用能量射线照射所述表面的所需区域，在除所需区域之外的非照射区域上选择性地形成金属膜，以及 使用所述金属膜作为掩模蚀刻所述半导体衬底。
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