发明公开
EP0480860A1 Variable self-correcting digital delay circuit
失效
Selbst korrigierender,变量标记数字器Verzögerungsschaltkreis。
- 专利标题: Variable self-correcting digital delay circuit
- 专利标题(中): Selbst korrigierender,变量标记数字器Verzögerungsschaltkreis。
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申请号: EP91480146.9申请日: 1991-09-26
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公开(公告)号: EP0480860A1公开(公告)日: 1992-04-15
- 发明人: DeLisle, Francis Anthony , Jacoutot, Alfred Michael
- 申请人: International Business Machines Corporation
- 申请人地址: Old Orchard Road Armonk, N.Y. 10504 US
- 专利权人: International Business Machines Corporation
- 当前专利权人: International Business Machines Corporation
- 当前专利权人地址: Old Orchard Road Armonk, N.Y. 10504 US
- 代理机构: Combeau, Jacques
- 优先权: US595518 19901011
- 主分类号: H03K5/135
- IPC分类号: H03K5/135 ; H03K19/003 ; H03K5/12 ; H03K5/13
摘要:
A variable self-correcting on-chip circuit comprised of a plurality of digital circuit components is described, whereby electrical signals are precisely positioned with respect to one another. Electrical signals are converted into a number of pulses within a predefined time window. A first number of pulses obtained from free on-chip circuit oscillation is compared to a second number of pulses derived from a predetermined delay defined by the user. An unequal comparison generates control signals capable of advancing or retarding electrical signals. The delay adjustments account for technology, process, temperature and power supply variations. The compounded effect of these variations translates into a certain delay for which self-correction takes effect.
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