A low-voltage output driving circuit capable of preventing the generation of leakage current. The circuit includes a transfer gate GT installed between the output S₂ of a first CMOS inverter INV C1 and the node S₁ at the gate of an MOS transistor PT₃ for active pull-up. At the same time, a reference voltage V REF and a voltage level V OUT , which corresponds to the voltage level of the output line of the signal S OUT , are compared by a comparator CMP. When the voltage V OUT is lower than the reference voltage V REF , the transfer gate GT is set to the ON state, and the output of the first CMOS inverter INV C1 is sent to the gate of the transistor PT₃ for active pull-up. The comparator CMP is installed so that when the voltage level V OUT is higher than the reference voltage V REF , the output of the first CMOS inverter INV C1 is prevented from reaching the gate of the transistor PT₃ for active pull-up. Thus, although the input and output can take on any state, the generation of leakage current which flows toward the power supply from the output side can be prevented.