发明公开
EP0698287A1 A METHOD FOR FORMING A VIRTUAL-GROUND FLASH EPROM ARRAY WITH FLOATING GATES THAT ARE SELF ALIGNED TO THE FIELD OXIDE REGIONS OF THE ARRAY 失效
方法用于制造具有虚地的FLASH EPROM MATRIX具有浮动栅极WHAT自对准于矩阵的场氧化物区是

  • 专利标题: A METHOD FOR FORMING A VIRTUAL-GROUND FLASH EPROM ARRAY WITH FLOATING GATES THAT ARE SELF ALIGNED TO THE FIELD OXIDE REGIONS OF THE ARRAY
  • 专利标题(中): 方法用于制造具有虚地的FLASH EPROM MATRIX具有浮动栅极WHAT自对准于矩阵的场氧化物区是
  • 申请号: EP95914117.0
    申请日: 1995-03-14
  • 公开(公告)号: EP0698287A1
    公开(公告)日: 1996-02-28
  • 发明人: BERGEMONT, Albert
  • 申请人: NATIONAL SEMICONDUCTOR CORPORATION
  • 申请人地址: 1090 Kifer Road, M/S 16-135 Sunnyvale, CA 95086-3737 US
  • 专利权人: NATIONAL SEMICONDUCTOR CORPORATION
  • 当前专利权人: NATIONAL SEMICONDUCTOR CORPORATION
  • 当前专利权人地址: 1090 Kifer Road, M/S 16-135 Sunnyvale, CA 95086-3737 US
  • 代理机构: Bowles, Sharon Margaret, et al
  • 优先权: US19940213903 19940315
  • 国际公布: WO1995025345 19950921
  • 主分类号: H01L21
  • IPC分类号: H01L21
A METHOD FOR FORMING A VIRTUAL-GROUND FLASH EPROM ARRAY WITH FLOATING GATES THAT ARE SELF ALIGNED TO THE FIELD OXIDE REGIONS OF THE ARRAY
摘要:
The floating gate of a virtual-ground flash electrically programmable read-only-memory (EPROM) cell, which is formed over a portion of a pair of vertically-adjacent field oxide regions, is self aligned to the field oxide regions by utilizing a stacked etch process to define the widths of both the floating gate and the field oxide regions. As a result, the pitch of the cells in the X direction can be substantially reduced.
信息查询
0/0