发明公开
- 专利标题: SIGMA-DELTA CONVERTER HAVING A DIGITAL LOGIC GATE CORE
- 专利标题(中): 与逻辑门的核心Σ-Δ转换
-
申请号: EP95913556申请日: 1995-03-02
-
公开(公告)号: EP0748537A4公开(公告)日: 1998-06-17
- 发明人: SUTTELRIN PHILIP H , DOWNEY WALTER J
- 申请人: ECHELON CORP
- 专利权人: ECHELON CORP
- 当前专利权人: ECHELON CORP
- 优先权: US20570494 1994-03-03
- 主分类号: H03M3/02
- IPC分类号: H03M3/02
摘要:
A sigma-delta A/D converter (301) having a digital logic gate core. The converter is comprised of a loop filter (304) for shaping the converter's quantization noise spectrum. The loop filter is comprised of an unbuffered CMOS logic gate inverter (602) which can be implemented by a gate array. A quantizer (305) is coupled to the loop filter. A logic gate buffer (501) is configured as a one-bit comparator, which is used to perform the quantization. This logic gate buffer can be one of the gates of a gate array. A sample (306) is coupled to the quantizer for sampling the quantized signal. This sampler can also be implemented by digital circuitry of a gate array. The signal from the sampler is fed into a decimator (302). The decimator outputs a digital signal representative of the amplitude of the analog signal.
信息查询