发明授权
EP0769207B1 METHOD OF FABRICATING SELF-ALIGNED CONTACT TRENCH DMOS TRANSISTORS
失效
用于生产沟槽DMOS晶体管,自我调整的联系
- 专利标题: METHOD OF FABRICATING SELF-ALIGNED CONTACT TRENCH DMOS TRANSISTORS
- 专利标题(中): 用于生产沟槽DMOS晶体管,自我调整的联系
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申请号: EP96913316.4申请日: 1996-05-01
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公开(公告)号: EP0769207B1公开(公告)日: 2003-10-22
- 发明人: HEBERT, François , BENCUYA, Izak , KWAN, Sze-Hon
- 申请人: NATIONAL SEMICONDUCTOR CORPORATION
- 申请人地址: 1090 Kifer Road, M/S D3-579 Sunnyvale, Ca 94086-3737 US
- 专利权人: NATIONAL SEMICONDUCTOR CORPORATION
- 当前专利权人: NATIONAL SEMICONDUCTOR CORPORATION
- 当前专利权人地址: 1090 Kifer Road, M/S D3-579 Sunnyvale, Ca 94086-3737 US
- 代理机构: Bowles, Sharon Margaret
- 优先权: US431765 19950501
- 国际公布: WO96035230 19961107
- 主分类号: H01L21/336
- IPC分类号: H01L21/336 ; H01L29/78
摘要:
A method of fabricating a trench DMOS transistor structure results in the contact to the transistor's source and body being self-aligned to the trench. With a self-aligned contact, the distance from the edge of the source and body contact to the edge of the trench can be minimized. Thus, the distance between the trench edges can be reduced. As a result, the packing density of the transistor is increased dramatically. This gives rise to much improved performance in terms of low on-resistance and higher current drive capability. The process flow maximizes the height of the trench poly gate prior to formation of oxide spacers for the self-contact contact, thereby ensuring sufficient step height for the spacers.
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